From fb77d7629d6228cb0c48c126916937bc36e8b324 Mon Sep 17 00:00:00 2001
From: Flight_Control <sven.van.de.velde@telenet.be>
Date: Wed, 29 Mar 2023 07:00:14 +0200
Subject: [PATCH] - Optimized the speed of the compilation by reducing the zp
 coalesce to only zeropage allocated registers. - All mem[x] type allocated
 memory or registers is ignored.

(cherry picked from commit 783bd398190b55b0ccea2be937b50eb185bf51bb)
---
 .../java/dk/camelot64/kickc/passes/Pass4MemoryCoalesce.java   | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/main/java/dk/camelot64/kickc/passes/Pass4MemoryCoalesce.java b/src/main/java/dk/camelot64/kickc/passes/Pass4MemoryCoalesce.java
index c229e98fe..64d60f35f 100644
--- a/src/main/java/dk/camelot64/kickc/passes/Pass4MemoryCoalesce.java
+++ b/src/main/java/dk/camelot64/kickc/passes/Pass4MemoryCoalesce.java
@@ -143,6 +143,10 @@ public abstract class Pass4MemoryCoalesce extends Pass2Base {
       // Check the both registers have the same type
       if(!register1.getType().equals(register2.getType()))
          return false;
+      if(register1.toString().startsWith("mem"))
+         return false;
+      if(register2.toString().startsWith("mem"))
+         return false;
       // Check the both registers have the same size
       if(register1.getBytes() != register2.getBytes())
          return false;