Inlined call call __init
Eliminating unused variable with no statement sin16s_gen::$0
Eliminating unused variable with no statement sin16s::$5
Eliminating unused variable with no statement sin16s::$6
Eliminating unused variable with no statement sin16s::$7
Eliminating unused variable with no statement sin16s::$8
Eliminating unused variable with no statement sin16s::$9
Eliminating unused variable with no statement sin16s::$10
Eliminating unused variable with no statement sin16s::$11
Eliminating unused variable with no statement sin16s::$12
Eliminating unused variable with no statement div32u16u::$1
Eliminating unused variable with no statement div32u16u::$3
Eliminating unused variable with no statement div32u16u::$4
Eliminating unused variable with no statement memset::$2

CONTROL FLOW GRAPH SSA

void sin16s_gen(int *sintab , unsigned int wavelength)
sin16s_gen: scope:[sin16s_gen]  from main
  sin16s_gen::sintab#6 = phi( main/sin16s_gen::sintab#1 )
  rem16u#22 = phi( main/rem16u#25 )
  sin16s_gen::wavelength#1 = phi( main/sin16s_gen::wavelength#0 )
  div32u16u::dividend#0 = PI2_u4f28
  div32u16u::divisor#0 = sin16s_gen::wavelength#1
  call div32u16u
  div32u16u::return#0 = div32u16u::return#2
  to:sin16s_gen::@3
sin16s_gen::@3: scope:[sin16s_gen]  from sin16s_gen
  sin16s_gen::sintab#5 = phi( sin16s_gen/sin16s_gen::sintab#6 )
  sin16s_gen::wavelength#3 = phi( sin16s_gen/sin16s_gen::wavelength#1 )
  rem16u#12 = phi( sin16s_gen/rem16u#6 )
  div32u16u::return#3 = phi( sin16s_gen/div32u16u::return#0 )
  sin16s_gen::step#0 = div32u16u::return#3
  rem16u#0 = rem16u#12
  sin16s_gen::x#0 = 0
  sin16s_gen::i#0 = 0
  to:sin16s_gen::@1
sin16s_gen::@1: scope:[sin16s_gen]  from sin16s_gen::@3 sin16s_gen::@4
  sin16s_gen::step#3 = phi( sin16s_gen::@3/sin16s_gen::step#0, sin16s_gen::@4/sin16s_gen::step#1 )
  sin16s_gen::sintab#4 = phi( sin16s_gen::@3/sin16s_gen::sintab#5, sin16s_gen::@4/sin16s_gen::sintab#0 )
  rem16u#23 = phi( sin16s_gen::@3/rem16u#0, sin16s_gen::@4/rem16u#28 )
  sin16s_gen::x#4 = phi( sin16s_gen::@3/sin16s_gen::x#0, sin16s_gen::@4/sin16s_gen::x#1 )
  sin16s_gen::wavelength#2 = phi( sin16s_gen::@3/sin16s_gen::wavelength#3, sin16s_gen::@4/sin16s_gen::wavelength#4 )
  sin16s_gen::i#2 = phi( sin16s_gen::@3/sin16s_gen::i#0, sin16s_gen::@4/sin16s_gen::i#1 )
  sin16s_gen::$1 = sin16s_gen::i#2 < sin16s_gen::wavelength#2
  if(sin16s_gen::$1) goto sin16s_gen::@2
  to:sin16s_gen::@return
sin16s_gen::@2: scope:[sin16s_gen]  from sin16s_gen::@1
  rem16u#31 = phi( sin16s_gen::@1/rem16u#23 )
  sin16s_gen::wavelength#5 = phi( sin16s_gen::@1/sin16s_gen::wavelength#2 )
  sin16s_gen::i#4 = phi( sin16s_gen::@1/sin16s_gen::i#2 )
  sin16s_gen::step#2 = phi( sin16s_gen::@1/sin16s_gen::step#3 )
  sin16s_gen::sintab#3 = phi( sin16s_gen::@1/sin16s_gen::sintab#4 )
  sin16s_gen::x#2 = phi( sin16s_gen::@1/sin16s_gen::x#4 )
  sin16s::x#0 = sin16s_gen::x#2
  call sin16s
  sin16s::return#0 = sin16s::return#2
  to:sin16s_gen::@4
sin16s_gen::@4: scope:[sin16s_gen]  from sin16s_gen::@2
  rem16u#28 = phi( sin16s_gen::@2/rem16u#31 )
  sin16s_gen::wavelength#4 = phi( sin16s_gen::@2/sin16s_gen::wavelength#5 )
  sin16s_gen::i#3 = phi( sin16s_gen::@2/sin16s_gen::i#4 )
  sin16s_gen::step#1 = phi( sin16s_gen::@2/sin16s_gen::step#2 )
  sin16s_gen::x#3 = phi( sin16s_gen::@2/sin16s_gen::x#2 )
  sin16s_gen::sintab#2 = phi( sin16s_gen::@2/sin16s_gen::sintab#3 )
  sin16s::return#3 = phi( sin16s_gen::@2/sin16s::return#0 )
  sin16s_gen::$2 = sin16s::return#3
  *sin16s_gen::sintab#2 = sin16s_gen::$2
  sin16s_gen::sintab#0 = sin16s_gen::sintab#2 + SIZEOF_INT
  sin16s_gen::$3 = sin16s_gen::x#3 + sin16s_gen::step#1
  sin16s_gen::x#1 = sin16s_gen::$3
  sin16s_gen::i#1 = ++ sin16s_gen::i#3
  to:sin16s_gen::@1
sin16s_gen::@return: scope:[sin16s_gen]  from sin16s_gen::@1
  rem16u#13 = phi( sin16s_gen::@1/rem16u#23 )
  rem16u#1 = rem16u#13
  return 
  to:@return

int sin16s(unsigned long x)
sin16s: scope:[sin16s]  from sin16s_gen::@2
  sin16s::x#3 = phi( sin16s_gen::@2/sin16s::x#0 )
  sin16s::isUpper#0 = 0
  sin16s::$0 = sin16s::x#3 >= PI_u4f28
  sin16s::$1 = ! sin16s::$0
  if(sin16s::$1) goto sin16s::@1
  to:sin16s::@4
sin16s::@1: scope:[sin16s]  from sin16s sin16s::@4
  sin16s::isUpper#8 = phi( sin16s/sin16s::isUpper#0, sin16s::@4/sin16s::isUpper#1 )
  sin16s::x#4 = phi( sin16s/sin16s::x#3, sin16s::@4/sin16s::x#1 )
  sin16s::$2 = sin16s::x#4 >= PI_HALF_u4f28
  sin16s::$3 = ! sin16s::$2
  if(sin16s::$3) goto sin16s::@2
  to:sin16s::@5
sin16s::@4: scope:[sin16s]  from sin16s
  sin16s::x#5 = phi( sin16s/sin16s::x#3 )
  sin16s::$16 = sin16s::x#5 - PI_u4f28
  sin16s::x#1 = sin16s::$16
  sin16s::isUpper#1 = 1
  to:sin16s::@1
sin16s::@2: scope:[sin16s]  from sin16s::@1 sin16s::@5
  sin16s::isUpper#7 = phi( sin16s::@1/sin16s::isUpper#8, sin16s::@5/sin16s::isUpper#9 )
  sin16s::x#6 = phi( sin16s::@1/sin16s::x#4, sin16s::@5/sin16s::x#2 )
  sin16s::$4 = sin16s::x#6 << 3
  sin16s::x1#0 = word1  sin16s::$4
  mulu16_sel::v1#0 = sin16s::x1#0
  mulu16_sel::v2#0 = sin16s::x1#0
  mulu16_sel::select#0 = 0
  call mulu16_sel
  mulu16_sel::return#0 = mulu16_sel::return#6
  to:sin16s::@7
sin16s::@7: scope:[sin16s]  from sin16s::@2
  sin16s::isUpper#6 = phi( sin16s::@2/sin16s::isUpper#7 )
  sin16s::x1#1 = phi( sin16s::@2/sin16s::x1#0 )
  mulu16_sel::return#7 = phi( sin16s::@2/mulu16_sel::return#0 )
  sin16s::x2#0 = mulu16_sel::return#7
  mulu16_sel::v1#1 = sin16s::x2#0
  mulu16_sel::v2#1 = sin16s::x1#1
  mulu16_sel::select#1 = 1
  call mulu16_sel
  mulu16_sel::return#1 = mulu16_sel::return#6
  to:sin16s::@8
sin16s::@8: scope:[sin16s]  from sin16s::@7
  sin16s::isUpper#5 = phi( sin16s::@7/sin16s::isUpper#6 )
  sin16s::x1#4 = phi( sin16s::@7/sin16s::x1#1 )
  mulu16_sel::return#8 = phi( sin16s::@7/mulu16_sel::return#1 )
  sin16s::x3#0 = mulu16_sel::return#8
  mulu16_sel::v1#2 = sin16s::x3#0
  mulu16_sel::v2#2 = $10000/6
  mulu16_sel::select#2 = 1
  call mulu16_sel
  mulu16_sel::return#2 = mulu16_sel::return#6
  to:sin16s::@9
sin16s::@9: scope:[sin16s]  from sin16s::@8
  sin16s::isUpper#4 = phi( sin16s::@8/sin16s::isUpper#5 )
  sin16s::x3#1 = phi( sin16s::@8/sin16s::x3#0 )
  sin16s::x1#2 = phi( sin16s::@8/sin16s::x1#4 )
  mulu16_sel::return#9 = phi( sin16s::@8/mulu16_sel::return#2 )
  sin16s::x3_6#0 = mulu16_sel::return#9
  sin16s::usinx#0 = sin16s::x1#2 - sin16s::x3_6#0
  mulu16_sel::v1#3 = sin16s::x3#1
  mulu16_sel::v2#3 = sin16s::x1#2
  mulu16_sel::select#3 = 0
  call mulu16_sel
  mulu16_sel::return#3 = mulu16_sel::return#6
  to:sin16s::@10
sin16s::@10: scope:[sin16s]  from sin16s::@9
  sin16s::isUpper#3 = phi( sin16s::@9/sin16s::isUpper#4 )
  sin16s::usinx#4 = phi( sin16s::@9/sin16s::usinx#0 )
  sin16s::x1#3 = phi( sin16s::@9/sin16s::x1#2 )
  mulu16_sel::return#10 = phi( sin16s::@9/mulu16_sel::return#3 )
  sin16s::x4#0 = mulu16_sel::return#10
  mulu16_sel::v1#4 = sin16s::x4#0
  mulu16_sel::v2#4 = sin16s::x1#3
  mulu16_sel::select#4 = 0
  call mulu16_sel
  mulu16_sel::return#4 = mulu16_sel::return#6
  to:sin16s::@11
sin16s::@11: scope:[sin16s]  from sin16s::@10
  sin16s::isUpper#2 = phi( sin16s::@10/sin16s::isUpper#3 )
  sin16s::usinx#2 = phi( sin16s::@10/sin16s::usinx#4 )
  mulu16_sel::return#11 = phi( sin16s::@10/mulu16_sel::return#4 )
  sin16s::x5#0 = mulu16_sel::return#11
  sin16s::x5_128#0 = sin16s::x5#0 >> 4
  sin16s::$13 = sin16s::usinx#2 + sin16s::x5_128#0
  sin16s::usinx#1 = sin16s::$13
  sin16s::sinx#0 = (int)sin16s::usinx#1
  sin16s::$14 = sin16s::isUpper#2 != 0
  sin16s::$15 = ! sin16s::$14
  if(sin16s::$15) goto sin16s::@3
  to:sin16s::@6
sin16s::@5: scope:[sin16s]  from sin16s::@1
  sin16s::isUpper#9 = phi( sin16s::@1/sin16s::isUpper#8 )
  sin16s::x#7 = phi( sin16s::@1/sin16s::x#4 )
  sin16s::$17 = PI_u4f28 - sin16s::x#7
  sin16s::x#2 = sin16s::$17
  to:sin16s::@2
sin16s::@3: scope:[sin16s]  from sin16s::@11 sin16s::@6
  sin16s::sinx#2 = phi( sin16s::@11/sin16s::sinx#0, sin16s::@6/sin16s::sinx#1 )
  sin16s::return#1 = sin16s::sinx#2
  to:sin16s::@return
sin16s::@6: scope:[sin16s]  from sin16s::@11
  sin16s::usinx#3 = phi( sin16s::@11/sin16s::usinx#1 )
  sin16s::$18 = - (int)sin16s::usinx#3
  sin16s::sinx#1 = sin16s::$18
  to:sin16s::@3
sin16s::@return: scope:[sin16s]  from sin16s::@3
  sin16s::return#4 = phi( sin16s::@3/sin16s::return#1 )
  sin16s::return#2 = sin16s::return#4
  return 
  to:@return

unsigned int mulu16_sel(unsigned int v1 , unsigned int v2 , char select)
mulu16_sel: scope:[mulu16_sel]  from sin16s::@10 sin16s::@2 sin16s::@7 sin16s::@8 sin16s::@9
  mulu16_sel::select#6 = phi( sin16s::@10/mulu16_sel::select#4, sin16s::@2/mulu16_sel::select#0, sin16s::@7/mulu16_sel::select#1, sin16s::@8/mulu16_sel::select#2, sin16s::@9/mulu16_sel::select#3 )
  mulu16_sel::v2#5 = phi( sin16s::@10/mulu16_sel::v2#4, sin16s::@2/mulu16_sel::v2#0, sin16s::@7/mulu16_sel::v2#1, sin16s::@8/mulu16_sel::v2#2, sin16s::@9/mulu16_sel::v2#3 )
  mulu16_sel::v1#5 = phi( sin16s::@10/mulu16_sel::v1#4, sin16s::@2/mulu16_sel::v1#0, sin16s::@7/mulu16_sel::v1#1, sin16s::@8/mulu16_sel::v1#2, sin16s::@9/mulu16_sel::v1#3 )
  mul16u::a#0 = mulu16_sel::v1#5
  mul16u::b#0 = mulu16_sel::v2#5
  call mul16u
  mul16u::return#0 = mul16u::return#2
  to:mulu16_sel::@1
mulu16_sel::@1: scope:[mulu16_sel]  from mulu16_sel
  mulu16_sel::select#5 = phi( mulu16_sel/mulu16_sel::select#6 )
  mul16u::return#3 = phi( mulu16_sel/mul16u::return#0 )
  mulu16_sel::$0 = mul16u::return#3
  mulu16_sel::$1 = mulu16_sel::$0 << mulu16_sel::select#5
  mulu16_sel::$2 = word1  mulu16_sel::$1
  mulu16_sel::return#5 = mulu16_sel::$2
  to:mulu16_sel::@return
mulu16_sel::@return: scope:[mulu16_sel]  from mulu16_sel::@1
  mulu16_sel::return#12 = phi( mulu16_sel::@1/mulu16_sel::return#5 )
  mulu16_sel::return#6 = mulu16_sel::return#12
  return 
  to:@return

unsigned int divr16u(unsigned int dividend , unsigned int divisor , unsigned int rem)
divr16u: scope:[divr16u]  from div32u16u div32u16u::@1
  divr16u::divisor#6 = phi( div32u16u/divr16u::divisor#0, div32u16u::@1/divr16u::divisor#1 )
  divr16u::dividend#5 = phi( div32u16u/divr16u::dividend#1, div32u16u::@1/divr16u::dividend#2 )
  divr16u::rem#10 = phi( div32u16u/divr16u::rem#3, div32u16u::@1/divr16u::rem#4 )
  divr16u::quotient#0 = 0
  divr16u::i#0 = 0
  to:divr16u::@1
divr16u::@1: scope:[divr16u]  from divr16u divr16u::@3
  divr16u::i#5 = phi( divr16u/divr16u::i#0, divr16u::@3/divr16u::i#1 )
  divr16u::divisor#4 = phi( divr16u/divr16u::divisor#6, divr16u::@3/divr16u::divisor#7 )
  divr16u::quotient#6 = phi( divr16u/divr16u::quotient#0, divr16u::@3/divr16u::quotient#8 )
  divr16u::dividend#3 = phi( divr16u/divr16u::dividend#5, divr16u::@3/divr16u::dividend#6 )
  divr16u::rem#5 = phi( divr16u/divr16u::rem#10, divr16u::@3/divr16u::rem#11 )
  divr16u::$0 = divr16u::rem#5 << 1
  divr16u::rem#0 = divr16u::$0
  divr16u::$1 = byte1  divr16u::dividend#3
  divr16u::$2 = divr16u::$1 & $80
  divr16u::$3 = divr16u::$2 != 0
  divr16u::$4 = ! divr16u::$3
  if(divr16u::$4) goto divr16u::@2
  to:divr16u::@4
divr16u::@2: scope:[divr16u]  from divr16u::@1 divr16u::@4
  divr16u::i#3 = phi( divr16u::@1/divr16u::i#5, divr16u::@4/divr16u::i#6 )
  divr16u::divisor#2 = phi( divr16u::@1/divr16u::divisor#4, divr16u::@4/divr16u::divisor#5 )
  divr16u::rem#6 = phi( divr16u::@1/divr16u::rem#0, divr16u::@4/divr16u::rem#1 )
  divr16u::quotient#3 = phi( divr16u::@1/divr16u::quotient#6, divr16u::@4/divr16u::quotient#7 )
  divr16u::dividend#4 = phi( divr16u::@1/divr16u::dividend#3, divr16u::@4/divr16u::dividend#7 )
  divr16u::$6 = divr16u::dividend#4 << 1
  divr16u::dividend#0 = divr16u::$6
  divr16u::$7 = divr16u::quotient#3 << 1
  divr16u::quotient#1 = divr16u::$7
  divr16u::$8 = divr16u::rem#6 >= divr16u::divisor#2
  divr16u::$9 = ! divr16u::$8
  if(divr16u::$9) goto divr16u::@3
  to:divr16u::@5
divr16u::@4: scope:[divr16u]  from divr16u::@1
  divr16u::i#6 = phi( divr16u::@1/divr16u::i#5 )
  divr16u::divisor#5 = phi( divr16u::@1/divr16u::divisor#4 )
  divr16u::quotient#7 = phi( divr16u::@1/divr16u::quotient#6 )
  divr16u::dividend#7 = phi( divr16u::@1/divr16u::dividend#3 )
  divr16u::rem#7 = phi( divr16u::@1/divr16u::rem#0 )
  divr16u::$5 = divr16u::rem#7 | 1
  divr16u::rem#1 = divr16u::$5
  to:divr16u::@2
divr16u::@3: scope:[divr16u]  from divr16u::@2 divr16u::@5
  divr16u::divisor#7 = phi( divr16u::@2/divr16u::divisor#2, divr16u::@5/divr16u::divisor#3 )
  divr16u::quotient#8 = phi( divr16u::@2/divr16u::quotient#1, divr16u::@5/divr16u::quotient#2 )
  divr16u::dividend#6 = phi( divr16u::@2/divr16u::dividend#0, divr16u::@5/divr16u::dividend#8 )
  divr16u::rem#11 = phi( divr16u::@2/divr16u::rem#6, divr16u::@5/divr16u::rem#2 )
  divr16u::i#2 = phi( divr16u::@2/divr16u::i#3, divr16u::@5/divr16u::i#4 )
  divr16u::i#1 = divr16u::i#2 + rangenext(0,$f)
  divr16u::$11 = divr16u::i#1 != rangelast(0,$f)
  if(divr16u::$11) goto divr16u::@1
  to:divr16u::@6
divr16u::@5: scope:[divr16u]  from divr16u::@2
  divr16u::dividend#8 = phi( divr16u::@2/divr16u::dividend#0 )
  divr16u::i#4 = phi( divr16u::@2/divr16u::i#3 )
  divr16u::divisor#3 = phi( divr16u::@2/divr16u::divisor#2 )
  divr16u::rem#8 = phi( divr16u::@2/divr16u::rem#6 )
  divr16u::quotient#4 = phi( divr16u::@2/divr16u::quotient#1 )
  divr16u::quotient#2 = ++ divr16u::quotient#4
  divr16u::$10 = divr16u::rem#8 - divr16u::divisor#3
  divr16u::rem#2 = divr16u::$10
  to:divr16u::@3
divr16u::@6: scope:[divr16u]  from divr16u::@3
  divr16u::quotient#5 = phi( divr16u::@3/divr16u::quotient#8 )
  divr16u::rem#9 = phi( divr16u::@3/divr16u::rem#11 )
  rem16u#2 = divr16u::rem#9
  divr16u::return#0 = divr16u::quotient#5
  to:divr16u::@return
divr16u::@return: scope:[divr16u]  from divr16u::@6
  rem16u#14 = phi( divr16u::@6/rem16u#2 )
  divr16u::return#4 = phi( divr16u::@6/divr16u::return#0 )
  divr16u::return#1 = divr16u::return#4
  rem16u#3 = rem16u#14
  return 
  to:@return

unsigned long div32u16u(unsigned long dividend , unsigned int divisor)
div32u16u: scope:[div32u16u]  from sin16s_gen
  rem16u#24 = phi( sin16s_gen/rem16u#22 )
  div32u16u::divisor#1 = phi( sin16s_gen/div32u16u::divisor#0 )
  div32u16u::dividend#1 = phi( sin16s_gen/div32u16u::dividend#0 )
  div32u16u::$0 = word1  div32u16u::dividend#1
  divr16u::dividend#1 = div32u16u::$0
  divr16u::divisor#0 = div32u16u::divisor#1
  divr16u::rem#3 = 0
  call divr16u
  divr16u::return#2 = divr16u::return#1
  to:div32u16u::@1
div32u16u::@1: scope:[div32u16u]  from div32u16u
  div32u16u::divisor#2 = phi( div32u16u/div32u16u::divisor#1 )
  div32u16u::dividend#2 = phi( div32u16u/div32u16u::dividend#1 )
  rem16u#15 = phi( div32u16u/rem16u#3 )
  divr16u::return#5 = phi( div32u16u/divr16u::return#2 )
  div32u16u::quotient_hi#0 = divr16u::return#5
  rem16u#4 = rem16u#15
  div32u16u::$2 = word0  div32u16u::dividend#2
  divr16u::dividend#2 = div32u16u::$2
  divr16u::divisor#1 = div32u16u::divisor#2
  divr16u::rem#4 = rem16u#4
  call divr16u
  divr16u::return#3 = divr16u::return#1
  to:div32u16u::@2
div32u16u::@2: scope:[div32u16u]  from div32u16u::@1
  div32u16u::quotient_hi#1 = phi( div32u16u::@1/div32u16u::quotient_hi#0 )
  rem16u#16 = phi( div32u16u::@1/rem16u#3 )
  divr16u::return#6 = phi( div32u16u::@1/divr16u::return#3 )
  div32u16u::quotient_lo#0 = divr16u::return#6
  rem16u#5 = rem16u#16
  div32u16u::quotient#0 = div32u16u::quotient_hi#1 dw= div32u16u::quotient_lo#0
  div32u16u::return#1 = div32u16u::quotient#0
  to:div32u16u::@return
div32u16u::@return: scope:[div32u16u]  from div32u16u::@2
  rem16u#17 = phi( div32u16u::@2/rem16u#5 )
  div32u16u::return#4 = phi( div32u16u::@2/div32u16u::return#1 )
  div32u16u::return#2 = div32u16u::return#4
  rem16u#6 = rem16u#17
  return 
  to:@return

unsigned long mul16u(unsigned int a , unsigned int b)
mul16u: scope:[mul16u]  from mulu16_sel
  mul16u::a#5 = phi( mulu16_sel/mul16u::a#0 )
  mul16u::b#1 = phi( mulu16_sel/mul16u::b#0 )
  mul16u::res#0 = 0
  mul16u::mb#0 = (unsigned long)mul16u::b#1
  to:mul16u::@1
mul16u::@1: scope:[mul16u]  from mul16u mul16u::@4
  mul16u::mb#5 = phi( mul16u/mul16u::mb#0, mul16u::@4/mul16u::mb#1 )
  mul16u::res#4 = phi( mul16u/mul16u::res#0, mul16u::@4/mul16u::res#6 )
  mul16u::a#2 = phi( mul16u/mul16u::a#5, mul16u::@4/mul16u::a#1 )
  mul16u::$0 = mul16u::a#2 != 0
  if(mul16u::$0) goto mul16u::@2
  to:mul16u::@3
mul16u::@2: scope:[mul16u]  from mul16u::@1
  mul16u::res#5 = phi( mul16u::@1/mul16u::res#4 )
  mul16u::mb#4 = phi( mul16u::@1/mul16u::mb#5 )
  mul16u::a#3 = phi( mul16u::@1/mul16u::a#2 )
  mul16u::$1 = mul16u::a#3 & 1
  mul16u::$2 = mul16u::$1 != 0
  mul16u::$3 = ! mul16u::$2
  if(mul16u::$3) goto mul16u::@4
  to:mul16u::@5
mul16u::@3: scope:[mul16u]  from mul16u::@1
  mul16u::res#2 = phi( mul16u::@1/mul16u::res#4 )
  mul16u::return#1 = mul16u::res#2
  to:mul16u::@return
mul16u::@4: scope:[mul16u]  from mul16u::@2 mul16u::@5
  mul16u::res#6 = phi( mul16u::@2/mul16u::res#5, mul16u::@5/mul16u::res#1 )
  mul16u::mb#2 = phi( mul16u::@2/mul16u::mb#4, mul16u::@5/mul16u::mb#3 )
  mul16u::a#4 = phi( mul16u::@2/mul16u::a#3, mul16u::@5/mul16u::a#6 )
  mul16u::$5 = mul16u::a#4 >> 1
  mul16u::a#1 = mul16u::$5
  mul16u::$6 = mul16u::mb#2 << 1
  mul16u::mb#1 = mul16u::$6
  to:mul16u::@1
mul16u::@5: scope:[mul16u]  from mul16u::@2
  mul16u::a#6 = phi( mul16u::@2/mul16u::a#3 )
  mul16u::mb#3 = phi( mul16u::@2/mul16u::mb#4 )
  mul16u::res#3 = phi( mul16u::@2/mul16u::res#5 )
  mul16u::$4 = mul16u::res#3 + mul16u::mb#3
  mul16u::res#1 = mul16u::$4
  to:mul16u::@4
mul16u::@return: scope:[mul16u]  from mul16u::@3
  mul16u::return#4 = phi( mul16u::@3/mul16u::return#1 )
  mul16u::return#2 = mul16u::return#4
  return 
  to:@return

void print_str(char *str)
print_str: scope:[print_str]  from main::@4 main::@7
  print_char_cursor#58 = phi( main::@4/print_char_cursor#55, main::@7/print_char_cursor#17 )
  print_str::str#6 = phi( main::@4/print_str::str#2, main::@7/print_str::str#1 )
  to:print_str::@1
print_str::@1: scope:[print_str]  from print_str print_str::@3
  print_char_cursor#47 = phi( print_str/print_char_cursor#58, print_str::@3/print_char_cursor#0 )
  print_str::str#3 = phi( print_str/print_str::str#6, print_str::@3/print_str::str#0 )
  print_str::$1 = 0 != *print_str::str#3
  if(print_str::$1) goto print_str::@2
  to:print_str::@return
print_str::@2: scope:[print_str]  from print_str::@1
  print_char_cursor#46 = phi( print_str::@1/print_char_cursor#47 )
  print_str::str#4 = phi( print_str::@1/print_str::str#3 )
  print_char::ch#0 = *print_str::str#4
  call print_char
  to:print_str::@3
print_str::@3: scope:[print_str]  from print_str::@2
  print_str::str#5 = phi( print_str::@2/print_str::str#4 )
  print_char_cursor#24 = phi( print_str::@2/print_char_cursor#13 )
  print_char_cursor#0 = print_char_cursor#24
  print_str::str#0 = ++ print_str::str#5
  to:print_str::@1
print_str::@return: scope:[print_str]  from print_str::@1
  print_char_cursor#25 = phi( print_str::@1/print_char_cursor#47 )
  print_char_cursor#1 = print_char_cursor#25
  return 
  to:@return

void print_sint(int w)
print_sint: scope:[print_sint]  from main::@3
  print_char_cursor#59 = phi( main::@3/print_char_cursor#54 )
  print_sint::w#2 = phi( main::@3/print_sint::w#1 )
  print_sint::$0 = print_sint::w#2 < 0
  if(print_sint::$0) goto print_sint::@1
  to:print_sint::@3
print_sint::@1: scope:[print_sint]  from print_sint
  print_sint::w#5 = phi( print_sint/print_sint::w#2 )
  print_char_cursor#48 = phi( print_sint/print_char_cursor#59 )
  print_char::ch#1 = '-'
  call print_char
  to:print_sint::@4
print_sint::@4: scope:[print_sint]  from print_sint::@1
  print_sint::w#3 = phi( print_sint::@1/print_sint::w#5 )
  print_char_cursor#26 = phi( print_sint::@1/print_char_cursor#13 )
  print_char_cursor#2 = print_char_cursor#26
  print_sint::$4 = - print_sint::w#3
  print_sint::w#0 = print_sint::$4
  to:print_sint::@2
print_sint::@3: scope:[print_sint]  from print_sint
  print_sint::w#7 = phi( print_sint/print_sint::w#2 )
  print_char_cursor#49 = phi( print_sint/print_char_cursor#59 )
  print_char::ch#2 = ' '
  call print_char
  to:print_sint::@5
print_sint::@5: scope:[print_sint]  from print_sint::@3
  print_sint::w#6 = phi( print_sint::@3/print_sint::w#7 )
  print_char_cursor#27 = phi( print_sint::@3/print_char_cursor#13 )
  print_char_cursor#3 = print_char_cursor#27
  to:print_sint::@2
print_sint::@2: scope:[print_sint]  from print_sint::@4 print_sint::@5
  print_char_cursor#50 = phi( print_sint::@4/print_char_cursor#2, print_sint::@5/print_char_cursor#3 )
  print_sint::w#4 = phi( print_sint::@4/print_sint::w#0, print_sint::@5/print_sint::w#6 )
  print_uint::w#0 = (unsigned int)print_sint::w#4
  call print_uint
  to:print_sint::@6
print_sint::@6: scope:[print_sint]  from print_sint::@2
  print_char_cursor#28 = phi( print_sint::@2/print_char_cursor#8 )
  print_char_cursor#4 = print_char_cursor#28
  to:print_sint::@return
print_sint::@return: scope:[print_sint]  from print_sint::@6
  print_char_cursor#29 = phi( print_sint::@6/print_char_cursor#4 )
  print_char_cursor#5 = print_char_cursor#29
  return 
  to:@return

void print_uint(unsigned int w)
print_uint: scope:[print_uint]  from print_sint::@2
  print_char_cursor#51 = phi( print_sint::@2/print_char_cursor#50 )
  print_uint::w#1 = phi( print_sint::@2/print_uint::w#0 )
  print_uint::$0 = byte1  print_uint::w#1
  print_uchar::b#0 = print_uint::$0
  call print_uchar
  to:print_uint::@1
print_uint::@1: scope:[print_uint]  from print_uint
  print_uint::w#2 = phi( print_uint/print_uint::w#1 )
  print_char_cursor#30 = phi( print_uint/print_char_cursor#11 )
  print_char_cursor#6 = print_char_cursor#30
  print_uint::$2 = byte0  print_uint::w#2
  print_uchar::b#1 = print_uint::$2
  call print_uchar
  to:print_uint::@2
print_uint::@2: scope:[print_uint]  from print_uint::@1
  print_char_cursor#31 = phi( print_uint::@1/print_char_cursor#11 )
  print_char_cursor#7 = print_char_cursor#31
  to:print_uint::@return
print_uint::@return: scope:[print_uint]  from print_uint::@2
  print_char_cursor#32 = phi( print_uint::@2/print_char_cursor#7 )
  print_char_cursor#8 = print_char_cursor#32
  return 
  to:@return

void print_uchar(char b)
print_uchar: scope:[print_uchar]  from print_uint print_uint::@1
  print_char_cursor#52 = phi( print_uint/print_char_cursor#51, print_uint::@1/print_char_cursor#6 )
  print_uchar::b#2 = phi( print_uint/print_uchar::b#0, print_uint::@1/print_uchar::b#1 )
  print_uchar::$0 = print_uchar::b#2 >> 4
  print_char::ch#3 = print_hextab[print_uchar::$0]
  call print_char
  to:print_uchar::@1
print_uchar::@1: scope:[print_uchar]  from print_uchar
  print_uchar::b#3 = phi( print_uchar/print_uchar::b#2 )
  print_char_cursor#33 = phi( print_uchar/print_char_cursor#13 )
  print_char_cursor#9 = print_char_cursor#33
  print_uchar::$2 = print_uchar::b#3 & $f
  print_char::ch#4 = print_hextab[print_uchar::$2]
  call print_char
  to:print_uchar::@2
print_uchar::@2: scope:[print_uchar]  from print_uchar::@1
  print_char_cursor#34 = phi( print_uchar::@1/print_char_cursor#13 )
  print_char_cursor#10 = print_char_cursor#34
  to:print_uchar::@return
print_uchar::@return: scope:[print_uchar]  from print_uchar::@2
  print_char_cursor#35 = phi( print_uchar::@2/print_char_cursor#10 )
  print_char_cursor#11 = print_char_cursor#35
  return 
  to:@return

void print_char(char ch)
print_char: scope:[print_char]  from print_sint::@1 print_sint::@3 print_str::@2 print_uchar print_uchar::@1
  print_char_cursor#36 = phi( print_sint::@1/print_char_cursor#48, print_sint::@3/print_char_cursor#49, print_str::@2/print_char_cursor#46, print_uchar/print_char_cursor#52, print_uchar::@1/print_char_cursor#9 )
  print_char::ch#5 = phi( print_sint::@1/print_char::ch#1, print_sint::@3/print_char::ch#2, print_str::@2/print_char::ch#0, print_uchar/print_char::ch#3, print_uchar::@1/print_char::ch#4 )
  *print_char_cursor#36 = print_char::ch#5
  print_char_cursor#12 = ++ print_char_cursor#36
  to:print_char::@return
print_char::@return: scope:[print_char]  from print_char
  print_char_cursor#37 = phi( print_char/print_char_cursor#12 )
  print_char_cursor#13 = print_char_cursor#37
  return 
  to:@return

void print_cls()
print_cls: scope:[print_cls]  from main::@5
  print_screen#2 = phi( main::@5/print_screen#5 )
  memset::str#0 = (void *)print_screen#2
  memset::c#0 = ' '
  memset::num#0 = $3e8
  call memset
  memset::return#0 = memset::return#2
  to:print_cls::@1
print_cls::@1: scope:[print_cls]  from print_cls
  print_screen#3 = phi( print_cls/print_screen#2 )
  print_line_cursor#0 = print_screen#3
  print_char_cursor#14 = print_line_cursor#0
  to:print_cls::@return
print_cls::@return: scope:[print_cls]  from print_cls::@1
  print_char_cursor#38 = phi( print_cls::@1/print_char_cursor#14 )
  print_line_cursor#7 = phi( print_cls::@1/print_line_cursor#0 )
  print_line_cursor#1 = print_line_cursor#7
  print_char_cursor#15 = print_char_cursor#38
  return 
  to:@return

void * memset(void *str , char c , unsigned int num)
memset: scope:[memset]  from print_cls
  memset::c#4 = phi( print_cls/memset::c#0 )
  memset::str#3 = phi( print_cls/memset::str#0 )
  memset::num#1 = phi( print_cls/memset::num#0 )
  memset::$0 = memset::num#1 > 0
  memset::$1 = ! memset::$0
  if(memset::$1) goto memset::@1
  to:memset::@2
memset::@1: scope:[memset]  from memset memset::@3
  memset::str#1 = phi( memset/memset::str#3, memset::@3/memset::str#4 )
  memset::return#1 = memset::str#1
  to:memset::@return
memset::@2: scope:[memset]  from memset
  memset::c#3 = phi( memset/memset::c#4 )
  memset::num#2 = phi( memset/memset::num#1 )
  memset::str#2 = phi( memset/memset::str#3 )
  memset::$4 = (char *)memset::str#2
  memset::end#0 = memset::$4 + memset::num#2
  memset::dst#0 = ((char *)) memset::str#2
  to:memset::@3
memset::@3: scope:[memset]  from memset::@2 memset::@4
  memset::c#2 = phi( memset::@2/memset::c#3, memset::@4/memset::c#1 )
  memset::str#4 = phi( memset::@2/memset::str#2, memset::@4/memset::str#5 )
  memset::end#1 = phi( memset::@2/memset::end#0, memset::@4/memset::end#2 )
  memset::dst#2 = phi( memset::@2/memset::dst#0, memset::@4/memset::dst#1 )
  memset::$3 = memset::dst#2 != memset::end#1
  if(memset::$3) goto memset::@4
  to:memset::@1
memset::@4: scope:[memset]  from memset::@3
  memset::str#5 = phi( memset::@3/memset::str#4 )
  memset::end#2 = phi( memset::@3/memset::end#1 )
  memset::dst#3 = phi( memset::@3/memset::dst#2 )
  memset::c#1 = phi( memset::@3/memset::c#2 )
  *memset::dst#3 = memset::c#1
  memset::dst#1 = ++ memset::dst#3
  to:memset::@3
memset::@return: scope:[memset]  from memset::@1
  memset::return#3 = phi( memset::@1/memset::return#1 )
  memset::return#2 = memset::return#3
  return 
  to:@return

void main()
main: scope:[main]  from __start::@1
  print_char_cursor#60 = phi( __start::@1/print_char_cursor#57 )
  print_line_cursor#15 = phi( __start::@1/print_line_cursor#14 )
  print_screen#7 = phi( __start::@1/print_screen#8 )
  rem16u#25 = phi( __start::@1/rem16u#27 )
  sin16s_gen::sintab#1 = main::sintab1
  sin16s_gen::wavelength#0 = main::wavelength
  call sin16s_gen
  to:main::@5
main::@5: scope:[main]  from main
  print_char_cursor#53 = phi( main/print_char_cursor#60 )
  print_line_cursor#12 = phi( main/print_line_cursor#15 )
  print_screen#5 = phi( main/print_screen#7 )
  rem16u#18 = phi( main/rem16u#1 )
  rem16u#7 = rem16u#18
  call print_cls
  to:main::@6
main::@6: scope:[main]  from main::@5
  rem16u#29 = phi( main::@5/rem16u#7 )
  print_char_cursor#39 = phi( main::@5/print_char_cursor#15 )
  print_line_cursor#8 = phi( main::@5/print_line_cursor#1 )
  print_line_cursor#2 = print_line_cursor#8
  print_char_cursor#16 = print_char_cursor#39
  main::st1#0 = main::sintab1
  to:main::@1
main::@1: scope:[main]  from main::@6 main::@8
  print_char_cursor#56 = phi( main::@6/print_char_cursor#16, main::@8/print_char_cursor#18 )
  print_line_cursor#13 = phi( main::@6/print_line_cursor#2, main::@8/print_line_cursor#16 )
  rem16u#26 = phi( main::@6/rem16u#29, main::@8/rem16u#30 )
  main::st1#2 = phi( main::@6/main::st1#0, main::@8/main::st1#1 )
  main::$9 = main::wavelength * SIZEOF_INT
  main::$2 = main::sintab1 + main::$9
  main::$3 = main::st1#2 < main::$2
  if(main::$3) goto main::@2
  to:main::@return
main::@2: scope:[main]  from main::@1
  print_line_cursor#19 = phi( main::@1/print_line_cursor#13 )
  rem16u#34 = phi( main::@1/rem16u#26 )
  print_char_cursor#61 = phi( main::@1/print_char_cursor#56 )
  main::st1#3 = phi( main::@1/main::st1#2 )
  main::sw#0 = *main::st1#3
  main::$4 = main::sw#0 >= 0
  main::$5 = ! main::$4
  if(main::$5) goto main::@3
  to:main::@4
main::@3: scope:[main]  from main::@2 main::@9
  print_line_cursor#18 = phi( main::@2/print_line_cursor#19, main::@9/print_line_cursor#20 )
  rem16u#33 = phi( main::@2/rem16u#34, main::@9/rem16u#35 )
  main::st1#6 = phi( main::@2/main::st1#3, main::@9/main::st1#7 )
  print_char_cursor#54 = phi( main::@2/print_char_cursor#61, main::@9/print_char_cursor#19 )
  main::sw#1 = phi( main::@2/main::sw#0, main::@9/main::sw#2 )
  print_sint::w#1 = main::sw#1
  call print_sint
  to:main::@7
main::@7: scope:[main]  from main::@3
  print_line_cursor#17 = phi( main::@3/print_line_cursor#18 )
  rem16u#32 = phi( main::@3/rem16u#33 )
  main::st1#5 = phi( main::@3/main::st1#6 )
  print_char_cursor#40 = phi( main::@3/print_char_cursor#5 )
  print_char_cursor#17 = print_char_cursor#40
  print_str::str#1 = main::str
  call print_str
  to:main::@8
main::@8: scope:[main]  from main::@7
  print_line_cursor#16 = phi( main::@7/print_line_cursor#17 )
  rem16u#30 = phi( main::@7/rem16u#32 )
  main::st1#4 = phi( main::@7/main::st1#5 )
  print_char_cursor#41 = phi( main::@7/print_char_cursor#1 )
  print_char_cursor#18 = print_char_cursor#41
  main::st1#1 = main::st1#4 + SIZEOF_INT
  to:main::@1
main::@4: scope:[main]  from main::@2
  print_line_cursor#21 = phi( main::@2/print_line_cursor#19 )
  rem16u#36 = phi( main::@2/rem16u#34 )
  main::st1#8 = phi( main::@2/main::st1#3 )
  main::sw#3 = phi( main::@2/main::sw#0 )
  print_char_cursor#55 = phi( main::@2/print_char_cursor#61 )
  print_str::str#2 = main::str1
  call print_str
  to:main::@9
main::@9: scope:[main]  from main::@4
  print_line_cursor#20 = phi( main::@4/print_line_cursor#21 )
  rem16u#35 = phi( main::@4/rem16u#36 )
  main::st1#7 = phi( main::@4/main::st1#8 )
  main::sw#2 = phi( main::@4/main::sw#3 )
  print_char_cursor#42 = phi( main::@4/print_char_cursor#1 )
  print_char_cursor#19 = print_char_cursor#42
  to:main::@3
main::@return: scope:[main]  from main::@1
  print_char_cursor#43 = phi( main::@1/print_char_cursor#56 )
  print_line_cursor#9 = phi( main::@1/print_line_cursor#13 )
  rem16u#19 = phi( main::@1/rem16u#26 )
  rem16u#8 = rem16u#19
  print_line_cursor#3 = print_line_cursor#9
  print_char_cursor#20 = print_char_cursor#43
  return 
  to:@return

void __start()
__start: scope:[__start]  from
  to:__start::__init1
__start::__init1: scope:[__start]  from __start
  rem16u#9 = 0
  print_screen#0 = (char *)$400
  print_line_cursor#4 = print_screen#0
  print_char_cursor#21 = print_line_cursor#4
  to:__start::@1
__start::@1: scope:[__start]  from __start::__init1
  print_screen#8 = phi( __start::__init1/print_screen#0 )
  print_char_cursor#57 = phi( __start::__init1/print_char_cursor#21 )
  print_line_cursor#14 = phi( __start::__init1/print_line_cursor#4 )
  rem16u#27 = phi( __start::__init1/rem16u#9 )
  call main
  to:__start::@2
__start::@2: scope:[__start]  from __start::@1
  print_screen#6 = phi( __start::@1/print_screen#8 )
  print_char_cursor#44 = phi( __start::@1/print_char_cursor#20 )
  print_line_cursor#10 = phi( __start::@1/print_line_cursor#3 )
  rem16u#20 = phi( __start::@1/rem16u#8 )
  rem16u#10 = rem16u#20
  print_line_cursor#5 = print_line_cursor#10
  print_char_cursor#22 = print_char_cursor#44
  to:__start::@return
__start::@return: scope:[__start]  from __start::@2
  print_char_cursor#45 = phi( __start::@2/print_char_cursor#22 )
  print_line_cursor#11 = phi( __start::@2/print_line_cursor#5 )
  print_screen#4 = phi( __start::@2/print_screen#6 )
  rem16u#21 = phi( __start::@2/rem16u#10 )
  rem16u#11 = rem16u#21
  print_screen#1 = print_screen#4
  print_line_cursor#6 = print_line_cursor#11
  print_char_cursor#23 = print_char_cursor#45
  return 
  to:@return

SYMBOL TABLE SSA
__constant const unsigned long PI2_u4f28 = $6487ed51
__constant const unsigned long PI_HALF_u4f28 = $1921fb54
__constant const unsigned long PI_u4f28 = $3243f6a9
__constant char RADIX::BINARY = 2
__constant char RADIX::DECIMAL = $a
__constant char RADIX::HEXADECIMAL = $10
__constant char RADIX::OCTAL = 8
__constant char SIZEOF_INT = 2
void __start()
unsigned long div32u16u(unsigned long dividend , unsigned int divisor)
unsigned int div32u16u::$0
unsigned int div32u16u::$2
unsigned long div32u16u::dividend
unsigned long div32u16u::dividend#0
unsigned long div32u16u::dividend#1
unsigned long div32u16u::dividend#2
unsigned int div32u16u::divisor
unsigned int div32u16u::divisor#0
unsigned int div32u16u::divisor#1
unsigned int div32u16u::divisor#2
unsigned long div32u16u::quotient
unsigned long div32u16u::quotient#0
unsigned int div32u16u::quotient_hi
unsigned int div32u16u::quotient_hi#0
unsigned int div32u16u::quotient_hi#1
unsigned int div32u16u::quotient_lo
unsigned int div32u16u::quotient_lo#0
unsigned long div32u16u::return
unsigned long div32u16u::return#0
unsigned long div32u16u::return#1
unsigned long div32u16u::return#2
unsigned long div32u16u::return#3
unsigned long div32u16u::return#4
unsigned int divr16u(unsigned int dividend , unsigned int divisor , unsigned int rem)
unsigned int divr16u::$0
char divr16u::$1
unsigned int divr16u::$10
bool divr16u::$11
number divr16u::$2
bool divr16u::$3
bool divr16u::$4
number divr16u::$5
unsigned int divr16u::$6
unsigned int divr16u::$7
bool divr16u::$8
bool divr16u::$9
unsigned int divr16u::dividend
unsigned int divr16u::dividend#0
unsigned int divr16u::dividend#1
unsigned int divr16u::dividend#2
unsigned int divr16u::dividend#3
unsigned int divr16u::dividend#4
unsigned int divr16u::dividend#5
unsigned int divr16u::dividend#6
unsigned int divr16u::dividend#7
unsigned int divr16u::dividend#8
unsigned int divr16u::divisor
unsigned int divr16u::divisor#0
unsigned int divr16u::divisor#1
unsigned int divr16u::divisor#2
unsigned int divr16u::divisor#3
unsigned int divr16u::divisor#4
unsigned int divr16u::divisor#5
unsigned int divr16u::divisor#6
unsigned int divr16u::divisor#7
char divr16u::i
char divr16u::i#0
char divr16u::i#1
char divr16u::i#2
char divr16u::i#3
char divr16u::i#4
char divr16u::i#5
char divr16u::i#6
unsigned int divr16u::quotient
unsigned int divr16u::quotient#0
unsigned int divr16u::quotient#1
unsigned int divr16u::quotient#2
unsigned int divr16u::quotient#3
unsigned int divr16u::quotient#4
unsigned int divr16u::quotient#5
unsigned int divr16u::quotient#6
unsigned int divr16u::quotient#7
unsigned int divr16u::quotient#8
unsigned int divr16u::rem
unsigned int divr16u::rem#0
unsigned int divr16u::rem#1
unsigned int divr16u::rem#10
unsigned int divr16u::rem#11
unsigned int divr16u::rem#2
unsigned int divr16u::rem#3
unsigned int divr16u::rem#4
unsigned int divr16u::rem#5
unsigned int divr16u::rem#6
unsigned int divr16u::rem#7
unsigned int divr16u::rem#8
unsigned int divr16u::rem#9
unsigned int divr16u::return
unsigned int divr16u::return#0
unsigned int divr16u::return#1
unsigned int divr16u::return#2
unsigned int divr16u::return#3
unsigned int divr16u::return#4
unsigned int divr16u::return#5
unsigned int divr16u::return#6
void main()
int *main::$2
bool main::$3
bool main::$4
bool main::$5
unsigned int main::$9
__constant int main::sintab1[$78] = { fill( $78, 0) }
int *main::st1
int *main::st1#0
int *main::st1#1
int *main::st1#2
int *main::st1#3
int *main::st1#4
int *main::st1#5
int *main::st1#6
int *main::st1#7
int *main::st1#8
__constant char main::str[4] = "   "
__constant char main::str1[2] = " "
int main::sw
int main::sw#0
int main::sw#1
int main::sw#2
int main::sw#3
__constant unsigned int main::wavelength = $78
void * memset(void *str , char c , unsigned int num)
bool memset::$0
bool memset::$1
bool memset::$3
char *memset::$4
char memset::c
char memset::c#0
char memset::c#1
char memset::c#2
char memset::c#3
char memset::c#4
char *memset::dst
char *memset::dst#0
char *memset::dst#1
char *memset::dst#2
char *memset::dst#3
char *memset::end
char *memset::end#0
char *memset::end#1
char *memset::end#2
unsigned int memset::num
unsigned int memset::num#0
unsigned int memset::num#1
unsigned int memset::num#2
void *memset::return
void *memset::return#0
void *memset::return#1
void *memset::return#2
void *memset::return#3
void *memset::str
void *memset::str#0
void *memset::str#1
void *memset::str#2
void *memset::str#3
void *memset::str#4
void *memset::str#5
unsigned long mul16u(unsigned int a , unsigned int b)
bool mul16u::$0
number mul16u::$1
bool mul16u::$2
bool mul16u::$3
unsigned long mul16u::$4
unsigned int mul16u::$5
unsigned long mul16u::$6
unsigned int mul16u::a
unsigned int mul16u::a#0
unsigned int mul16u::a#1
unsigned int mul16u::a#2
unsigned int mul16u::a#3
unsigned int mul16u::a#4
unsigned int mul16u::a#5
unsigned int mul16u::a#6
unsigned int mul16u::b
unsigned int mul16u::b#0
unsigned int mul16u::b#1
unsigned long mul16u::mb
unsigned long mul16u::mb#0
unsigned long mul16u::mb#1
unsigned long mul16u::mb#2
unsigned long mul16u::mb#3
unsigned long mul16u::mb#4
unsigned long mul16u::mb#5
unsigned long mul16u::res
unsigned long mul16u::res#0
unsigned long mul16u::res#1
unsigned long mul16u::res#2
unsigned long mul16u::res#3
unsigned long mul16u::res#4
unsigned long mul16u::res#5
unsigned long mul16u::res#6
unsigned long mul16u::return
unsigned long mul16u::return#0
unsigned long mul16u::return#1
unsigned long mul16u::return#2
unsigned long mul16u::return#3
unsigned long mul16u::return#4
unsigned int mulu16_sel(unsigned int v1 , unsigned int v2 , char select)
unsigned long mulu16_sel::$0
unsigned long mulu16_sel::$1
unsigned int mulu16_sel::$2
unsigned int mulu16_sel::return
unsigned int mulu16_sel::return#0
unsigned int mulu16_sel::return#1
unsigned int mulu16_sel::return#10
unsigned int mulu16_sel::return#11
unsigned int mulu16_sel::return#12
unsigned int mulu16_sel::return#2
unsigned int mulu16_sel::return#3
unsigned int mulu16_sel::return#4
unsigned int mulu16_sel::return#5
unsigned int mulu16_sel::return#6
unsigned int mulu16_sel::return#7
unsigned int mulu16_sel::return#8
unsigned int mulu16_sel::return#9
char mulu16_sel::select
char mulu16_sel::select#0
char mulu16_sel::select#1
char mulu16_sel::select#2
char mulu16_sel::select#3
char mulu16_sel::select#4
char mulu16_sel::select#5
char mulu16_sel::select#6
unsigned int mulu16_sel::v1
unsigned int mulu16_sel::v1#0
unsigned int mulu16_sel::v1#1
unsigned int mulu16_sel::v1#2
unsigned int mulu16_sel::v1#3
unsigned int mulu16_sel::v1#4
unsigned int mulu16_sel::v1#5
unsigned int mulu16_sel::v2
unsigned int mulu16_sel::v2#0
unsigned int mulu16_sel::v2#1
unsigned int mulu16_sel::v2#2
unsigned int mulu16_sel::v2#3
unsigned int mulu16_sel::v2#4
unsigned int mulu16_sel::v2#5
void print_char(char ch)
char print_char::ch
char print_char::ch#0
char print_char::ch#1
char print_char::ch#2
char print_char::ch#3
char print_char::ch#4
char print_char::ch#5
char *print_char_cursor
char *print_char_cursor#0
char *print_char_cursor#1
char *print_char_cursor#10
char *print_char_cursor#11
char *print_char_cursor#12
char *print_char_cursor#13
char *print_char_cursor#14
char *print_char_cursor#15
char *print_char_cursor#16
char *print_char_cursor#17
char *print_char_cursor#18
char *print_char_cursor#19
char *print_char_cursor#2
char *print_char_cursor#20
char *print_char_cursor#21
char *print_char_cursor#22
char *print_char_cursor#23
char *print_char_cursor#24
char *print_char_cursor#25
char *print_char_cursor#26
char *print_char_cursor#27
char *print_char_cursor#28
char *print_char_cursor#29
char *print_char_cursor#3
char *print_char_cursor#30
char *print_char_cursor#31
char *print_char_cursor#32
char *print_char_cursor#33
char *print_char_cursor#34
char *print_char_cursor#35
char *print_char_cursor#36
char *print_char_cursor#37
char *print_char_cursor#38
char *print_char_cursor#39
char *print_char_cursor#4
char *print_char_cursor#40
char *print_char_cursor#41
char *print_char_cursor#42
char *print_char_cursor#43
char *print_char_cursor#44
char *print_char_cursor#45
char *print_char_cursor#46
char *print_char_cursor#47
char *print_char_cursor#48
char *print_char_cursor#49
char *print_char_cursor#5
char *print_char_cursor#50
char *print_char_cursor#51
char *print_char_cursor#52
char *print_char_cursor#53
char *print_char_cursor#54
char *print_char_cursor#55
char *print_char_cursor#56
char *print_char_cursor#57
char *print_char_cursor#58
char *print_char_cursor#59
char *print_char_cursor#6
char *print_char_cursor#60
char *print_char_cursor#61
char *print_char_cursor#7
char *print_char_cursor#8
char *print_char_cursor#9
void print_cls()
__constant const char print_hextab[] = "0123456789abcdef"z
char *print_line_cursor
char *print_line_cursor#0
char *print_line_cursor#1
char *print_line_cursor#10
char *print_line_cursor#11
char *print_line_cursor#12
char *print_line_cursor#13
char *print_line_cursor#14
char *print_line_cursor#15
char *print_line_cursor#16
char *print_line_cursor#17
char *print_line_cursor#18
char *print_line_cursor#19
char *print_line_cursor#2
char *print_line_cursor#20
char *print_line_cursor#21
char *print_line_cursor#3
char *print_line_cursor#4
char *print_line_cursor#5
char *print_line_cursor#6
char *print_line_cursor#7
char *print_line_cursor#8
char *print_line_cursor#9
char *print_screen
char *print_screen#0
char *print_screen#1
char *print_screen#2
char *print_screen#3
char *print_screen#4
char *print_screen#5
char *print_screen#6
char *print_screen#7
char *print_screen#8
void print_sint(int w)
bool print_sint::$0
int print_sint::$4
int print_sint::w
int print_sint::w#0
int print_sint::w#1
int print_sint::w#2
int print_sint::w#3
int print_sint::w#4
int print_sint::w#5
int print_sint::w#6
int print_sint::w#7
void print_str(char *str)
bool print_str::$1
char *print_str::str
char *print_str::str#0
char *print_str::str#1
char *print_str::str#2
char *print_str::str#3
char *print_str::str#4
char *print_str::str#5
char *print_str::str#6
void print_uchar(char b)
char print_uchar::$0
number print_uchar::$2
char print_uchar::b
char print_uchar::b#0
char print_uchar::b#1
char print_uchar::b#2
char print_uchar::b#3
void print_uint(unsigned int w)
char print_uint::$0
char print_uint::$2
unsigned int print_uint::w
unsigned int print_uint::w#0
unsigned int print_uint::w#1
unsigned int print_uint::w#2
unsigned int rem16u
unsigned int rem16u#0
unsigned int rem16u#1
unsigned int rem16u#10
unsigned int rem16u#11
unsigned int rem16u#12
unsigned int rem16u#13
unsigned int rem16u#14
unsigned int rem16u#15
unsigned int rem16u#16
unsigned int rem16u#17
unsigned int rem16u#18
unsigned int rem16u#19
unsigned int rem16u#2
unsigned int rem16u#20
unsigned int rem16u#21
unsigned int rem16u#22
unsigned int rem16u#23
unsigned int rem16u#24
unsigned int rem16u#25
unsigned int rem16u#26
unsigned int rem16u#27
unsigned int rem16u#28
unsigned int rem16u#29
unsigned int rem16u#3
unsigned int rem16u#30
unsigned int rem16u#31
unsigned int rem16u#32
unsigned int rem16u#33
unsigned int rem16u#34
unsigned int rem16u#35
unsigned int rem16u#36
unsigned int rem16u#4
unsigned int rem16u#5
unsigned int rem16u#6
unsigned int rem16u#7
unsigned int rem16u#8
unsigned int rem16u#9
int sin16s(unsigned long x)
bool sin16s::$0
bool sin16s::$1
unsigned int sin16s::$13
bool sin16s::$14
bool sin16s::$15
unsigned long sin16s::$16
unsigned long sin16s::$17
int sin16s::$18
bool sin16s::$2
bool sin16s::$3
unsigned long sin16s::$4
char sin16s::isUpper
char sin16s::isUpper#0
char sin16s::isUpper#1
char sin16s::isUpper#2
char sin16s::isUpper#3
char sin16s::isUpper#4
char sin16s::isUpper#5
char sin16s::isUpper#6
char sin16s::isUpper#7
char sin16s::isUpper#8
char sin16s::isUpper#9
int sin16s::return
int sin16s::return#0
int sin16s::return#1
int sin16s::return#2
int sin16s::return#3
int sin16s::return#4
int sin16s::sinx
int sin16s::sinx#0
int sin16s::sinx#1
int sin16s::sinx#2
unsigned int sin16s::usinx
unsigned int sin16s::usinx#0
unsigned int sin16s::usinx#1
unsigned int sin16s::usinx#2
unsigned int sin16s::usinx#3
unsigned int sin16s::usinx#4
unsigned long sin16s::x
unsigned long sin16s::x#0
unsigned long sin16s::x#1
unsigned long sin16s::x#2
unsigned long sin16s::x#3
unsigned long sin16s::x#4
unsigned long sin16s::x#5
unsigned long sin16s::x#6
unsigned long sin16s::x#7
unsigned int sin16s::x1
unsigned int sin16s::x1#0
unsigned int sin16s::x1#1
unsigned int sin16s::x1#2
unsigned int sin16s::x1#3
unsigned int sin16s::x1#4
unsigned int sin16s::x2
unsigned int sin16s::x2#0
unsigned int sin16s::x3
unsigned int sin16s::x3#0
unsigned int sin16s::x3#1
unsigned int sin16s::x3_6
unsigned int sin16s::x3_6#0
unsigned int sin16s::x4
unsigned int sin16s::x4#0
unsigned int sin16s::x5
unsigned int sin16s::x5#0
unsigned int sin16s::x5_128
unsigned int sin16s::x5_128#0
void sin16s_gen(int *sintab , unsigned int wavelength)
bool sin16s_gen::$1
int sin16s_gen::$2
unsigned long sin16s_gen::$3
unsigned int sin16s_gen::i
unsigned int sin16s_gen::i#0
unsigned int sin16s_gen::i#1
unsigned int sin16s_gen::i#2
unsigned int sin16s_gen::i#3
unsigned int sin16s_gen::i#4
int *sin16s_gen::sintab
int *sin16s_gen::sintab#0
int *sin16s_gen::sintab#1
int *sin16s_gen::sintab#2
int *sin16s_gen::sintab#3
int *sin16s_gen::sintab#4
int *sin16s_gen::sintab#5
int *sin16s_gen::sintab#6
unsigned long sin16s_gen::step
unsigned long sin16s_gen::step#0
unsigned long sin16s_gen::step#1
unsigned long sin16s_gen::step#2
unsigned long sin16s_gen::step#3
unsigned int sin16s_gen::wavelength
unsigned int sin16s_gen::wavelength#0
unsigned int sin16s_gen::wavelength#1
unsigned int sin16s_gen::wavelength#2
unsigned int sin16s_gen::wavelength#3
unsigned int sin16s_gen::wavelength#4
unsigned int sin16s_gen::wavelength#5
unsigned long sin16s_gen::x
unsigned long sin16s_gen::x#0
unsigned long sin16s_gen::x#1
unsigned long sin16s_gen::x#2
unsigned long sin16s_gen::x#3
unsigned long sin16s_gen::x#4

Adding number conversion cast (unumber) 1 in sin16s::isUpper#1 = 1
Adding number conversion cast (unumber) 3 in sin16s::$4 = sin16s::x#6 << 3
Adding number conversion cast (unumber) 0 in mulu16_sel::select#0 = 0
Adding number conversion cast (unumber) 1 in mulu16_sel::select#1 = 1
Adding number conversion cast (unumber) $10000/6 in mulu16_sel::v2#2 = $10000/6
Adding number conversion cast (unumber) 1 in mulu16_sel::select#2 = 1
Adding number conversion cast (unumber) 0 in mulu16_sel::select#3 = 0
Adding number conversion cast (unumber) 0 in mulu16_sel::select#4 = 0
Adding number conversion cast (unumber) 4 in sin16s::x5_128#0 = sin16s::x5#0 >> 4
Adding number conversion cast (unumber) 0 in sin16s::$14 = sin16s::isUpper#2 != 0
Adding number conversion cast (unumber) 1 in divr16u::$0 = divr16u::rem#5 << 1
Adding number conversion cast (unumber) $80 in divr16u::$2 = divr16u::$1 & $80
Adding number conversion cast (unumber) divr16u::$2 in divr16u::$2 = divr16u::$1 & (unumber)$80
Adding number conversion cast (unumber) 0 in divr16u::$3 = divr16u::$2 != 0
Adding number conversion cast (unumber) 1 in divr16u::$6 = divr16u::dividend#4 << 1
Adding number conversion cast (unumber) 1 in divr16u::$7 = divr16u::quotient#3 << 1
Adding number conversion cast (unumber) 1 in divr16u::$5 = divr16u::rem#7 | 1
Adding number conversion cast (unumber) divr16u::$5 in divr16u::$5 = divr16u::rem#7 | (unumber)1
Adding number conversion cast (unumber) 0 in divr16u::rem#3 = 0
Adding number conversion cast (unumber) 0 in mul16u::$0 = mul16u::a#2 != 0
Adding number conversion cast (unumber) 1 in mul16u::$1 = mul16u::a#3 & 1
Adding number conversion cast (unumber) mul16u::$1 in mul16u::$1 = mul16u::a#3 & (unumber)1
Adding number conversion cast (unumber) 0 in mul16u::$2 = mul16u::$1 != 0
Adding number conversion cast (unumber) 1 in mul16u::$5 = mul16u::a#4 >> 1
Adding number conversion cast (unumber) 1 in mul16u::$6 = mul16u::mb#2 << 1
Adding number conversion cast (unumber) 0 in print_str::$1 = 0 != *print_str::str#3
Adding number conversion cast (snumber) 0 in print_sint::$0 = print_sint::w#2 < 0
Adding number conversion cast (unumber) 4 in print_uchar::$0 = print_uchar::b#2 >> 4
Adding number conversion cast (unumber) $f in print_uchar::$2 = print_uchar::b#3 & $f
Adding number conversion cast (unumber) print_uchar::$2 in print_uchar::$2 = print_uchar::b#3 & (unumber)$f
Adding number conversion cast (unumber) $3e8 in memset::num#0 = $3e8
Adding number conversion cast (unumber) 0 in memset::$0 = memset::num#1 > 0
Adding number conversion cast (snumber) 0 in main::$4 = main::sw#0 >= 0
Successful SSA optimization PassNAddNumberTypeConversions
Inlining cast sin16s::isUpper#1 = (unumber)1
Inlining cast mulu16_sel::select#0 = (unumber)0
Inlining cast mulu16_sel::select#1 = (unumber)1
Inlining cast mulu16_sel::v2#2 = (unumber)$10000/6
Inlining cast mulu16_sel::select#2 = (unumber)1
Inlining cast mulu16_sel::select#3 = (unumber)0
Inlining cast mulu16_sel::select#4 = (unumber)0
Inlining cast divr16u::rem#3 = (unumber)0
Inlining cast memset::num#0 = (unumber)$3e8
Inlining cast memset::dst#0 = (char *)memset::str#2
Successful SSA optimization Pass2InlineCast
Simplifying constant integer cast 1
Simplifying constant integer cast 3
Simplifying constant integer cast 0
Simplifying constant integer cast 1
Simplifying constant integer cast 1
Simplifying constant integer cast 0
Simplifying constant integer cast 0
Simplifying constant integer cast 4
Simplifying constant integer cast 0
Simplifying constant integer cast 1
Simplifying constant integer cast $80
Simplifying constant integer cast 0
Simplifying constant integer cast 1
Simplifying constant integer cast 1
Simplifying constant integer cast 1
Simplifying constant integer cast 0
Simplifying constant integer cast 0
Simplifying constant integer cast 1
Simplifying constant integer cast 0
Simplifying constant integer cast 1
Simplifying constant integer cast 1
Simplifying constant integer cast 0
Simplifying constant integer cast 0
Simplifying constant integer cast 4
Simplifying constant integer cast $f
Simplifying constant integer cast $3e8
Simplifying constant integer cast 0
Simplifying constant integer cast 0
Simplifying constant pointer cast (char *) 1024
Successful SSA optimization PassNCastSimplification
Finalized unsigned number type (char) 1
Finalized unsigned number type (char) 3
Finalized unsigned number type (char) 0
Finalized unsigned number type (char) 1
Finalized unsigned number type (char) 1
Finalized unsigned number type (char) 0
Finalized unsigned number type (char) 0
Finalized unsigned number type (char) 4
Finalized unsigned number type (char) 0
Finalized unsigned number type (char) 1
Finalized unsigned number type (char) $80
Finalized unsigned number type (char) 0
Finalized unsigned number type (char) 1
Finalized unsigned number type (char) 1
Finalized unsigned number type (char) 1
Finalized unsigned number type (char) 0
Finalized unsigned number type (char) 0
Finalized unsigned number type (char) 1
Finalized unsigned number type (char) 0
Finalized unsigned number type (char) 1
Finalized unsigned number type (char) 1
Finalized unsigned number type (char) 0
Finalized signed number type (signed char) 0
Finalized unsigned number type (char) 4
Finalized unsigned number type (char) $f
Finalized unsigned number type (unsigned int) $3e8
Finalized unsigned number type (char) 0
Finalized signed number type (signed char) 0
Successful SSA optimization PassNFinalizeNumberTypeConversions
Inferred type updated to char in divr16u::$2 = divr16u::$1 & $80
Inferred type updated to unsigned int in divr16u::$5 = divr16u::rem#7 | 1
Inferred type updated to char in mul16u::$1 = mul16u::a#3 & 1
Inferred type updated to char in print_uchar::$2 = print_uchar::b#3 & $f
Inversing boolean not [30] sin16s::$1 = sin16s::x#3 < PI_u4f28 from [29] sin16s::$0 = sin16s::x#3 >= PI_u4f28
Inversing boolean not [34] sin16s::$3 = sin16s::x#4 < PI_HALF_u4f28 from [33] sin16s::$2 = sin16s::x#4 >= PI_HALF_u4f28
Inversing boolean not [84] sin16s::$15 = sin16s::isUpper#2 == 0 from [83] sin16s::$14 = sin16s::isUpper#2 != 0
Inversing boolean not [119] divr16u::$4 = divr16u::$2 == 0 from [118] divr16u::$3 = divr16u::$2 != 0
Inversing boolean not [127] divr16u::$9 = divr16u::rem#6 < divr16u::divisor#2 from [126] divr16u::$8 = divr16u::rem#6 >= divr16u::divisor#2
Inversing boolean not [181] mul16u::$3 = mul16u::$1 == 0 from [180] mul16u::$2 = mul16u::$1 != 0
Inversing boolean not [281] memset::$1 = memset::num#1 <= 0 from [280] memset::$0 = memset::num#1 > 0
Inversing boolean not [317] main::$5 = main::sw#0 < 0 from [316] main::$4 = main::sw#0 >= 0
Successful SSA optimization Pass2UnaryNotSimplification
Alias div32u16u::return#0 = div32u16u::return#3 
Alias sin16s_gen::wavelength#1 = sin16s_gen::wavelength#3 
Alias sin16s_gen::sintab#5 = sin16s_gen::sintab#6 
Alias rem16u#0 = rem16u#12 
Alias sin16s_gen::x#2 = sin16s_gen::x#4 sin16s_gen::x#3 
Alias sin16s_gen::sintab#2 = sin16s_gen::sintab#3 sin16s_gen::sintab#4 
Alias sin16s_gen::step#1 = sin16s_gen::step#2 sin16s_gen::step#3 
Alias sin16s_gen::i#2 = sin16s_gen::i#4 sin16s_gen::i#3 
Alias sin16s_gen::wavelength#2 = sin16s_gen::wavelength#5 sin16s_gen::wavelength#4 
Alias rem16u#1 = rem16u#31 rem16u#23 rem16u#28 rem16u#13 
Alias sin16s::return#0 = sin16s::return#3 
Alias sin16s_gen::x#1 = sin16s_gen::$3 
Alias sin16s::x#3 = sin16s::x#5 
Alias sin16s::x#1 = sin16s::$16 
Alias mulu16_sel::return#0 = mulu16_sel::return#7 
Alias sin16s::x1#0 = sin16s::x1#1 sin16s::x1#4 sin16s::x1#2 sin16s::x1#3 
Alias sin16s::isUpper#2 = sin16s::isUpper#6 sin16s::isUpper#7 sin16s::isUpper#5 sin16s::isUpper#4 sin16s::isUpper#3 
Alias mulu16_sel::return#1 = mulu16_sel::return#8 
Alias mulu16_sel::return#2 = mulu16_sel::return#9 
Alias sin16s::x3#0 = sin16s::x3#1 
Alias mulu16_sel::return#10 = mulu16_sel::return#3 
Alias sin16s::usinx#0 = sin16s::usinx#4 sin16s::usinx#2 
Alias mulu16_sel::return#11 = mulu16_sel::return#4 
Alias sin16s::usinx#1 = sin16s::$13 sin16s::usinx#3 
Alias sin16s::x#4 = sin16s::x#7 
Alias sin16s::isUpper#8 = sin16s::isUpper#9 
Alias sin16s::x#2 = sin16s::$17 
Alias sin16s::return#1 = sin16s::sinx#2 sin16s::return#4 sin16s::return#2 
Alias sin16s::sinx#1 = sin16s::$18 
Alias mul16u::return#0 = mul16u::return#3 
Alias mulu16_sel::select#5 = mulu16_sel::select#6 
Alias mulu16_sel::return#12 = mulu16_sel::return#5 mulu16_sel::$2 mulu16_sel::return#6 
Alias divr16u::rem#0 = divr16u::$0 divr16u::rem#7 
Alias divr16u::dividend#0 = divr16u::$6 divr16u::dividend#8 
Alias divr16u::quotient#1 = divr16u::$7 divr16u::quotient#4 
Alias divr16u::dividend#3 = divr16u::dividend#7 
Alias divr16u::quotient#6 = divr16u::quotient#7 
Alias divr16u::divisor#4 = divr16u::divisor#5 
Alias divr16u::i#5 = divr16u::i#6 
Alias divr16u::rem#1 = divr16u::$5 
Alias divr16u::rem#6 = divr16u::rem#8 
Alias divr16u::divisor#2 = divr16u::divisor#3 
Alias divr16u::i#3 = divr16u::i#4 
Alias divr16u::rem#2 = divr16u::$10 
Alias divr16u::rem#11 = divr16u::rem#9 
Alias divr16u::return#0 = divr16u::quotient#5 divr16u::quotient#8 divr16u::return#4 divr16u::return#1 
Alias rem16u#14 = rem16u#2 rem16u#3 
Alias divr16u::dividend#1 = div32u16u::$0 
Alias divr16u::return#2 = divr16u::return#5 
Alias div32u16u::dividend#1 = div32u16u::dividend#2 
Alias div32u16u::divisor#1 = div32u16u::divisor#2 
Alias rem16u#15 = rem16u#4 
Alias divr16u::dividend#2 = div32u16u::$2 
Alias divr16u::return#3 = divr16u::return#6 
Alias div32u16u::quotient_hi#0 = div32u16u::quotient_hi#1 
Alias rem16u#16 = rem16u#5 rem16u#17 rem16u#6 
Alias div32u16u::return#1 = div32u16u::quotient#0 div32u16u::return#4 div32u16u::return#2 
Alias mul16u::a#2 = mul16u::a#3 mul16u::a#6 
Alias mul16u::mb#3 = mul16u::mb#4 mul16u::mb#5 
Alias mul16u::res#2 = mul16u::res#5 mul16u::res#4 mul16u::return#1 mul16u::res#3 mul16u::return#4 mul16u::return#2 
Alias mul16u::a#1 = mul16u::$5 
Alias mul16u::mb#1 = mul16u::$6 
Alias mul16u::res#1 = mul16u::$4 
Alias print_str::str#3 = print_str::str#4 print_str::str#5 
Alias print_char_cursor#1 = print_char_cursor#46 print_char_cursor#47 print_char_cursor#25 
Alias print_char_cursor#0 = print_char_cursor#24 
Alias print_char_cursor#48 = print_char_cursor#59 print_char_cursor#49 
Alias print_sint::w#2 = print_sint::w#5 print_sint::w#3 print_sint::w#7 print_sint::w#6 
Alias print_char_cursor#2 = print_char_cursor#26 
Alias print_sint::w#0 = print_sint::$4 
Alias print_char_cursor#27 = print_char_cursor#3 
Alias print_char_cursor#28 = print_char_cursor#4 print_char_cursor#29 print_char_cursor#5 
Alias print_uchar::b#0 = print_uint::$0 
Alias print_uint::w#1 = print_uint::w#2 
Alias print_char_cursor#30 = print_char_cursor#6 
Alias print_uchar::b#1 = print_uint::$2 
Alias print_char_cursor#31 = print_char_cursor#7 print_char_cursor#32 print_char_cursor#8 
Alias print_uchar::b#2 = print_uchar::b#3 
Alias print_char_cursor#33 = print_char_cursor#9 
Alias print_char_cursor#10 = print_char_cursor#34 print_char_cursor#35 print_char_cursor#11 
Alias print_char_cursor#12 = print_char_cursor#37 print_char_cursor#13 
Alias print_line_cursor#0 = print_screen#3 print_screen#2 print_char_cursor#14 print_line_cursor#7 print_char_cursor#38 print_line_cursor#1 print_char_cursor#15 
Alias memset::return#1 = memset::str#1 memset::return#3 memset::return#2 
Alias memset::str#2 = memset::str#3 
Alias memset::num#1 = memset::num#2 
Alias memset::c#3 = memset::c#4 
Alias memset::c#1 = memset::c#2 
Alias memset::dst#2 = memset::dst#3 
Alias memset::end#1 = memset::end#2 
Alias memset::str#4 = memset::str#5 
Alias print_screen#5 = print_screen#7 
Alias print_line_cursor#12 = print_line_cursor#15 
Alias print_char_cursor#53 = print_char_cursor#60 
Alias rem16u#18 = rem16u#7 rem16u#29 
Alias print_line_cursor#2 = print_line_cursor#8 
Alias print_char_cursor#16 = print_char_cursor#39 
Alias main::st1#2 = main::st1#3 main::st1#8 main::st1#7 
Alias print_char_cursor#20 = print_char_cursor#61 print_char_cursor#56 print_char_cursor#55 print_char_cursor#43 
Alias rem16u#19 = rem16u#34 rem16u#26 rem16u#36 rem16u#35 rem16u#8 
Alias print_line_cursor#13 = print_line_cursor#19 print_line_cursor#21 print_line_cursor#20 print_line_cursor#9 print_line_cursor#3 
Alias main::st1#4 = main::st1#5 main::st1#6 
Alias rem16u#30 = rem16u#32 rem16u#33 
Alias print_line_cursor#16 = print_line_cursor#17 print_line_cursor#18 
Alias print_char_cursor#17 = print_char_cursor#40 
Alias print_char_cursor#18 = print_char_cursor#41 
Alias main::sw#0 = main::sw#3 main::sw#2 
Alias print_char_cursor#19 = print_char_cursor#42 
Alias print_screen#0 = print_line_cursor#4 print_char_cursor#21 print_line_cursor#14 print_char_cursor#57 print_screen#8 print_screen#6 print_screen#4 print_screen#1 
Alias rem16u#27 = rem16u#9 
Alias rem16u#10 = rem16u#20 rem16u#21 rem16u#11 
Alias print_line_cursor#10 = print_line_cursor#5 print_line_cursor#11 print_line_cursor#6 
Alias print_char_cursor#22 = print_char_cursor#44 print_char_cursor#45 print_char_cursor#23 
Successful SSA optimization Pass2AliasElimination
Alias sin16s::isUpper#2 = sin16s::isUpper#8 
Alias divr16u::dividend#3 = divr16u::dividend#4 
Alias divr16u::quotient#3 = divr16u::quotient#6 
Alias divr16u::divisor#2 = divr16u::divisor#4 divr16u::divisor#7 
Alias divr16u::i#2 = divr16u::i#3 divr16u::i#5 
Alias divr16u::dividend#0 = divr16u::dividend#6 
Alias mul16u::a#2 = mul16u::a#4 
Alias mul16u::mb#2 = mul16u::mb#3 
Alias main::sw#0 = main::sw#1 
Alias main::st1#2 = main::st1#4 
Alias rem16u#19 = rem16u#30 
Alias print_line_cursor#13 = print_line_cursor#16 
Successful SSA optimization Pass2AliasElimination
Identical Phi Values sin16s_gen::wavelength#1 sin16s_gen::wavelength#0
Identical Phi Values rem16u#22 rem16u#25
Identical Phi Values sin16s_gen::sintab#5 sin16s_gen::sintab#1
Identical Phi Values rem16u#0 rem16u#16
Identical Phi Values sin16s_gen::wavelength#2 sin16s_gen::wavelength#1
Identical Phi Values rem16u#1 rem16u#0
Identical Phi Values sin16s_gen::step#1 sin16s_gen::step#0
Identical Phi Values sin16s::x#3 sin16s::x#0
Identical Phi Values divr16u::divisor#2 divr16u::divisor#6
Identical Phi Values div32u16u::dividend#1 div32u16u::dividend#0
Identical Phi Values div32u16u::divisor#1 div32u16u::divisor#0
Identical Phi Values rem16u#24 rem16u#22
Identical Phi Values rem16u#15 rem16u#14
Identical Phi Values rem16u#16 rem16u#14
Identical Phi Values mul16u::b#1 mul16u::b#0
Identical Phi Values mul16u::a#5 mul16u::a#0
Identical Phi Values print_char_cursor#0 print_char_cursor#12
Identical Phi Values print_sint::w#2 print_sint::w#1
Identical Phi Values print_char_cursor#48 print_char_cursor#54
Identical Phi Values print_char_cursor#2 print_char_cursor#12
Identical Phi Values print_char_cursor#27 print_char_cursor#12
Identical Phi Values print_char_cursor#28 print_char_cursor#31
Identical Phi Values print_uint::w#1 print_uint::w#0
Identical Phi Values print_char_cursor#51 print_char_cursor#50
Identical Phi Values print_char_cursor#30 print_char_cursor#10
Identical Phi Values print_char_cursor#31 print_char_cursor#10
Identical Phi Values print_char_cursor#33 print_char_cursor#12
Identical Phi Values print_char_cursor#10 print_char_cursor#12
Identical Phi Values print_line_cursor#0 print_screen#5
Identical Phi Values memset::num#1 memset::num#0
Identical Phi Values memset::str#2 memset::str#0
Identical Phi Values memset::c#3 memset::c#0
Identical Phi Values memset::end#1 memset::end#0
Identical Phi Values memset::str#4 memset::str#2
Identical Phi Values memset::c#1 memset::c#3
Identical Phi Values rem16u#25 rem16u#27
Identical Phi Values print_screen#5 print_screen#0
Identical Phi Values print_line_cursor#12 print_screen#0
Identical Phi Values print_char_cursor#53 print_screen#0
Identical Phi Values rem16u#18 rem16u#1
Identical Phi Values print_line_cursor#2 print_line_cursor#0
Identical Phi Values print_char_cursor#16 print_line_cursor#0
Identical Phi Values rem16u#19 rem16u#18
Identical Phi Values print_line_cursor#13 print_line_cursor#2
Identical Phi Values print_char_cursor#17 print_char_cursor#28
Identical Phi Values print_char_cursor#18 print_char_cursor#1
Identical Phi Values print_char_cursor#19 print_char_cursor#1
Identical Phi Values rem16u#10 rem16u#19
Identical Phi Values print_line_cursor#10 print_line_cursor#13
Identical Phi Values print_char_cursor#22 print_char_cursor#20
Successful SSA optimization Pass2IdenticalPhiElimination
Identical Phi Values print_char_cursor#50 print_char_cursor#12
Identical Phi Values memset::return#1 memset::str#0
Successful SSA optimization Pass2IdenticalPhiElimination
Identical Phi Values print_char_cursor#52 print_char_cursor#12
Successful SSA optimization Pass2IdenticalPhiElimination
Simple Condition sin16s_gen::$1 [11] if(sin16s_gen::i#2<sin16s_gen::wavelength#0) goto sin16s_gen::@2
Simple Condition sin16s::$1 [24] if(sin16s::x#0<PI_u4f28) goto sin16s::@1
Simple Condition sin16s::$3 [27] if(sin16s::x#4<PI_HALF_u4f28) goto sin16s::@2
Simple Condition sin16s::$15 [68] if(sin16s::isUpper#2==0) goto sin16s::@3
Simple Condition divr16u::$4 [90] if(divr16u::$2==0) goto divr16u::@2
Simple Condition divr16u::$9 [95] if(divr16u::rem#6<divr16u::divisor#6) goto divr16u::@3
Simple Condition divr16u::$11 [100] if(divr16u::i#1!=rangelast(0,$f)) goto divr16u::@1
Simple Condition mul16u::$0 [127] if(mul16u::a#2!=0) goto mul16u::@2
Simple Condition mul16u::$3 [130] if(mul16u::$1==0) goto mul16u::@4
Simple Condition print_str::$1 [139] if(0!=*print_str::str#3) goto print_str::@2
Simple Condition print_sint::$0 [147] if(print_sint::w#1<0) goto print_sint::@1
Simple Condition memset::$1 [191] if(memset::num#0<=0) goto memset::@1
Simple Condition memset::$3 [198] if(memset::dst#2!=memset::end#0) goto memset::@4
Simple Condition main::$3 [214] if(main::st1#2<main::$2) goto main::@2
Simple Condition main::$5 [217] if(main::sw#0<0) goto main::@3
Successful SSA optimization Pass2ConditionalJumpSimplification
Constant right-side identified [46] mulu16_sel::v2#2 = (unumber)$10000/6
Constant right-side identified [211] main::$9 = main::wavelength * SIZEOF_INT
Successful SSA optimization Pass2ConstantRValueConsolidation
Constant div32u16u::dividend#0 = PI2_u4f28
Constant sin16s_gen::x#0 = 0
Constant sin16s_gen::i#0 = 0
Constant sin16s::isUpper#0 = 0
Constant sin16s::isUpper#1 = 1
Constant mulu16_sel::select#0 = 0
Constant mulu16_sel::select#1 = 1
Constant mulu16_sel::v2#2 = (unumber)$10000/6
Constant mulu16_sel::select#2 = 1
Constant mulu16_sel::select#3 = 0
Constant mulu16_sel::select#4 = 0
Constant divr16u::quotient#0 = 0
Constant divr16u::i#0 = 0
Constant divr16u::rem#3 = 0
Constant mul16u::res#0 = 0
Constant print_char::ch#1 = '-'
Constant print_char::ch#2 = ' '
Constant memset::c#0 = ' '
Constant memset::num#0 = $3e8
Constant sin16s_gen::sintab#1 = main::sintab1
Constant sin16s_gen::wavelength#0 = main::wavelength
Constant main::st1#0 = main::sintab1
Constant main::$9 = main::wavelength*SIZEOF_INT
Constant print_str::str#1 = main::str
Constant print_str::str#2 = main::str1
Constant rem16u#27 = 0
Constant print_screen#0 = (char *) 1024
Successful SSA optimization Pass2ConstantIdentification
Constant div32u16u::divisor#0 = sin16s_gen::wavelength#0
Constant memset::str#0 = (void *)print_screen#0
Successful SSA optimization Pass2ConstantIdentification
Constant divr16u::divisor#0 = div32u16u::divisor#0
Constant divr16u::divisor#1 = div32u16u::divisor#0
Constant memset::return#0 = memset::str#0
Constant memset::$4 = (char *)memset::str#0
Constant memset::dst#0 = (char *)memset::str#0
Successful SSA optimization Pass2ConstantIdentification
if() condition always false - eliminating [191] if(memset::num#0<=0) goto memset::@1
Successful SSA optimization Pass2ConstantIfs
Resolved ranged next value [98] divr16u::i#1 = ++ divr16u::i#2 to ++
Resolved ranged comparison value [100] if(divr16u::i#1!=rangelast(0,$f)) goto divr16u::@1 to $10
Eliminating unused constant memset::return#0
Eliminating unused constant rem16u#27
Successful SSA optimization PassNEliminateUnusedVars
Removing unused procedure __start
Removing unused procedure block __start
Removing unused procedure block __start::__init1
Removing unused procedure block __start::@1
Removing unused procedure block __start::@2
Removing unused procedure block __start::@return
Successful SSA optimization PassNEliminateEmptyStart
Adding number conversion cast (unumber) $10 in [76] if(divr16u::i#1!=$10) goto divr16u::@1
Successful SSA optimization PassNAddNumberTypeConversions
Simplifying constant integer cast $10
Successful SSA optimization PassNCastSimplification
Finalized unsigned number type (char) $10
Successful SSA optimization PassNFinalizeNumberTypeConversions
Constant right-side identified [81] divr16u::dividend#1 = word1  div32u16u::dividend#0
Constant right-side identified [85] divr16u::dividend#2 = word0  div32u16u::dividend#0
Constant right-side identified [136] memset::end#0 = memset::$4 + memset::num#0
Constant right-side identified [145] main::$2 = main::sintab1 + main::$9
Successful SSA optimization Pass2ConstantRValueConsolidation
Constant divr16u::dividend#1 = word1 div32u16u::dividend#0
Constant divr16u::dividend#2 = word0 div32u16u::dividend#0
Constant memset::end#0 = memset::$4+memset::num#0
Constant main::$2 = main::sintab1+main::$9
Successful SSA optimization Pass2ConstantIdentification
Inlining Noop Cast [48] sin16s::sinx#0 = (int)sin16s::usinx#1 keeping sin16s::usinx#1
Successful SSA optimization Pass2NopCastInlining
Inlining constant with var siblings sin16s_gen::x#0
Inlining constant with var siblings sin16s_gen::i#0
Inlining constant with var siblings sin16s_gen::sintab#1
Inlining constant with var siblings sin16s::isUpper#0
Inlining constant with var siblings sin16s::isUpper#1
Inlining constant with var siblings mulu16_sel::select#0
Inlining constant with var siblings mulu16_sel::select#1
Inlining constant with var siblings mulu16_sel::v2#2
Inlining constant with var siblings mulu16_sel::select#2
Inlining constant with var siblings mulu16_sel::select#3
Inlining constant with var siblings mulu16_sel::select#4
Inlining constant with var siblings divr16u::quotient#0
Inlining constant with var siblings divr16u::i#0
Inlining constant with var siblings divr16u::rem#3
Inlining constant with var siblings divr16u::divisor#0
Inlining constant with var siblings divr16u::divisor#1
Inlining constant with var siblings divr16u::dividend#1
Inlining constant with var siblings divr16u::dividend#2
Inlining constant with var siblings mul16u::res#0
Inlining constant with var siblings print_str::str#1
Inlining constant with var siblings print_str::str#2
Inlining constant with var siblings print_char::ch#1
Inlining constant with var siblings print_char::ch#2
Inlining constant with var siblings memset::dst#0
Inlining constant with var siblings main::st1#0
Constant inlined divr16u::rem#3 = 0
Constant inlined divr16u::i#0 = 0
Constant inlined sin16s_gen::wavelength#0 = main::wavelength
Constant inlined div32u16u::dividend#0 = PI2_u4f28
Constant inlined sin16s::isUpper#0 = 0
Constant inlined mulu16_sel::select#4 = 0
Constant inlined mulu16_sel::select#2 = 1
Constant inlined divr16u::quotient#0 = 0
Constant inlined mulu16_sel::select#3 = 0
Constant inlined memset::$4 = (char *)memset::str#0
Constant inlined mulu16_sel::select#0 = 0
Constant inlined mul16u::res#0 = 0
Constant inlined sin16s::isUpper#1 = 1
Constant inlined mulu16_sel::select#1 = 1
Constant inlined divr16u::divisor#1 = main::wavelength
Constant inlined divr16u::divisor#0 = main::wavelength
Constant inlined sin16s_gen::i#0 = 0
Constant inlined divr16u::dividend#1 = word1 PI2_u4f28
Constant inlined divr16u::dividend#2 = word0 PI2_u4f28
Constant inlined sin16s_gen::sintab#1 = main::sintab1
Constant inlined print_char::ch#2 = ' '
Constant inlined main::$2 = main::sintab1+main::wavelength*SIZEOF_INT
Constant inlined print_char::ch#1 = '-'
Constant inlined main::st1#0 = main::sintab1
Constant inlined mulu16_sel::v2#2 = (unsigned int)$10000/6
Constant inlined sin16s_gen::x#0 = 0
Constant inlined print_str::str#2 = main::str1
Constant inlined memset::dst#0 = (char *)memset::str#0
Constant inlined div32u16u::divisor#0 = main::wavelength
Constant inlined print_str::str#1 = main::str
Constant inlined main::$9 = main::wavelength*SIZEOF_INT
Successful SSA optimization Pass2ConstantInlining
Identical Phi Values divr16u::divisor#6 main::wavelength
Successful SSA optimization Pass2IdenticalPhiElimination
Finalized unsigned number type (char) 2
Finalized unsigned number type (char) 8
Finalized unsigned number type (char) $a
Finalized unsigned number type (char) $10
Finalized unsigned number type (char) $78
Finalized unsigned number type (char) $78
Finalized unsigned number type (unsigned long) $10000
Finalized unsigned number type (char) 6
Successful SSA optimization PassNFinalizeNumberTypeConversions
Added new block during phi lifting sin16s::@12(between sin16s and sin16s::@1)
Fixing phi predecessor for sin16s::isUpper#2 to new block ( sin16s -> sin16s::@12 ) during phi lifting.
Added new block during phi lifting sin16s::@13(between sin16s::@1 and sin16s::@2)
Added new block during phi lifting sin16s::@14(between sin16s::@11 and sin16s::@3)
Added new block during phi lifting divr16u::@7(between divr16u::@3 and divr16u::@1)
Added new block during phi lifting divr16u::@8(between divr16u::@1 and divr16u::@2)
Added new block during phi lifting divr16u::@9(between divr16u::@2 and divr16u::@3)
Added new block during phi lifting mul16u::@6(between mul16u::@2 and mul16u::@4)
Added new block during phi lifting main::@10(between main::@2 and main::@3)
Adding NOP phi() at start of main
Adding NOP phi() at start of main::@5
Adding NOP phi() at start of main::@6
Adding NOP phi() at start of sin16s_gen
Adding NOP phi() at start of print_cls
Adding NOP phi() at start of print_cls::@1
Adding NOP phi() at start of print_sint::@6
Adding NOP phi() at start of div32u16u
Adding NOP phi() at start of memset
Adding NOP phi() at start of memset::@2
Adding NOP phi() at start of memset::@1
Adding NOP phi() at start of print_uint::@2
Adding NOP phi() at start of print_uchar::@2
Adding NOP phi() at start of mul16u::@3
CALL GRAPH
Calls in [main] to sin16s_gen:1 print_cls:3 print_str:11 print_sint:15 print_str:17 
Calls in [sin16s_gen] to div32u16u:23 sin16s:30 
Calls in [print_cls] to memset:41 
Calls in [print_str] to print_char:53 
Calls in [print_sint] to print_char:59 print_uint:63 print_char:67 
Calls in [div32u16u] to divr16u:71 divr16u:76 
Calls in [sin16s] to mulu16_sel:95 mulu16_sel:102 mulu16_sel:107 mulu16_sel:115 mulu16_sel:122 
Calls in [print_uint] to print_uchar:150 print_uchar:153 
Calls in [mulu16_sel] to mul16u:189 
Calls in [print_uchar] to print_char:200 print_char:205 

Created 35 initial phi equivalence classes
Coalesced [10] print_char_cursor#62 = print_char_cursor#20
Coalesced [12] print_char_cursor#73 = print_char_cursor#1
Coalesced [16] print_char_cursor#63 = print_char_cursor#12
Coalesced [19] main::st1#9 = main::st1#1
Coalesced [20] print_char_cursor#71 = print_char_cursor#1
Coalesced (already) [21] print_char_cursor#72 = print_char_cursor#20
Coalesced [37] sin16s_gen::i#5 = sin16s_gen::i#1
Coalesced [38] sin16s_gen::x#5 = sin16s_gen::x#1
Coalesced [39] sin16s_gen::sintab#7 = sin16s_gen::sintab#0
Coalesced [45] print_str::str#7 = print_str::str#6
Coalesced (already) [46] print_char_cursor#64 = print_char_cursor#58
Coalesced [51] print_char::ch#6 = print_char::ch#0
Coalesced [52] print_char_cursor#68 = print_char_cursor#1
Coalesced [55] print_str::str#8 = print_str::str#0
Coalesced (already) [56] print_char_cursor#65 = print_char_cursor#12
Coalesced (already) [58] print_char_cursor#67 = print_char_cursor#54
Coalesced [60] print_sint::w#9 = print_sint::w#1
Coalesced (already) [66] print_char_cursor#66 = print_char_cursor#54
Coalesced [69] print_sint::w#8 = print_sint::w#0
Coalesced [75] divr16u::rem#12 = divr16u::rem#4
Coalesced [83] sin16s::x#9 = sin16s::x#1
Coalesced [87] sin16s::x#11 = sin16s::x#2
Coalesced [93] mulu16_sel::v1#7 = mulu16_sel::v1#0
Coalesced [94] mulu16_sel::v2#7 = mulu16_sel::v2#0
Coalesced [100] mulu16_sel::v1#8 = mulu16_sel::v1#1
Coalesced [101] mulu16_sel::v2#8 = mulu16_sel::v2#1
Coalesced [106] mulu16_sel::v1#9 = mulu16_sel::v1#2
Coalesced [113] mulu16_sel::v1#10 = mulu16_sel::v1#3
Coalesced [114] mulu16_sel::v2#9 = mulu16_sel::v2#3
Coalesced [120] mulu16_sel::v1#6 = mulu16_sel::v1#4
Coalesced [121] mulu16_sel::v2#6 = mulu16_sel::v2#4
Coalesced [129] sin16s::return#6 = sin16s::sinx#1
Coalesced [133] sin16s::x#10 = sin16s::x#4
Coalesced [134] sin16s::x#8 = sin16s::x#0
Coalesced [143] memset::dst#4 = memset::dst#1
Coalesced [149] print_uchar::b#4 = print_uchar::b#0
Coalesced [152] print_uchar::b#5 = print_uchar::b#1
Coalesced [157] divr16u::rem#13 = divr16u::rem#10
Coalesced [158] divr16u::dividend#9 = divr16u::dividend#5
Coalesced [165] divr16u::rem#16 = divr16u::rem#1
Coalesced [172] divr16u::rem#18 = divr16u::rem#2
Coalesced [173] divr16u::return#8 = divr16u::quotient#2
Coalesced [179] divr16u::rem#14 = divr16u::rem#11
Coalesced [180] divr16u::dividend#10 = divr16u::dividend#0
Coalesced [181] divr16u::quotient#9 = divr16u::return#0
Coalesced [182] divr16u::i#7 = divr16u::i#1
Coalesced [183] divr16u::rem#17 = divr16u::rem#6
Coalesced [184] divr16u::return#7 = divr16u::quotient#1
Coalesced [185] divr16u::rem#15 = divr16u::rem#0
Coalesced [198] print_char::ch#7 = print_char::ch#3
Coalesced (already) [199] print_char_cursor#69 = print_char_cursor#12
Coalesced [203] print_char::ch#8 = print_char::ch#4
Coalesced (already) [204] print_char_cursor#70 = print_char_cursor#12
Coalesced [209] mul16u::a#7 = mul16u::a#0
Coalesced [210] mul16u::mb#6 = mul16u::mb#0
Coalesced [218] mul16u::res#9 = mul16u::res#1
Coalesced [222] mul16u::a#8 = mul16u::a#1
Coalesced [223] mul16u::res#7 = mul16u::res#6
Coalesced [224] mul16u::mb#7 = mul16u::mb#1
Coalesced (already) [225] mul16u::res#8 = mul16u::res#2
Coalesced down to 23 phi equivalence classes
Culled Empty Block label main::@6
Culled Empty Block label main::@9
Culled Empty Block label main::@10
Culled Empty Block label print_cls::@1
Culled Empty Block label print_sint::@5
Culled Empty Block label print_sint::@6
Culled Empty Block label sin16s::@13
Culled Empty Block label sin16s::@12
Culled Empty Block label memset::@2
Culled Empty Block label memset::@1
Culled Empty Block label print_uint::@2
Culled Empty Block label divr16u::@7
Culled Empty Block label divr16u::@9
Culled Empty Block label divr16u::@8
Culled Empty Block label print_uchar::@2
Culled Empty Block label mul16u::@3
Culled Empty Block label mul16u::@6
Renumbering block sin16s::@14 to sin16s::@12
Renumbering block mul16u::@4 to mul16u::@3
Renumbering block mul16u::@5 to mul16u::@4
Renumbering block memset::@3 to memset::@1
Renumbering block memset::@4 to memset::@2
Renumbering block main::@7 to main::@6
Renumbering block main::@8 to main::@7
Adding NOP phi() at start of main
Adding NOP phi() at start of main::@5
Adding NOP phi() at start of main::@4
Adding NOP phi() at start of main::@6
Adding NOP phi() at start of sin16s_gen
Adding NOP phi() at start of print_cls
Adding NOP phi() at start of print_sint::@3
Adding NOP phi() at start of print_sint::@1
Adding NOP phi() at start of div32u16u
Adding NOP phi() at start of memset

FINAL CONTROL FLOW GRAPH

void main()
main: scope:[main]  from
  [0] phi()
  [1] call sin16s_gen
  to:main::@5
main::@5: scope:[main]  from main
  [2] phi()
  [3] call print_cls
  to:main::@1
main::@1: scope:[main]  from main::@5 main::@7
  [4] print_char_cursor#20 = phi( main::@5/print_screen#0, main::@7/print_char_cursor#1 )
  [4] main::st1#2 = phi( main::@5/main::sintab1, main::@7/main::st1#1 )
  [5] if(main::st1#2<main::sintab1+main::wavelength*SIZEOF_INT) goto main::@2
  to:main::@return
main::@return: scope:[main]  from main::@1
  [6] return 
  to:@return
main::@2: scope:[main]  from main::@1
  [7] main::sw#0 = *main::st1#2
  [8] if(main::sw#0<0) goto main::@3
  to:main::@4
main::@4: scope:[main]  from main::@2
  [9] phi()
  [10] call print_str
  to:main::@3
main::@3: scope:[main]  from main::@2 main::@4
  [11] print_char_cursor#54 = phi( main::@2/print_char_cursor#20, main::@4/print_char_cursor#1 )
  [12] print_sint::w#1 = main::sw#0
  [13] call print_sint
  to:main::@6
main::@6: scope:[main]  from main::@3
  [14] phi()
  [15] call print_str
  to:main::@7
main::@7: scope:[main]  from main::@6
  [16] main::st1#1 = main::st1#2 + SIZEOF_INT
  to:main::@1

void sin16s_gen(int *sintab , unsigned int wavelength)
sin16s_gen: scope:[sin16s_gen]  from main
  [17] phi()
  [18] call div32u16u
  [19] div32u16u::return#0 = div32u16u::return#1
  to:sin16s_gen::@3
sin16s_gen::@3: scope:[sin16s_gen]  from sin16s_gen
  [20] sin16s_gen::step#0 = div32u16u::return#0
  to:sin16s_gen::@1
sin16s_gen::@1: scope:[sin16s_gen]  from sin16s_gen::@3 sin16s_gen::@4
  [21] sin16s_gen::sintab#2 = phi( sin16s_gen::@3/main::sintab1, sin16s_gen::@4/sin16s_gen::sintab#0 )
  [21] sin16s_gen::x#2 = phi( sin16s_gen::@3/0, sin16s_gen::@4/sin16s_gen::x#1 )
  [21] sin16s_gen::i#2 = phi( sin16s_gen::@3/0, sin16s_gen::@4/sin16s_gen::i#1 )
  [22] if(sin16s_gen::i#2<main::wavelength) goto sin16s_gen::@2
  to:sin16s_gen::@return
sin16s_gen::@return: scope:[sin16s_gen]  from sin16s_gen::@1
  [23] return 
  to:@return
sin16s_gen::@2: scope:[sin16s_gen]  from sin16s_gen::@1
  [24] sin16s::x#0 = sin16s_gen::x#2
  [25] call sin16s
  [26] sin16s::return#0 = sin16s::return#1
  to:sin16s_gen::@4
sin16s_gen::@4: scope:[sin16s_gen]  from sin16s_gen::@2
  [27] sin16s_gen::$2 = sin16s::return#0
  [28] *sin16s_gen::sintab#2 = sin16s_gen::$2
  [29] sin16s_gen::sintab#0 = sin16s_gen::sintab#2 + SIZEOF_INT
  [30] sin16s_gen::x#1 = sin16s_gen::x#2 + sin16s_gen::step#0
  [31] sin16s_gen::i#1 = ++ sin16s_gen::i#2
  to:sin16s_gen::@1

void print_cls()
print_cls: scope:[print_cls]  from main::@5
  [32] phi()
  [33] call memset
  to:print_cls::@return
print_cls::@return: scope:[print_cls]  from print_cls
  [34] return 
  to:@return

void print_str(char *str)
print_str: scope:[print_str]  from main::@4 main::@6
  [35] print_char_cursor#58 = phi( main::@4/print_char_cursor#20, main::@6/print_char_cursor#12 )
  [35] print_str::str#6 = phi( main::@4/main::str1, main::@6/main::str )
  to:print_str::@1
print_str::@1: scope:[print_str]  from print_str print_str::@3
  [36] print_char_cursor#1 = phi( print_str/print_char_cursor#58, print_str::@3/print_char_cursor#12 )
  [36] print_str::str#3 = phi( print_str/print_str::str#6, print_str::@3/print_str::str#0 )
  [37] if(0!=*print_str::str#3) goto print_str::@2
  to:print_str::@return
print_str::@return: scope:[print_str]  from print_str::@1
  [38] return 
  to:@return
print_str::@2: scope:[print_str]  from print_str::@1
  [39] print_char::ch#0 = *print_str::str#3
  [40] call print_char
  to:print_str::@3
print_str::@3: scope:[print_str]  from print_str::@2
  [41] print_str::str#0 = ++ print_str::str#3
  to:print_str::@1

void print_sint(int w)
print_sint: scope:[print_sint]  from main::@3
  [42] if(print_sint::w#1<0) goto print_sint::@1
  to:print_sint::@3
print_sint::@3: scope:[print_sint]  from print_sint
  [43] phi()
  [44] call print_char
  to:print_sint::@2
print_sint::@2: scope:[print_sint]  from print_sint::@3 print_sint::@4
  [45] print_sint::w#4 = phi( print_sint::@4/print_sint::w#0, print_sint::@3/print_sint::w#1 )
  [46] print_uint::w#0 = (unsigned int)print_sint::w#4
  [47] call print_uint
  to:print_sint::@return
print_sint::@return: scope:[print_sint]  from print_sint::@2
  [48] return 
  to:@return
print_sint::@1: scope:[print_sint]  from print_sint
  [49] phi()
  [50] call print_char
  to:print_sint::@4
print_sint::@4: scope:[print_sint]  from print_sint::@1
  [51] print_sint::w#0 = - print_sint::w#1
  to:print_sint::@2

unsigned long div32u16u(unsigned long dividend , unsigned int divisor)
div32u16u: scope:[div32u16u]  from sin16s_gen
  [52] phi()
  [53] call divr16u
  [54] divr16u::return#2 = divr16u::return#0
  to:div32u16u::@1
div32u16u::@1: scope:[div32u16u]  from div32u16u
  [55] div32u16u::quotient_hi#0 = divr16u::return#2
  [56] divr16u::rem#4 = rem16u#14
  [57] call divr16u
  [58] divr16u::return#3 = divr16u::return#0
  to:div32u16u::@2
div32u16u::@2: scope:[div32u16u]  from div32u16u::@1
  [59] div32u16u::quotient_lo#0 = divr16u::return#3
  [60] div32u16u::return#1 = div32u16u::quotient_hi#0 dw= div32u16u::quotient_lo#0
  to:div32u16u::@return
div32u16u::@return: scope:[div32u16u]  from div32u16u::@2
  [61] return 
  to:@return

int sin16s(unsigned long x)
sin16s: scope:[sin16s]  from sin16s_gen::@2
  [62] if(sin16s::x#0<PI_u4f28) goto sin16s::@1
  to:sin16s::@4
sin16s::@4: scope:[sin16s]  from sin16s
  [63] sin16s::x#1 = sin16s::x#0 - PI_u4f28
  to:sin16s::@1
sin16s::@1: scope:[sin16s]  from sin16s sin16s::@4
  [64] sin16s::isUpper#2 = phi( sin16s/0, sin16s::@4/1 )
  [64] sin16s::x#4 = phi( sin16s/sin16s::x#0, sin16s::@4/sin16s::x#1 )
  [65] if(sin16s::x#4<PI_HALF_u4f28) goto sin16s::@2
  to:sin16s::@5
sin16s::@5: scope:[sin16s]  from sin16s::@1
  [66] sin16s::x#2 = PI_u4f28 - sin16s::x#4
  to:sin16s::@2
sin16s::@2: scope:[sin16s]  from sin16s::@1 sin16s::@5
  [67] sin16s::x#6 = phi( sin16s::@1/sin16s::x#4, sin16s::@5/sin16s::x#2 )
  [68] sin16s::$4 = sin16s::x#6 << 3
  [69] sin16s::x1#0 = word1  sin16s::$4
  [70] mulu16_sel::v1#0 = sin16s::x1#0
  [71] mulu16_sel::v2#0 = sin16s::x1#0
  [72] call mulu16_sel
  [73] mulu16_sel::return#0 = mulu16_sel::return#12
  to:sin16s::@7
sin16s::@7: scope:[sin16s]  from sin16s::@2
  [74] sin16s::x2#0 = mulu16_sel::return#0
  [75] mulu16_sel::v1#1 = sin16s::x2#0
  [76] mulu16_sel::v2#1 = sin16s::x1#0
  [77] call mulu16_sel
  [78] mulu16_sel::return#1 = mulu16_sel::return#12
  to:sin16s::@8
sin16s::@8: scope:[sin16s]  from sin16s::@7
  [79] sin16s::x3#0 = mulu16_sel::return#1
  [80] mulu16_sel::v1#2 = sin16s::x3#0
  [81] call mulu16_sel
  [82] mulu16_sel::return#2 = mulu16_sel::return#12
  to:sin16s::@9
sin16s::@9: scope:[sin16s]  from sin16s::@8
  [83] sin16s::x3_6#0 = mulu16_sel::return#2
  [84] sin16s::usinx#0 = sin16s::x1#0 - sin16s::x3_6#0
  [85] mulu16_sel::v1#3 = sin16s::x3#0
  [86] mulu16_sel::v2#3 = sin16s::x1#0
  [87] call mulu16_sel
  [88] mulu16_sel::return#10 = mulu16_sel::return#12
  to:sin16s::@10
sin16s::@10: scope:[sin16s]  from sin16s::@9
  [89] sin16s::x4#0 = mulu16_sel::return#10
  [90] mulu16_sel::v1#4 = sin16s::x4#0
  [91] mulu16_sel::v2#4 = sin16s::x1#0
  [92] call mulu16_sel
  [93] mulu16_sel::return#11 = mulu16_sel::return#12
  to:sin16s::@11
sin16s::@11: scope:[sin16s]  from sin16s::@10
  [94] sin16s::x5#0 = mulu16_sel::return#11
  [95] sin16s::x5_128#0 = sin16s::x5#0 >> 4
  [96] sin16s::usinx#1 = sin16s::usinx#0 + sin16s::x5_128#0
  [97] if(sin16s::isUpper#2==0) goto sin16s::@12
  to:sin16s::@6
sin16s::@6: scope:[sin16s]  from sin16s::@11
  [98] sin16s::sinx#1 = - (int)sin16s::usinx#1
  to:sin16s::@3
sin16s::@3: scope:[sin16s]  from sin16s::@12 sin16s::@6
  [99] sin16s::return#1 = phi( sin16s::@12/sin16s::return#5, sin16s::@6/sin16s::sinx#1 )
  to:sin16s::@return
sin16s::@return: scope:[sin16s]  from sin16s::@3
  [100] return 
  to:@return
sin16s::@12: scope:[sin16s]  from sin16s::@11
  [101] sin16s::return#5 = (int)sin16s::usinx#1
  to:sin16s::@3

void * memset(void *str , char c , unsigned int num)
memset: scope:[memset]  from print_cls
  [102] phi()
  to:memset::@1
memset::@1: scope:[memset]  from memset memset::@2
  [103] memset::dst#2 = phi( memset/(char *)memset::str#0, memset::@2/memset::dst#1 )
  [104] if(memset::dst#2!=memset::end#0) goto memset::@2
  to:memset::@return
memset::@return: scope:[memset]  from memset::@1
  [105] return 
  to:@return
memset::@2: scope:[memset]  from memset::@1
  [106] *memset::dst#2 = memset::c#0
  [107] memset::dst#1 = ++ memset::dst#2
  to:memset::@1

void print_char(char ch)
print_char: scope:[print_char]  from print_sint::@1 print_sint::@3 print_str::@2 print_uchar print_uchar::@1
  [108] print_char_cursor#36 = phi( print_sint::@1/print_char_cursor#54, print_sint::@3/print_char_cursor#54, print_str::@2/print_char_cursor#1, print_uchar/print_char_cursor#12, print_uchar::@1/print_char_cursor#12 )
  [108] print_char::ch#5 = phi( print_sint::@1/'-', print_sint::@3/' ', print_str::@2/print_char::ch#0, print_uchar/print_char::ch#3, print_uchar::@1/print_char::ch#4 )
  [109] *print_char_cursor#36 = print_char::ch#5
  [110] print_char_cursor#12 = ++ print_char_cursor#36
  to:print_char::@return
print_char::@return: scope:[print_char]  from print_char
  [111] return 
  to:@return

void print_uint(unsigned int w)
print_uint: scope:[print_uint]  from print_sint::@2
  [112] print_uchar::b#0 = byte1  print_uint::w#0
  [113] call print_uchar
  to:print_uint::@1
print_uint::@1: scope:[print_uint]  from print_uint
  [114] print_uchar::b#1 = byte0  print_uint::w#0
  [115] call print_uchar
  to:print_uint::@return
print_uint::@return: scope:[print_uint]  from print_uint::@1
  [116] return 
  to:@return

unsigned int divr16u(unsigned int dividend , unsigned int divisor , unsigned int rem)
divr16u: scope:[divr16u]  from div32u16u div32u16u::@1
  [117] divr16u::dividend#5 = phi( div32u16u/word1 PI2_u4f28, div32u16u::@1/word0 PI2_u4f28 )
  [117] divr16u::rem#10 = phi( div32u16u/0, div32u16u::@1/divr16u::rem#4 )
  to:divr16u::@1
divr16u::@1: scope:[divr16u]  from divr16u divr16u::@3
  [118] divr16u::i#2 = phi( divr16u/0, divr16u::@3/divr16u::i#1 )
  [118] divr16u::quotient#3 = phi( divr16u/0, divr16u::@3/divr16u::return#0 )
  [118] divr16u::dividend#3 = phi( divr16u/divr16u::dividend#5, divr16u::@3/divr16u::dividend#0 )
  [118] divr16u::rem#5 = phi( divr16u/divr16u::rem#10, divr16u::@3/divr16u::rem#11 )
  [119] divr16u::rem#0 = divr16u::rem#5 << 1
  [120] divr16u::$1 = byte1  divr16u::dividend#3
  [121] divr16u::$2 = divr16u::$1 & $80
  [122] if(divr16u::$2==0) goto divr16u::@2
  to:divr16u::@4
divr16u::@4: scope:[divr16u]  from divr16u::@1
  [123] divr16u::rem#1 = divr16u::rem#0 | 1
  to:divr16u::@2
divr16u::@2: scope:[divr16u]  from divr16u::@1 divr16u::@4
  [124] divr16u::rem#6 = phi( divr16u::@1/divr16u::rem#0, divr16u::@4/divr16u::rem#1 )
  [125] divr16u::dividend#0 = divr16u::dividend#3 << 1
  [126] divr16u::quotient#1 = divr16u::quotient#3 << 1
  [127] if(divr16u::rem#6<main::wavelength) goto divr16u::@3
  to:divr16u::@5
divr16u::@5: scope:[divr16u]  from divr16u::@2
  [128] divr16u::quotient#2 = ++ divr16u::quotient#1
  [129] divr16u::rem#2 = divr16u::rem#6 - main::wavelength
  to:divr16u::@3
divr16u::@3: scope:[divr16u]  from divr16u::@2 divr16u::@5
  [130] divr16u::return#0 = phi( divr16u::@2/divr16u::quotient#1, divr16u::@5/divr16u::quotient#2 )
  [130] divr16u::rem#11 = phi( divr16u::@2/divr16u::rem#6, divr16u::@5/divr16u::rem#2 )
  [131] divr16u::i#1 = ++ divr16u::i#2
  [132] if(divr16u::i#1!=$10) goto divr16u::@1
  to:divr16u::@6
divr16u::@6: scope:[divr16u]  from divr16u::@3
  [133] rem16u#14 = divr16u::rem#11
  to:divr16u::@return
divr16u::@return: scope:[divr16u]  from divr16u::@6
  [134] return 
  to:@return

unsigned int mulu16_sel(unsigned int v1 , unsigned int v2 , char select)
mulu16_sel: scope:[mulu16_sel]  from sin16s::@10 sin16s::@2 sin16s::@7 sin16s::@8 sin16s::@9
  [135] mulu16_sel::select#5 = phi( sin16s::@10/0, sin16s::@2/0, sin16s::@7/1, sin16s::@8/1, sin16s::@9/0 )
  [135] mulu16_sel::v2#5 = phi( sin16s::@10/mulu16_sel::v2#4, sin16s::@2/mulu16_sel::v2#0, sin16s::@7/mulu16_sel::v2#1, sin16s::@8/(unsigned int)$10000/6, sin16s::@9/mulu16_sel::v2#3 )
  [135] mulu16_sel::v1#5 = phi( sin16s::@10/mulu16_sel::v1#4, sin16s::@2/mulu16_sel::v1#0, sin16s::@7/mulu16_sel::v1#1, sin16s::@8/mulu16_sel::v1#2, sin16s::@9/mulu16_sel::v1#3 )
  [136] mul16u::a#0 = mulu16_sel::v1#5
  [137] mul16u::b#0 = mulu16_sel::v2#5
  [138] call mul16u
  [139] mul16u::return#0 = mul16u::res#2
  to:mulu16_sel::@1
mulu16_sel::@1: scope:[mulu16_sel]  from mulu16_sel
  [140] mulu16_sel::$0 = mul16u::return#0
  [141] mulu16_sel::$1 = mulu16_sel::$0 << mulu16_sel::select#5
  [142] mulu16_sel::return#12 = word1  mulu16_sel::$1
  to:mulu16_sel::@return
mulu16_sel::@return: scope:[mulu16_sel]  from mulu16_sel::@1
  [143] return 
  to:@return

void print_uchar(char b)
print_uchar: scope:[print_uchar]  from print_uint print_uint::@1
  [144] print_uchar::b#2 = phi( print_uint/print_uchar::b#0, print_uint::@1/print_uchar::b#1 )
  [145] print_uchar::$0 = print_uchar::b#2 >> 4
  [146] print_char::ch#3 = print_hextab[print_uchar::$0]
  [147] call print_char
  to:print_uchar::@1
print_uchar::@1: scope:[print_uchar]  from print_uchar
  [148] print_uchar::$2 = print_uchar::b#2 & $f
  [149] print_char::ch#4 = print_hextab[print_uchar::$2]
  [150] call print_char
  to:print_uchar::@return
print_uchar::@return: scope:[print_uchar]  from print_uchar::@1
  [151] return 
  to:@return

unsigned long mul16u(unsigned int a , unsigned int b)
mul16u: scope:[mul16u]  from mulu16_sel
  [152] mul16u::mb#0 = (unsigned long)mul16u::b#0
  to:mul16u::@1
mul16u::@1: scope:[mul16u]  from mul16u mul16u::@3
  [153] mul16u::mb#2 = phi( mul16u/mul16u::mb#0, mul16u::@3/mul16u::mb#1 )
  [153] mul16u::res#2 = phi( mul16u/0, mul16u::@3/mul16u::res#6 )
  [153] mul16u::a#2 = phi( mul16u/mul16u::a#0, mul16u::@3/mul16u::a#1 )
  [154] if(mul16u::a#2!=0) goto mul16u::@2
  to:mul16u::@return
mul16u::@return: scope:[mul16u]  from mul16u::@1
  [155] return 
  to:@return
mul16u::@2: scope:[mul16u]  from mul16u::@1
  [156] mul16u::$1 = mul16u::a#2 & 1
  [157] if(mul16u::$1==0) goto mul16u::@3
  to:mul16u::@4
mul16u::@4: scope:[mul16u]  from mul16u::@2
  [158] mul16u::res#1 = mul16u::res#2 + mul16u::mb#2
  to:mul16u::@3
mul16u::@3: scope:[mul16u]  from mul16u::@2 mul16u::@4
  [159] mul16u::res#6 = phi( mul16u::@2/mul16u::res#2, mul16u::@4/mul16u::res#1 )
  [160] mul16u::a#1 = mul16u::a#2 >> 1
  [161] mul16u::mb#1 = mul16u::mb#2 << 1
  to:mul16u::@1


VARIABLE REGISTER WEIGHTS
unsigned long div32u16u(unsigned long dividend , unsigned int divisor)
unsigned long div32u16u::dividend
unsigned int div32u16u::divisor
unsigned long div32u16u::quotient
unsigned int div32u16u::quotient_hi
unsigned int div32u16u::quotient_hi#0 // 40.4
unsigned int div32u16u::quotient_lo
unsigned int div32u16u::quotient_lo#0 // 202.0
unsigned long div32u16u::return
unsigned long div32u16u::return#0 // 22.0
unsigned long div32u16u::return#1 // 37.33333333333333
unsigned int divr16u(unsigned int dividend , unsigned int divisor , unsigned int rem)
char divr16u::$1 // 20002.0
char divr16u::$2 // 20002.0
unsigned int divr16u::dividend
unsigned int divr16u::dividend#0 // 2500.25
unsigned int divr16u::dividend#3 // 4429.142857142857
unsigned int divr16u::dividend#5 // 1001.0
unsigned int divr16u::divisor
char divr16u::i
char divr16u::i#1 // 15001.5
char divr16u::i#2 // 1538.6153846153845
unsigned int divr16u::quotient
unsigned int divr16u::quotient#1 // 15001.5
unsigned int divr16u::quotient#2 // 10001.0
unsigned int divr16u::quotient#3 // 2500.25
unsigned int divr16u::rem
unsigned int divr16u::rem#0 // 7500.75
unsigned int divr16u::rem#1 // 20002.0
unsigned int divr16u::rem#10 // 1102.0
unsigned int divr16u::rem#11 // 10334.666666666666
unsigned int divr16u::rem#2 // 20002.0
unsigned int divr16u::rem#4 // 202.0
unsigned int divr16u::rem#5 // 21003.0
unsigned int divr16u::rem#6 // 10001.0
unsigned int divr16u::return
unsigned int divr16u::return#0 // 4315.0
unsigned int divr16u::return#2 // 202.0
unsigned int divr16u::return#3 // 202.0
void main()
int *main::st1
int *main::st1#1 // 22.0
int *main::st1#2 // 4.0
int main::sw
int main::sw#0 // 6.6000000000000005
void * memset(void *str , char c , unsigned int num)
char memset::c
char *memset::dst
char *memset::dst#1 // 2002.0
char *memset::dst#2 // 1334.6666666666667
char *memset::end
unsigned int memset::num
void *memset::return
void *memset::str
unsigned long mul16u(unsigned int a , unsigned int b)
char mul16u::$1 // 2.0000002E7
unsigned int mul16u::a
unsigned int mul16u::a#0 // 36667.33333333333
unsigned int mul16u::a#1 // 1.0000001E7
unsigned int mul16u::a#2 // 6683334.166666666
unsigned int mul16u::b
unsigned int mul16u::b#0 // 10001.0
unsigned long mul16u::mb
unsigned long mul16u::mb#0 // 200002.0
unsigned long mul16u::mb#1 // 2.0000002E7
unsigned long mul16u::mb#2 // 4300000.571428571
unsigned long mul16u::res
unsigned long mul16u::res#1 // 2.0000002E7
unsigned long mul16u::res#2 // 5001667.333333333
unsigned long mul16u::res#6 // 1.0000001E7
unsigned long mul16u::return
unsigned long mul16u::return#0 // 20002.0
unsigned int mulu16_sel(unsigned int v1 , unsigned int v2 , char select)
unsigned long mulu16_sel::$0 // 20002.0
unsigned long mulu16_sel::$1 // 20002.0
unsigned int mulu16_sel::return
unsigned int mulu16_sel::return#0 // 2002.0
unsigned int mulu16_sel::return#1 // 2002.0
unsigned int mulu16_sel::return#10 // 2002.0
unsigned int mulu16_sel::return#11 // 2002.0
unsigned int mulu16_sel::return#12 // 2143.714285714286
unsigned int mulu16_sel::return#2 // 2002.0
char mulu16_sel::select
char mulu16_sel::select#5 // 1666.8333333333333
unsigned int mulu16_sel::v1
unsigned int mulu16_sel::v1#0 // 1001.0
unsigned int mulu16_sel::v1#1 // 1001.0
unsigned int mulu16_sel::v1#2 // 2002.0
unsigned int mulu16_sel::v1#3 // 1001.0
unsigned int mulu16_sel::v1#4 // 1001.0
unsigned int mulu16_sel::v1#5 // 15006.0
unsigned int mulu16_sel::v2
unsigned int mulu16_sel::v2#0 // 2002.0
unsigned int mulu16_sel::v2#1 // 2002.0
unsigned int mulu16_sel::v2#3 // 2002.0
unsigned int mulu16_sel::v2#4 // 2002.0
unsigned int mulu16_sel::v2#5 // 7002.5
void print_char(char ch)
char print_char::ch
char print_char::ch#0 // 20002.0
char print_char::ch#3 // 20002.0
char print_char::ch#4 // 20002.0
char print_char::ch#5 // 130004.0
char *print_char_cursor
char *print_char_cursor#1 // 2875.0
char *print_char_cursor#12 // 5000.576923076923
char *print_char_cursor#20 // 6.6000000000000005
char *print_char_cursor#36 // 115103.5
char *print_char_cursor#54 // 44.8
char *print_char_cursor#58 // 123.0
void print_cls()
char *print_line_cursor
char *print_screen
void print_sint(int w)
int print_sint::w
int print_sint::w#0 // 202.0
int print_sint::w#1 // 52.33333333333333
int print_sint::w#4 // 202.0
void print_str(char *str)
char *print_str::str
char *print_str::str#0 // 20002.0
char *print_str::str#3 // 10026.25
char *print_str::str#6 // 101.0
void print_uchar(char b)
char print_uchar::$0 // 20002.0
char print_uchar::$2 // 20002.0
char print_uchar::b
char print_uchar::b#0 // 2002.0
char print_uchar::b#1 // 2002.0
char print_uchar::b#2 // 5501.0
void print_uint(unsigned int w)
unsigned int print_uint::w
unsigned int print_uint::w#0 // 701.0
unsigned int rem16u
unsigned int rem16u#14 // 220.39999999999998
int sin16s(unsigned long x)
unsigned long sin16s::$4 // 2002.0
char sin16s::isUpper
char sin16s::isUpper#2 // 30.333333333333332
int sin16s::return
int sin16s::return#0 // 202.0
int sin16s::return#1 // 701.0
int sin16s::return#5 // 2002.0
int sin16s::sinx
int sin16s::sinx#1 // 2002.0
unsigned int sin16s::usinx
unsigned int sin16s::usinx#0 // 166.83333333333334
unsigned int sin16s::usinx#1 // 500.5
unsigned long sin16s::x
unsigned long sin16s::x#0 // 1552.0
unsigned long sin16s::x#1 // 2002.0
unsigned long sin16s::x#2 // 2002.0
unsigned long sin16s::x#4 // 2502.5
unsigned long sin16s::x#6 // 3003.0
unsigned int sin16s::x1
unsigned int sin16s::x1#0 // 318.5
unsigned int sin16s::x2
unsigned int sin16s::x2#0 // 2002.0
unsigned int sin16s::x3
unsigned int sin16s::x3#0 // 500.5
unsigned int sin16s::x3_6
unsigned int sin16s::x3_6#0 // 2002.0
unsigned int sin16s::x4
unsigned int sin16s::x4#0 // 2002.0
unsigned int sin16s::x5
unsigned int sin16s::x5#0 // 2002.0
unsigned int sin16s::x5_128
unsigned int sin16s::x5_128#0 // 2002.0
void sin16s_gen(int *sintab , unsigned int wavelength)
int sin16s_gen::$2 // 202.0
unsigned int sin16s_gen::i
unsigned int sin16s_gen::i#1 // 202.0
unsigned int sin16s_gen::i#2 // 33.666666666666664
int *sin16s_gen::sintab
int *sin16s_gen::sintab#0 // 67.33333333333333
int *sin16s_gen::sintab#2 // 43.285714285714285
unsigned long sin16s_gen::step
unsigned long sin16s_gen::step#0 // 10.181818181818182
unsigned int sin16s_gen::wavelength
unsigned long sin16s_gen::x
unsigned long sin16s_gen::x#1 // 101.0
unsigned long sin16s_gen::x#2 // 37.875

Initial phi equivalence classes
[ main::st1#2 main::st1#1 ]
[ sin16s_gen::i#2 sin16s_gen::i#1 ]
[ sin16s_gen::x#2 sin16s_gen::x#1 ]
[ sin16s_gen::sintab#2 sin16s_gen::sintab#0 ]
[ print_str::str#3 print_str::str#6 print_str::str#0 ]
[ print_sint::w#4 print_sint::w#0 print_sint::w#1 ]
[ sin16s::isUpper#2 ]
[ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 ]
[ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 ]
[ memset::dst#2 memset::dst#1 ]
[ print_char::ch#5 print_char::ch#0 print_char::ch#3 print_char::ch#4 ]
[ print_char_cursor#36 print_char_cursor#58 print_char_cursor#54 print_char_cursor#20 print_char_cursor#1 print_char_cursor#12 ]
[ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ]
[ divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ]
[ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ]
[ divr16u::i#2 divr16u::i#1 ]
[ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 ]
[ mulu16_sel::v2#5 mulu16_sel::v2#4 mulu16_sel::v2#0 mulu16_sel::v2#1 mulu16_sel::v2#3 ]
[ mulu16_sel::select#5 ]
[ print_uchar::b#2 print_uchar::b#0 print_uchar::b#1 ]
[ mul16u::a#2 mul16u::a#0 mul16u::a#1 ]
[ mul16u::res#2 mul16u::res#6 mul16u::res#1 ]
[ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
Added variable main::sw#0 to live range equivalence class [ main::sw#0 ]
Added variable div32u16u::return#0 to live range equivalence class [ div32u16u::return#0 ]
Added variable sin16s_gen::step#0 to live range equivalence class [ sin16s_gen::step#0 ]
Added variable sin16s::return#0 to live range equivalence class [ sin16s::return#0 ]
Added variable sin16s_gen::$2 to live range equivalence class [ sin16s_gen::$2 ]
Added variable print_uint::w#0 to live range equivalence class [ print_uint::w#0 ]
Added variable divr16u::return#2 to live range equivalence class [ divr16u::return#2 ]
Added variable div32u16u::quotient_hi#0 to live range equivalence class [ div32u16u::quotient_hi#0 ]
Added variable divr16u::return#3 to live range equivalence class [ divr16u::return#3 ]
Added variable div32u16u::quotient_lo#0 to live range equivalence class [ div32u16u::quotient_lo#0 ]
Added variable div32u16u::return#1 to live range equivalence class [ div32u16u::return#1 ]
Added variable sin16s::$4 to live range equivalence class [ sin16s::$4 ]
Added variable sin16s::x1#0 to live range equivalence class [ sin16s::x1#0 ]
Added variable mulu16_sel::return#0 to live range equivalence class [ mulu16_sel::return#0 ]
Added variable sin16s::x2#0 to live range equivalence class [ sin16s::x2#0 ]
Added variable mulu16_sel::return#1 to live range equivalence class [ mulu16_sel::return#1 ]
Added variable sin16s::x3#0 to live range equivalence class [ sin16s::x3#0 ]
Added variable mulu16_sel::return#2 to live range equivalence class [ mulu16_sel::return#2 ]
Added variable sin16s::x3_6#0 to live range equivalence class [ sin16s::x3_6#0 ]
Added variable sin16s::usinx#0 to live range equivalence class [ sin16s::usinx#0 ]
Added variable mulu16_sel::return#10 to live range equivalence class [ mulu16_sel::return#10 ]
Added variable sin16s::x4#0 to live range equivalence class [ sin16s::x4#0 ]
Added variable mulu16_sel::return#11 to live range equivalence class [ mulu16_sel::return#11 ]
Added variable sin16s::x5#0 to live range equivalence class [ sin16s::x5#0 ]
Added variable sin16s::x5_128#0 to live range equivalence class [ sin16s::x5_128#0 ]
Added variable sin16s::usinx#1 to live range equivalence class [ sin16s::usinx#1 ]
Added variable divr16u::$1 to live range equivalence class [ divr16u::$1 ]
Added variable divr16u::$2 to live range equivalence class [ divr16u::$2 ]
Added variable rem16u#14 to live range equivalence class [ rem16u#14 ]
Added variable mul16u::b#0 to live range equivalence class [ mul16u::b#0 ]
Added variable mul16u::return#0 to live range equivalence class [ mul16u::return#0 ]
Added variable mulu16_sel::$0 to live range equivalence class [ mulu16_sel::$0 ]
Added variable mulu16_sel::$1 to live range equivalence class [ mulu16_sel::$1 ]
Added variable mulu16_sel::return#12 to live range equivalence class [ mulu16_sel::return#12 ]
Added variable print_uchar::$0 to live range equivalence class [ print_uchar::$0 ]
Added variable print_uchar::$2 to live range equivalence class [ print_uchar::$2 ]
Added variable mul16u::$1 to live range equivalence class [ mul16u::$1 ]
Complete equivalence classes
[ main::st1#2 main::st1#1 ]
[ sin16s_gen::i#2 sin16s_gen::i#1 ]
[ sin16s_gen::x#2 sin16s_gen::x#1 ]
[ sin16s_gen::sintab#2 sin16s_gen::sintab#0 ]
[ print_str::str#3 print_str::str#6 print_str::str#0 ]
[ print_sint::w#4 print_sint::w#0 print_sint::w#1 ]
[ sin16s::isUpper#2 ]
[ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 ]
[ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 ]
[ memset::dst#2 memset::dst#1 ]
[ print_char::ch#5 print_char::ch#0 print_char::ch#3 print_char::ch#4 ]
[ print_char_cursor#36 print_char_cursor#58 print_char_cursor#54 print_char_cursor#20 print_char_cursor#1 print_char_cursor#12 ]
[ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ]
[ divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ]
[ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ]
[ divr16u::i#2 divr16u::i#1 ]
[ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 ]
[ mulu16_sel::v2#5 mulu16_sel::v2#4 mulu16_sel::v2#0 mulu16_sel::v2#1 mulu16_sel::v2#3 ]
[ mulu16_sel::select#5 ]
[ print_uchar::b#2 print_uchar::b#0 print_uchar::b#1 ]
[ mul16u::a#2 mul16u::a#0 mul16u::a#1 ]
[ mul16u::res#2 mul16u::res#6 mul16u::res#1 ]
[ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
[ main::sw#0 ]
[ div32u16u::return#0 ]
[ sin16s_gen::step#0 ]
[ sin16s::return#0 ]
[ sin16s_gen::$2 ]
[ print_uint::w#0 ]
[ divr16u::return#2 ]
[ div32u16u::quotient_hi#0 ]
[ divr16u::return#3 ]
[ div32u16u::quotient_lo#0 ]
[ div32u16u::return#1 ]
[ sin16s::$4 ]
[ sin16s::x1#0 ]
[ mulu16_sel::return#0 ]
[ sin16s::x2#0 ]
[ mulu16_sel::return#1 ]
[ sin16s::x3#0 ]
[ mulu16_sel::return#2 ]
[ sin16s::x3_6#0 ]
[ sin16s::usinx#0 ]
[ mulu16_sel::return#10 ]
[ sin16s::x4#0 ]
[ mulu16_sel::return#11 ]
[ sin16s::x5#0 ]
[ sin16s::x5_128#0 ]
[ sin16s::usinx#1 ]
[ divr16u::$1 ]
[ divr16u::$2 ]
[ rem16u#14 ]
[ mul16u::b#0 ]
[ mul16u::return#0 ]
[ mulu16_sel::$0 ]
[ mulu16_sel::$1 ]
[ mulu16_sel::return#12 ]
[ print_uchar::$0 ]
[ print_uchar::$2 ]
[ mul16u::$1 ]
Allocated zp[4]:2 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 ]
Allocated zp[4]:6 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
Allocated zp[1]:10 [ mul16u::$1 ]
Allocated zp[2]:11 [ mul16u::a#2 mul16u::a#0 mul16u::a#1 ]
Allocated zp[1]:13 [ print_char::ch#5 print_char::ch#0 print_char::ch#3 print_char::ch#4 ]
Allocated zp[2]:14 [ print_char_cursor#36 print_char_cursor#58 print_char_cursor#54 print_char_cursor#20 print_char_cursor#1 print_char_cursor#12 ]
Allocated zp[2]:16 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ]
Allocated zp[2]:18 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ]
Allocated zp[2]:20 [ print_str::str#3 print_str::str#6 print_str::str#0 ]
Allocated zp[2]:22 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 ]
Allocated zp[1]:24 [ divr16u::$1 ]
Allocated zp[1]:25 [ divr16u::$2 ]
Allocated zp[4]:26 [ mul16u::return#0 ]
Allocated zp[4]:30 [ mulu16_sel::$0 ]
Allocated zp[4]:34 [ mulu16_sel::$1 ]
Allocated zp[1]:38 [ print_uchar::$0 ]
Allocated zp[1]:39 [ print_uchar::$2 ]
Allocated zp[1]:40 [ divr16u::i#2 divr16u::i#1 ]
Allocated zp[2]:41 [ mulu16_sel::v2#5 mulu16_sel::v2#4 mulu16_sel::v2#0 mulu16_sel::v2#1 mulu16_sel::v2#3 ]
Allocated zp[4]:43 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 ]
Allocated zp[2]:47 [ mul16u::b#0 ]
Allocated zp[1]:49 [ print_uchar::b#2 print_uchar::b#0 print_uchar::b#1 ]
Allocated zp[2]:50 [ divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ]
Allocated zp[2]:52 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 ]
Allocated zp[2]:54 [ memset::dst#2 memset::dst#1 ]
Allocated zp[2]:56 [ mulu16_sel::return#12 ]
Allocated zp[4]:58 [ sin16s::$4 ]
Allocated zp[2]:62 [ mulu16_sel::return#0 ]
Allocated zp[2]:64 [ sin16s::x2#0 ]
Allocated zp[2]:66 [ mulu16_sel::return#1 ]
Allocated zp[2]:68 [ mulu16_sel::return#2 ]
Allocated zp[2]:70 [ sin16s::x3_6#0 ]
Allocated zp[2]:72 [ mulu16_sel::return#10 ]
Allocated zp[2]:74 [ sin16s::x4#0 ]
Allocated zp[2]:76 [ mulu16_sel::return#11 ]
Allocated zp[2]:78 [ sin16s::x5#0 ]
Allocated zp[2]:80 [ sin16s::x5_128#0 ]
Allocated zp[1]:82 [ mulu16_sel::select#5 ]
Allocated zp[2]:83 [ print_uint::w#0 ]
Allocated zp[2]:85 [ sin16s::x3#0 ]
Allocated zp[2]:87 [ sin16s::usinx#1 ]
Allocated zp[2]:89 [ print_sint::w#4 print_sint::w#0 print_sint::w#1 ]
Allocated zp[2]:91 [ sin16s::x1#0 ]
Allocated zp[2]:93 [ sin16s_gen::i#2 sin16s_gen::i#1 ]
Allocated zp[2]:95 [ rem16u#14 ]
Allocated zp[2]:97 [ sin16s::return#0 ]
Allocated zp[2]:99 [ sin16s_gen::$2 ]
Allocated zp[2]:101 [ divr16u::return#2 ]
Allocated zp[2]:103 [ divr16u::return#3 ]
Allocated zp[2]:105 [ div32u16u::quotient_lo#0 ]
Allocated zp[2]:107 [ sin16s::usinx#0 ]
Allocated zp[4]:109 [ sin16s_gen::x#2 sin16s_gen::x#1 ]
Allocated zp[2]:113 [ sin16s_gen::sintab#2 sin16s_gen::sintab#0 ]
Allocated zp[2]:115 [ div32u16u::quotient_hi#0 ]
Allocated zp[4]:117 [ div32u16u::return#1 ]
Allocated zp[1]:121 [ sin16s::isUpper#2 ]
Allocated zp[2]:122 [ main::st1#2 main::st1#1 ]
Allocated zp[4]:124 [ div32u16u::return#0 ]
Allocated zp[4]:128 [ sin16s_gen::step#0 ]
Allocated zp[2]:132 [ main::sw#0 ]
REGISTER UPLIFT POTENTIAL REGISTERS
Statement [5] if(main::st1#2<main::sintab1+main::wavelength*SIZEOF_INT) goto main::@2 [ main::st1#2 print_char_cursor#20 ] (  [ main::st1#2 print_char_cursor#20 ] { }  ) always clobbers reg byte a 
Statement [7] main::sw#0 = *main::st1#2 [ main::st1#2 print_char_cursor#20 main::sw#0 ] (  [ main::st1#2 print_char_cursor#20 main::sw#0 ] { }  ) always clobbers reg byte a reg byte y 
Statement [8] if(main::sw#0<0) goto main::@3 [ main::st1#2 print_char_cursor#20 main::sw#0 ] (  [ main::st1#2 print_char_cursor#20 main::sw#0 ] { }  ) always clobbers reg byte a 
Statement [12] print_sint::w#1 = main::sw#0 [ main::st1#2 print_char_cursor#54 print_sint::w#1 ] (  [ main::st1#2 print_char_cursor#54 print_sint::w#1 ] { { print_sint::w#1 = main::sw#0 } }  ) always clobbers reg byte a 
Statement [16] main::st1#1 = main::st1#2 + SIZEOF_INT [ main::st1#1 print_char_cursor#1 ] (  [ main::st1#1 print_char_cursor#1 ] { }  ) always clobbers reg byte a 
Statement [19] div32u16u::return#0 = div32u16u::return#1 [ div32u16u::return#0 ] ( sin16s_gen:1 [ div32u16u::return#0 ] { { div32u16u::return#0 = div32u16u::return#1 } }  ) always clobbers reg byte a 
Statement [20] sin16s_gen::step#0 = div32u16u::return#0 [ sin16s_gen::step#0 ] ( sin16s_gen:1 [ sin16s_gen::step#0 ] { }  ) always clobbers reg byte a 
Statement [22] if(sin16s_gen::i#2<main::wavelength) goto sin16s_gen::@2 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 ] { }  ) always clobbers reg byte a 
Statement [24] sin16s::x#0 = sin16s_gen::x#2 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::x#0 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::x#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [26] sin16s::return#0 = sin16s::return#1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::return#0 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [27] sin16s_gen::$2 = sin16s::return#0 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::$2 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::$2 ] { }  ) always clobbers reg byte a 
Statement [28] *sin16s_gen::sintab#2 = sin16s_gen::$2 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 ] { }  ) always clobbers reg byte a reg byte y 
Statement [29] sin16s_gen::sintab#0 = sin16s_gen::sintab#2 + SIZEOF_INT [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#0 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#0 ] { }  ) always clobbers reg byte a 
Statement [30] sin16s_gen::x#1 = sin16s_gen::x#2 + sin16s_gen::step#0 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#1 sin16s_gen::sintab#0 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#1 sin16s_gen::sintab#0 ] { }  ) always clobbers reg byte a 
Statement [37] if(0!=*print_str::str#3) goto print_str::@2 [ print_char_cursor#1 print_str::str#3 ] ( print_str:10 [ main::st1#2 main::sw#0 print_char_cursor#1 print_str::str#3 ] { { print_char_cursor#20 = print_char_cursor#58 } }  print_str:15 [ main::st1#2 print_char_cursor#1 print_str::str#3 ] { { print_char_cursor#12 = print_char_cursor#58 } }  ) always clobbers reg byte a reg byte y 
Statement [39] print_char::ch#0 = *print_str::str#3 [ print_char_cursor#1 print_str::str#3 print_char::ch#0 ] ( print_str:10 [ main::st1#2 main::sw#0 print_char_cursor#1 print_str::str#3 print_char::ch#0 ] { { print_char_cursor#20 = print_char_cursor#58 } { print_char::ch#0 = print_char::ch#5 } { print_char_cursor#1 = print_char_cursor#36 } }  print_str:15 [ main::st1#2 print_char_cursor#1 print_str::str#3 print_char::ch#0 ] { { print_char_cursor#12 = print_char_cursor#58 } { print_char::ch#0 = print_char::ch#5 } { print_char_cursor#1 = print_char_cursor#36 } }  ) always clobbers reg byte a reg byte y 
Statement [42] if(print_sint::w#1<0) goto print_sint::@1 [ print_char_cursor#54 print_sint::w#1 ] ( print_sint:13 [ main::st1#2 print_char_cursor#54 print_sint::w#1 ] { { print_sint::w#1 = main::sw#0 } }  ) always clobbers reg byte a 
Statement [46] print_uint::w#0 = (unsigned int)print_sint::w#4 [ print_char_cursor#12 print_uint::w#0 ] ( print_sint:13 [ main::st1#2 print_char_cursor#12 print_uint::w#0 ] { { print_sint::w#1 = main::sw#0 } }  ) always clobbers reg byte a 
Statement [51] print_sint::w#0 = - print_sint::w#1 [ print_char_cursor#12 print_sint::w#0 ] ( print_sint:13 [ main::st1#2 print_char_cursor#12 print_sint::w#0 ] { { print_sint::w#1 = main::sw#0 } }  ) always clobbers reg byte a 
Statement [54] divr16u::return#2 = divr16u::return#0 [ divr16u::return#2 rem16u#14 ] ( sin16s_gen:1::div32u16u:18 [ divr16u::return#2 rem16u#14 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::return#0 = divr16u::return#2 } }  ) always clobbers reg byte a 
Statement [55] div32u16u::quotient_hi#0 = divr16u::return#2 [ div32u16u::quotient_hi#0 rem16u#14 ] ( sin16s_gen:1::div32u16u:18 [ div32u16u::quotient_hi#0 rem16u#14 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [56] divr16u::rem#4 = rem16u#14 [ div32u16u::quotient_hi#0 divr16u::rem#4 ] ( sin16s_gen:1::div32u16u:18 [ div32u16u::quotient_hi#0 divr16u::rem#4 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [58] divr16u::return#3 = divr16u::return#0 [ div32u16u::quotient_hi#0 divr16u::return#3 ] ( sin16s_gen:1::div32u16u:18 [ div32u16u::quotient_hi#0 divr16u::return#3 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [59] div32u16u::quotient_lo#0 = divr16u::return#3 [ div32u16u::quotient_hi#0 div32u16u::quotient_lo#0 ] ( sin16s_gen:1::div32u16u:18 [ div32u16u::quotient_hi#0 div32u16u::quotient_lo#0 ] { { div32u16u::return#0 = div32u16u::return#1 } }  ) always clobbers reg byte a 
Statement [60] div32u16u::return#1 = div32u16u::quotient_hi#0 dw= div32u16u::quotient_lo#0 [ div32u16u::return#1 ] ( sin16s_gen:1::div32u16u:18 [ div32u16u::return#1 ] { { div32u16u::return#0 = div32u16u::return#1 } }  ) always clobbers reg byte a 
Statement [62] if(sin16s::x#0<PI_u4f28) goto sin16s::@1 [ sin16s::x#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::x#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [63] sin16s::x#1 = sin16s::x#0 - PI_u4f28 [ sin16s::x#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::x#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [65] if(sin16s::x#4<PI_HALF_u4f28) goto sin16s::@2 [ sin16s::x#4 sin16s::isUpper#2 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::x#4 sin16s::isUpper#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Removing always clobbered register reg byte a as potential for zp[1]:121 [ sin16s::isUpper#2 ]
Statement [66] sin16s::x#2 = PI_u4f28 - sin16s::x#4 [ sin16s::isUpper#2 sin16s::x#2 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [68] sin16s::$4 = sin16s::x#6 << 3 [ sin16s::isUpper#2 sin16s::$4 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::$4 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [69] sin16s::x1#0 = word1  sin16s::$4 [ sin16s::isUpper#2 sin16s::x1#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [70] mulu16_sel::v1#0 = sin16s::x1#0 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [71] mulu16_sel::v2#0 = sin16s::x1#0 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#0 mulu16_sel::v2#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#0 mulu16_sel::v2#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [73] mulu16_sel::return#0 = mulu16_sel::return#12 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [74] sin16s::x2#0 = mulu16_sel::return#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x2#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x2#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [75] mulu16_sel::v1#1 = sin16s::x2#0 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [76] mulu16_sel::v2#1 = sin16s::x1#0 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#1 mulu16_sel::v2#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#1 mulu16_sel::v2#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [78] mulu16_sel::return#1 = mulu16_sel::return#12 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [79] sin16s::x3#0 = mulu16_sel::return#1 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  ) always clobbers reg byte a 
Statement [80] mulu16_sel::v1#2 = sin16s::x3#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::v1#2 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::v1#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  ) always clobbers reg byte a 
Statement [82] mulu16_sel::return#2 = mulu16_sel::return#12 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::return#2 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::return#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  ) always clobbers reg byte a 
Statement [83] sin16s::x3_6#0 = mulu16_sel::return#2 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [84] sin16s::usinx#0 = sin16s::x1#0 - sin16s::x3_6#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [85] mulu16_sel::v1#3 = sin16s::x3#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#3 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#3 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [86] mulu16_sel::v2#3 = sin16s::x1#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#3 mulu16_sel::v2#3 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#3 mulu16_sel::v2#3 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [88] mulu16_sel::return#10 = mulu16_sel::return#12 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::return#10 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::return#10 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [89] sin16s::x4#0 = mulu16_sel::return#10 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 sin16s::x4#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 sin16s::x4#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [90] mulu16_sel::v1#4 = sin16s::x4#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#4 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#4 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [91] mulu16_sel::v2#4 = sin16s::x1#0 [ sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::v1#4 mulu16_sel::v2#4 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::v1#4 mulu16_sel::v2#4 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [93] mulu16_sel::return#11 = mulu16_sel::return#12 [ sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::return#11 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::return#11 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [94] sin16s::x5#0 = mulu16_sel::return#11 [ sin16s::isUpper#2 sin16s::usinx#0 sin16s::x5#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 sin16s::x5#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [95] sin16s::x5_128#0 = sin16s::x5#0 >> 4 [ sin16s::isUpper#2 sin16s::usinx#0 sin16s::x5_128#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 sin16s::x5_128#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [96] sin16s::usinx#1 = sin16s::usinx#0 + sin16s::x5_128#0 [ sin16s::isUpper#2 sin16s::usinx#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [98] sin16s::sinx#1 = - (int)sin16s::usinx#1 [ sin16s::sinx#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::sinx#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [101] sin16s::return#5 = (int)sin16s::usinx#1 [ sin16s::return#5 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::return#5 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [104] if(memset::dst#2!=memset::end#0) goto memset::@2 [ memset::dst#2 ] ( print_cls:3::memset:33 [ memset::dst#2 ] { }  ) always clobbers reg byte a 
Statement [106] *memset::dst#2 = memset::c#0 [ memset::dst#2 ] ( print_cls:3::memset:33 [ memset::dst#2 ] { }  ) always clobbers reg byte a reg byte y 
Statement [109] *print_char_cursor#36 = print_char::ch#5 [ print_char_cursor#36 ] ( print_str:10::print_char:40 [ main::st1#2 main::sw#0 print_str::str#3 print_char_cursor#36 ] { { print_char_cursor#20 = print_char_cursor#58 } { print_char::ch#0 = print_char::ch#5 } { print_char_cursor#1 = print_char_cursor#36 } }  print_str:15::print_char:40 [ main::st1#2 print_str::str#3 print_char_cursor#36 ] { { print_char_cursor#12 = print_char_cursor#58 } { print_char::ch#0 = print_char::ch#5 } { print_char_cursor#1 = print_char_cursor#36 } }  print_sint:13::print_char:44 [ main::st1#2 print_sint::w#1 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_char_cursor#36 = print_char_cursor#54 } }  print_sint:13::print_char:50 [ main::st1#2 print_sint::w#1 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_char_cursor#36 = print_char_cursor#54 } }  print_sint:13::print_uint:47::print_uchar:113::print_char:147 [ main::st1#2 print_uint::w#0 print_uchar::b#2 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#0 = print_uchar::b#2 } { print_char::ch#3 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  print_sint:13::print_uint:47::print_uchar:115::print_char:147 [ main::st1#2 print_uchar::b#2 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#1 = print_uchar::b#2 } { print_char::ch#3 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  print_sint:13::print_uint:47::print_uchar:113::print_char:150 [ main::st1#2 print_uint::w#0 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#0 = print_uchar::b#2 } { print_char::ch#4 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  print_sint:13::print_uint:47::print_uchar:115::print_char:150 [ main::st1#2 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#1 = print_uchar::b#2 } { print_char::ch#4 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  ) always clobbers reg byte y 
Removing always clobbered register reg byte y as potential for zp[1]:49 [ print_uchar::b#2 print_uchar::b#0 print_uchar::b#1 ]
Statement [123] divr16u::rem#1 = divr16u::rem#0 | 1 [ divr16u::dividend#3 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] ( sin16s_gen:1::div32u16u:18::divr16u:53 [ divr16u::dividend#3 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::return#0 = divr16u::return#2 } }  sin16s_gen:1::div32u16u:18::divr16u:57 [ div32u16u::quotient_hi#0 divr16u::dividend#3 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Removing always clobbered register reg byte a as potential for zp[1]:40 [ divr16u::i#2 divr16u::i#1 ]
Statement [127] if(divr16u::rem#6<main::wavelength) goto divr16u::@3 [ divr16u::i#2 divr16u::dividend#0 divr16u::rem#6 divr16u::quotient#1 ] ( sin16s_gen:1::div32u16u:18::divr16u:53 [ divr16u::i#2 divr16u::dividend#0 divr16u::rem#6 divr16u::quotient#1 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::return#0 = divr16u::return#2 } }  sin16s_gen:1::div32u16u:18::divr16u:57 [ div32u16u::quotient_hi#0 divr16u::i#2 divr16u::dividend#0 divr16u::rem#6 divr16u::quotient#1 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [129] divr16u::rem#2 = divr16u::rem#6 - main::wavelength [ divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] ( sin16s_gen:1::div32u16u:18::divr16u:53 [ divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::return#0 = divr16u::return#2 } }  sin16s_gen:1::div32u16u:18::divr16u:57 [ div32u16u::quotient_hi#0 divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [133] rem16u#14 = divr16u::rem#11 [ divr16u::return#0 rem16u#14 ] ( sin16s_gen:1::div32u16u:18::divr16u:53 [ divr16u::return#0 rem16u#14 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::return#0 = divr16u::return#2 } }  sin16s_gen:1::div32u16u:18::divr16u:57 [ div32u16u::quotient_hi#0 divr16u::return#0 rem16u#14 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [136] mul16u::a#0 = mulu16_sel::v1#5 [ mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Removing always clobbered register reg byte a as potential for zp[1]:82 [ mulu16_sel::select#5 ]
Statement [137] mul16u::b#0 = mulu16_sel::v2#5 [ mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [139] mul16u::return#0 = mul16u::res#2 [ mulu16_sel::select#5 mul16u::return#0 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [140] mulu16_sel::$0 = mul16u::return#0 [ mulu16_sel::select#5 mulu16_sel::$0 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mulu16_sel::$0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mulu16_sel::$0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mulu16_sel::$0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mulu16_sel::$0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mulu16_sel::$0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [141] mulu16_sel::$1 = mulu16_sel::$0 << mulu16_sel::select#5 [ mulu16_sel::$1 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [142] mulu16_sel::return#12 = word1  mulu16_sel::$1 [ mulu16_sel::return#12 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#12 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#12 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::return#12 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::return#12 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::return#12 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [145] print_uchar::$0 = print_uchar::b#2 >> 4 [ print_char_cursor#12 print_uchar::b#2 print_uchar::$0 ] ( print_sint:13::print_uint:47::print_uchar:113 [ main::st1#2 print_uint::w#0 print_char_cursor#12 print_uchar::b#2 print_uchar::$0 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#0 = print_uchar::b#2 } { print_char::ch#3 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  print_sint:13::print_uint:47::print_uchar:115 [ main::st1#2 print_char_cursor#12 print_uchar::b#2 print_uchar::$0 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#1 = print_uchar::b#2 } { print_char::ch#3 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  ) always clobbers reg byte a 
Removing always clobbered register reg byte a as potential for zp[1]:49 [ print_uchar::b#2 print_uchar::b#0 print_uchar::b#1 ]
Statement [148] print_uchar::$2 = print_uchar::b#2 & $f [ print_char_cursor#12 print_uchar::$2 ] ( print_sint:13::print_uint:47::print_uchar:113 [ main::st1#2 print_uint::w#0 print_char_cursor#12 print_uchar::$2 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#0 = print_uchar::b#2 } { print_char::ch#4 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  print_sint:13::print_uint:47::print_uchar:115 [ main::st1#2 print_char_cursor#12 print_uchar::$2 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#1 = print_uchar::b#2 } { print_char::ch#4 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  ) always clobbers reg byte a 
Statement [152] mul16u::mb#0 = (unsigned long)mul16u::b#0 [ mul16u::a#0 mul16u::mb#0 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#0 mul16u::mb#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#0 mul16u::mb#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::a#0 mul16u::mb#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#0 mul16u::mb#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#0 mul16u::mb#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [154] if(mul16u::a#2!=0) goto mul16u::@2 [ mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [156] mul16u::$1 = mul16u::a#2 & 1 [ mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [158] mul16u::res#1 = mul16u::res#2 + mul16u::mb#2 [ mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [5] if(main::st1#2<main::sintab1+main::wavelength*SIZEOF_INT) goto main::@2 [ main::st1#2 print_char_cursor#20 ] (  [ main::st1#2 print_char_cursor#20 ] { }  ) always clobbers reg byte a 
Statement [7] main::sw#0 = *main::st1#2 [ main::st1#2 print_char_cursor#20 main::sw#0 ] (  [ main::st1#2 print_char_cursor#20 main::sw#0 ] { }  ) always clobbers reg byte a reg byte y 
Statement [8] if(main::sw#0<0) goto main::@3 [ main::st1#2 print_char_cursor#20 main::sw#0 ] (  [ main::st1#2 print_char_cursor#20 main::sw#0 ] { }  ) always clobbers reg byte a 
Statement [12] print_sint::w#1 = main::sw#0 [ main::st1#2 print_char_cursor#54 print_sint::w#1 ] (  [ main::st1#2 print_char_cursor#54 print_sint::w#1 ] { { print_sint::w#1 = main::sw#0 } }  ) always clobbers reg byte a 
Statement [16] main::st1#1 = main::st1#2 + SIZEOF_INT [ main::st1#1 print_char_cursor#1 ] (  [ main::st1#1 print_char_cursor#1 ] { }  ) always clobbers reg byte a 
Statement [19] div32u16u::return#0 = div32u16u::return#1 [ div32u16u::return#0 ] ( sin16s_gen:1 [ div32u16u::return#0 ] { { div32u16u::return#0 = div32u16u::return#1 } }  ) always clobbers reg byte a 
Statement [20] sin16s_gen::step#0 = div32u16u::return#0 [ sin16s_gen::step#0 ] ( sin16s_gen:1 [ sin16s_gen::step#0 ] { }  ) always clobbers reg byte a 
Statement [22] if(sin16s_gen::i#2<main::wavelength) goto sin16s_gen::@2 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 ] { }  ) always clobbers reg byte a 
Statement [24] sin16s::x#0 = sin16s_gen::x#2 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::x#0 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::x#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [26] sin16s::return#0 = sin16s::return#1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::return#0 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [27] sin16s_gen::$2 = sin16s::return#0 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::$2 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::$2 ] { }  ) always clobbers reg byte a 
Statement [28] *sin16s_gen::sintab#2 = sin16s_gen::$2 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 ] { }  ) always clobbers reg byte a reg byte y 
Statement [29] sin16s_gen::sintab#0 = sin16s_gen::sintab#2 + SIZEOF_INT [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#0 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#0 ] { }  ) always clobbers reg byte a 
Statement [30] sin16s_gen::x#1 = sin16s_gen::x#2 + sin16s_gen::step#0 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#1 sin16s_gen::sintab#0 ] ( sin16s_gen:1 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#1 sin16s_gen::sintab#0 ] { }  ) always clobbers reg byte a 
Statement [37] if(0!=*print_str::str#3) goto print_str::@2 [ print_char_cursor#1 print_str::str#3 ] ( print_str:10 [ main::st1#2 main::sw#0 print_char_cursor#1 print_str::str#3 ] { { print_char_cursor#20 = print_char_cursor#58 } }  print_str:15 [ main::st1#2 print_char_cursor#1 print_str::str#3 ] { { print_char_cursor#12 = print_char_cursor#58 } }  ) always clobbers reg byte a reg byte y 
Statement [39] print_char::ch#0 = *print_str::str#3 [ print_char_cursor#1 print_str::str#3 print_char::ch#0 ] ( print_str:10 [ main::st1#2 main::sw#0 print_char_cursor#1 print_str::str#3 print_char::ch#0 ] { { print_char_cursor#20 = print_char_cursor#58 } { print_char::ch#0 = print_char::ch#5 } { print_char_cursor#1 = print_char_cursor#36 } }  print_str:15 [ main::st1#2 print_char_cursor#1 print_str::str#3 print_char::ch#0 ] { { print_char_cursor#12 = print_char_cursor#58 } { print_char::ch#0 = print_char::ch#5 } { print_char_cursor#1 = print_char_cursor#36 } }  ) always clobbers reg byte a reg byte y 
Statement [42] if(print_sint::w#1<0) goto print_sint::@1 [ print_char_cursor#54 print_sint::w#1 ] ( print_sint:13 [ main::st1#2 print_char_cursor#54 print_sint::w#1 ] { { print_sint::w#1 = main::sw#0 } }  ) always clobbers reg byte a 
Statement [46] print_uint::w#0 = (unsigned int)print_sint::w#4 [ print_char_cursor#12 print_uint::w#0 ] ( print_sint:13 [ main::st1#2 print_char_cursor#12 print_uint::w#0 ] { { print_sint::w#1 = main::sw#0 } }  ) always clobbers reg byte a 
Statement [51] print_sint::w#0 = - print_sint::w#1 [ print_char_cursor#12 print_sint::w#0 ] ( print_sint:13 [ main::st1#2 print_char_cursor#12 print_sint::w#0 ] { { print_sint::w#1 = main::sw#0 } }  ) always clobbers reg byte a 
Statement [54] divr16u::return#2 = divr16u::return#0 [ divr16u::return#2 rem16u#14 ] ( sin16s_gen:1::div32u16u:18 [ divr16u::return#2 rem16u#14 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::return#0 = divr16u::return#2 } }  ) always clobbers reg byte a 
Statement [55] div32u16u::quotient_hi#0 = divr16u::return#2 [ div32u16u::quotient_hi#0 rem16u#14 ] ( sin16s_gen:1::div32u16u:18 [ div32u16u::quotient_hi#0 rem16u#14 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [56] divr16u::rem#4 = rem16u#14 [ div32u16u::quotient_hi#0 divr16u::rem#4 ] ( sin16s_gen:1::div32u16u:18 [ div32u16u::quotient_hi#0 divr16u::rem#4 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [58] divr16u::return#3 = divr16u::return#0 [ div32u16u::quotient_hi#0 divr16u::return#3 ] ( sin16s_gen:1::div32u16u:18 [ div32u16u::quotient_hi#0 divr16u::return#3 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [59] div32u16u::quotient_lo#0 = divr16u::return#3 [ div32u16u::quotient_hi#0 div32u16u::quotient_lo#0 ] ( sin16s_gen:1::div32u16u:18 [ div32u16u::quotient_hi#0 div32u16u::quotient_lo#0 ] { { div32u16u::return#0 = div32u16u::return#1 } }  ) always clobbers reg byte a 
Statement [60] div32u16u::return#1 = div32u16u::quotient_hi#0 dw= div32u16u::quotient_lo#0 [ div32u16u::return#1 ] ( sin16s_gen:1::div32u16u:18 [ div32u16u::return#1 ] { { div32u16u::return#0 = div32u16u::return#1 } }  ) always clobbers reg byte a 
Statement [62] if(sin16s::x#0<PI_u4f28) goto sin16s::@1 [ sin16s::x#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::x#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [63] sin16s::x#1 = sin16s::x#0 - PI_u4f28 [ sin16s::x#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::x#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [65] if(sin16s::x#4<PI_HALF_u4f28) goto sin16s::@2 [ sin16s::x#4 sin16s::isUpper#2 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::x#4 sin16s::isUpper#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [66] sin16s::x#2 = PI_u4f28 - sin16s::x#4 [ sin16s::isUpper#2 sin16s::x#2 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [68] sin16s::$4 = sin16s::x#6 << 3 [ sin16s::isUpper#2 sin16s::$4 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::$4 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [69] sin16s::x1#0 = word1  sin16s::$4 [ sin16s::isUpper#2 sin16s::x1#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [70] mulu16_sel::v1#0 = sin16s::x1#0 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [71] mulu16_sel::v2#0 = sin16s::x1#0 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#0 mulu16_sel::v2#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#0 mulu16_sel::v2#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [73] mulu16_sel::return#0 = mulu16_sel::return#12 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [74] sin16s::x2#0 = mulu16_sel::return#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x2#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x2#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [75] mulu16_sel::v1#1 = sin16s::x2#0 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [76] mulu16_sel::v2#1 = sin16s::x1#0 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#1 mulu16_sel::v2#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v1#1 mulu16_sel::v2#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [78] mulu16_sel::return#1 = mulu16_sel::return#12 [ sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [79] sin16s::x3#0 = mulu16_sel::return#1 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  ) always clobbers reg byte a 
Statement [80] mulu16_sel::v1#2 = sin16s::x3#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::v1#2 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::v1#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  ) always clobbers reg byte a 
Statement [82] mulu16_sel::return#2 = mulu16_sel::return#12 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::return#2 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::return#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  ) always clobbers reg byte a 
Statement [83] sin16s::x3_6#0 = mulu16_sel::return#2 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [84] sin16s::usinx#0 = sin16s::x1#0 - sin16s::x3_6#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [85] mulu16_sel::v1#3 = sin16s::x3#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#3 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#3 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [86] mulu16_sel::v2#3 = sin16s::x1#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#3 mulu16_sel::v2#3 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#3 mulu16_sel::v2#3 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [88] mulu16_sel::return#10 = mulu16_sel::return#12 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::return#10 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::return#10 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [89] sin16s::x4#0 = mulu16_sel::return#10 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 sin16s::x4#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 sin16s::x4#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [90] mulu16_sel::v1#4 = sin16s::x4#0 [ sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#4 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v1#4 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [91] mulu16_sel::v2#4 = sin16s::x1#0 [ sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::v1#4 mulu16_sel::v2#4 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::v1#4 mulu16_sel::v2#4 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [93] mulu16_sel::return#11 = mulu16_sel::return#12 [ sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::return#11 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::return#11 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [94] sin16s::x5#0 = mulu16_sel::return#11 [ sin16s::isUpper#2 sin16s::usinx#0 sin16s::x5#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 sin16s::x5#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [95] sin16s::x5_128#0 = sin16s::x5#0 >> 4 [ sin16s::isUpper#2 sin16s::usinx#0 sin16s::x5_128#0 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 sin16s::x5_128#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [96] sin16s::usinx#1 = sin16s::usinx#0 + sin16s::x5_128#0 [ sin16s::isUpper#2 sin16s::usinx#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [98] sin16s::sinx#1 = - (int)sin16s::usinx#1 [ sin16s::sinx#1 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::sinx#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [101] sin16s::return#5 = (int)sin16s::usinx#1 [ sin16s::return#5 ] ( sin16s_gen:1::sin16s:25 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::return#5 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } }  ) always clobbers reg byte a 
Statement [104] if(memset::dst#2!=memset::end#0) goto memset::@2 [ memset::dst#2 ] ( print_cls:3::memset:33 [ memset::dst#2 ] { }  ) always clobbers reg byte a 
Statement [106] *memset::dst#2 = memset::c#0 [ memset::dst#2 ] ( print_cls:3::memset:33 [ memset::dst#2 ] { }  ) always clobbers reg byte a reg byte y 
Statement [109] *print_char_cursor#36 = print_char::ch#5 [ print_char_cursor#36 ] ( print_str:10::print_char:40 [ main::st1#2 main::sw#0 print_str::str#3 print_char_cursor#36 ] { { print_char_cursor#20 = print_char_cursor#58 } { print_char::ch#0 = print_char::ch#5 } { print_char_cursor#1 = print_char_cursor#36 } }  print_str:15::print_char:40 [ main::st1#2 print_str::str#3 print_char_cursor#36 ] { { print_char_cursor#12 = print_char_cursor#58 } { print_char::ch#0 = print_char::ch#5 } { print_char_cursor#1 = print_char_cursor#36 } }  print_sint:13::print_char:44 [ main::st1#2 print_sint::w#1 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_char_cursor#36 = print_char_cursor#54 } }  print_sint:13::print_char:50 [ main::st1#2 print_sint::w#1 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_char_cursor#36 = print_char_cursor#54 } }  print_sint:13::print_uint:47::print_uchar:113::print_char:147 [ main::st1#2 print_uint::w#0 print_uchar::b#2 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#0 = print_uchar::b#2 } { print_char::ch#3 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  print_sint:13::print_uint:47::print_uchar:115::print_char:147 [ main::st1#2 print_uchar::b#2 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#1 = print_uchar::b#2 } { print_char::ch#3 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  print_sint:13::print_uint:47::print_uchar:113::print_char:150 [ main::st1#2 print_uint::w#0 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#0 = print_uchar::b#2 } { print_char::ch#4 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  print_sint:13::print_uint:47::print_uchar:115::print_char:150 [ main::st1#2 print_char_cursor#36 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#1 = print_uchar::b#2 } { print_char::ch#4 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  ) always clobbers reg byte y 
Statement [123] divr16u::rem#1 = divr16u::rem#0 | 1 [ divr16u::dividend#3 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] ( sin16s_gen:1::div32u16u:18::divr16u:53 [ divr16u::dividend#3 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::return#0 = divr16u::return#2 } }  sin16s_gen:1::div32u16u:18::divr16u:57 [ div32u16u::quotient_hi#0 divr16u::dividend#3 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [127] if(divr16u::rem#6<main::wavelength) goto divr16u::@3 [ divr16u::i#2 divr16u::dividend#0 divr16u::rem#6 divr16u::quotient#1 ] ( sin16s_gen:1::div32u16u:18::divr16u:53 [ divr16u::i#2 divr16u::dividend#0 divr16u::rem#6 divr16u::quotient#1 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::return#0 = divr16u::return#2 } }  sin16s_gen:1::div32u16u:18::divr16u:57 [ div32u16u::quotient_hi#0 divr16u::i#2 divr16u::dividend#0 divr16u::rem#6 divr16u::quotient#1 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [129] divr16u::rem#2 = divr16u::rem#6 - main::wavelength [ divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] ( sin16s_gen:1::div32u16u:18::divr16u:53 [ divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::return#0 = divr16u::return#2 } }  sin16s_gen:1::div32u16u:18::divr16u:57 [ div32u16u::quotient_hi#0 divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [133] rem16u#14 = divr16u::rem#11 [ divr16u::return#0 rem16u#14 ] ( sin16s_gen:1::div32u16u:18::divr16u:53 [ divr16u::return#0 rem16u#14 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::return#0 = divr16u::return#2 } }  sin16s_gen:1::div32u16u:18::divr16u:57 [ div32u16u::quotient_hi#0 divr16u::return#0 rem16u#14 ] { { div32u16u::return#0 = div32u16u::return#1 } { divr16u::rem#10 = divr16u::rem#4 rem16u#14 } { divr16u::return#0 = divr16u::return#3 } }  ) always clobbers reg byte a 
Statement [136] mul16u::a#0 = mulu16_sel::v1#5 [ mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::v2#5 mulu16_sel::select#5 mul16u::a#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [137] mul16u::b#0 = mulu16_sel::v2#5 [ mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#0 mul16u::b#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [139] mul16u::return#0 = mul16u::res#2 [ mulu16_sel::select#5 mul16u::return#0 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::return#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [140] mulu16_sel::$0 = mul16u::return#0 [ mulu16_sel::select#5 mulu16_sel::$0 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mulu16_sel::$0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mulu16_sel::$0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mulu16_sel::$0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mulu16_sel::$0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mulu16_sel::$0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [141] mulu16_sel::$1 = mulu16_sel::$0 << mulu16_sel::select#5 [ mulu16_sel::$1 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [142] mulu16_sel::return#12 = word1  mulu16_sel::$1 [ mulu16_sel::return#12 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#12 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::return#12 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::return#12 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::return#12 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::return#12 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } }  ) always clobbers reg byte a 
Statement [145] print_uchar::$0 = print_uchar::b#2 >> 4 [ print_char_cursor#12 print_uchar::b#2 print_uchar::$0 ] ( print_sint:13::print_uint:47::print_uchar:113 [ main::st1#2 print_uint::w#0 print_char_cursor#12 print_uchar::b#2 print_uchar::$0 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#0 = print_uchar::b#2 } { print_char::ch#3 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  print_sint:13::print_uint:47::print_uchar:115 [ main::st1#2 print_char_cursor#12 print_uchar::b#2 print_uchar::$0 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#1 = print_uchar::b#2 } { print_char::ch#3 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  ) always clobbers reg byte a 
Statement [148] print_uchar::$2 = print_uchar::b#2 & $f [ print_char_cursor#12 print_uchar::$2 ] ( print_sint:13::print_uint:47::print_uchar:113 [ main::st1#2 print_uint::w#0 print_char_cursor#12 print_uchar::$2 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#0 = print_uchar::b#2 } { print_char::ch#4 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  print_sint:13::print_uint:47::print_uchar:115 [ main::st1#2 print_char_cursor#12 print_uchar::$2 ] { { print_sint::w#1 = main::sw#0 } { print_uchar::b#1 = print_uchar::b#2 } { print_char::ch#4 = print_char::ch#5 } { print_char_cursor#12 = print_char_cursor#36 } }  ) always clobbers reg byte a 
Statement [152] mul16u::mb#0 = (unsigned long)mul16u::b#0 [ mul16u::a#0 mul16u::mb#0 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#0 mul16u::mb#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#0 mul16u::mb#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::a#0 mul16u::mb#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#0 mul16u::mb#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#0 mul16u::mb#0 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [154] if(mul16u::a#2!=0) goto mul16u::@2 [ mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [156] mul16u::$1 = mul16u::a#2 & 1 [ mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::res#2 mul16u::a#2 mul16u::mb#2 mul16u::$1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Statement [158] mul16u::res#1 = mul16u::res#2 + mul16u::mb#2 [ mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] ( sin16s_gen:1::sin16s:25::mulu16_sel:72::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v2#0 = mulu16_sel::v2#5 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 mul16u::a#0 mul16u::b#0 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:77::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#1 = mulu16_sel::v1#5 sin16s::x2#0 mul16u::a#0 } { mulu16_sel::v2#1 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:81::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#2 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#0 = mulu16_sel::v2#5 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:87::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#3 = mulu16_sel::v1#5 sin16s::x3#0 mul16u::a#0 } { mulu16_sel::v2#3 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  sin16s_gen:1::sin16s:25::mulu16_sel:92::mul16u:138 [ sin16s_gen::step#0 sin16s_gen::i#2 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#2 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::v1#4 = mulu16_sel::v1#5 sin16s::x4#0 mul16u::a#0 } { mulu16_sel::v2#4 = mulu16_sel::v2#5 sin16s::x1#0 mul16u::b#0 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::return#0 = mul16u::res#2 } }  ) always clobbers reg byte a 
Potential registers zp[2]:122 [ main::st1#2 main::st1#1 ] : zp[2]:122 , 
Potential registers zp[2]:93 [ sin16s_gen::i#2 sin16s_gen::i#1 ] : zp[2]:93 , 
Potential registers zp[4]:109 [ sin16s_gen::x#2 sin16s_gen::x#1 ] : zp[4]:109 , 
Potential registers zp[2]:113 [ sin16s_gen::sintab#2 sin16s_gen::sintab#0 ] : zp[2]:113 , 
Potential registers zp[2]:20 [ print_str::str#3 print_str::str#6 print_str::str#0 ] : zp[2]:20 , 
Potential registers zp[2]:89 [ print_sint::w#4 print_sint::w#0 print_sint::w#1 ] : zp[2]:89 , 
Potential registers zp[1]:121 [ sin16s::isUpper#2 ] : zp[1]:121 , reg byte x , reg byte y , 
Potential registers zp[4]:43 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 ] : zp[4]:43 , 
Potential registers zp[2]:52 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 ] : zp[2]:52 , 
Potential registers zp[2]:54 [ memset::dst#2 memset::dst#1 ] : zp[2]:54 , 
Potential registers zp[1]:13 [ print_char::ch#5 print_char::ch#0 print_char::ch#3 print_char::ch#4 ] : zp[1]:13 , reg byte a , reg byte x , reg byte y , 
Potential registers zp[2]:14 [ print_char_cursor#36 print_char_cursor#58 print_char_cursor#54 print_char_cursor#20 print_char_cursor#1 print_char_cursor#12 ] : zp[2]:14 , 
Potential registers zp[2]:16 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] : zp[2]:16 , 
Potential registers zp[2]:50 [ divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ] : zp[2]:50 , 
Potential registers zp[2]:18 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] : zp[2]:18 , 
Potential registers zp[1]:40 [ divr16u::i#2 divr16u::i#1 ] : zp[1]:40 , reg byte x , reg byte y , 
Potential registers zp[2]:22 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 ] : zp[2]:22 , 
Potential registers zp[2]:41 [ mulu16_sel::v2#5 mulu16_sel::v2#4 mulu16_sel::v2#0 mulu16_sel::v2#1 mulu16_sel::v2#3 ] : zp[2]:41 , 
Potential registers zp[1]:82 [ mulu16_sel::select#5 ] : zp[1]:82 , reg byte x , reg byte y , 
Potential registers zp[1]:49 [ print_uchar::b#2 print_uchar::b#0 print_uchar::b#1 ] : zp[1]:49 , reg byte x , 
Potential registers zp[2]:11 [ mul16u::a#2 mul16u::a#0 mul16u::a#1 ] : zp[2]:11 , 
Potential registers zp[4]:2 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 ] : zp[4]:2 , 
Potential registers zp[4]:6 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ] : zp[4]:6 , 
Potential registers zp[2]:132 [ main::sw#0 ] : zp[2]:132 , 
Potential registers zp[4]:124 [ div32u16u::return#0 ] : zp[4]:124 , 
Potential registers zp[4]:128 [ sin16s_gen::step#0 ] : zp[4]:128 , 
Potential registers zp[2]:97 [ sin16s::return#0 ] : zp[2]:97 , 
Potential registers zp[2]:99 [ sin16s_gen::$2 ] : zp[2]:99 , 
Potential registers zp[2]:83 [ print_uint::w#0 ] : zp[2]:83 , 
Potential registers zp[2]:101 [ divr16u::return#2 ] : zp[2]:101 , 
Potential registers zp[2]:115 [ div32u16u::quotient_hi#0 ] : zp[2]:115 , 
Potential registers zp[2]:103 [ divr16u::return#3 ] : zp[2]:103 , 
Potential registers zp[2]:105 [ div32u16u::quotient_lo#0 ] : zp[2]:105 , 
Potential registers zp[4]:117 [ div32u16u::return#1 ] : zp[4]:117 , 
Potential registers zp[4]:58 [ sin16s::$4 ] : zp[4]:58 , 
Potential registers zp[2]:91 [ sin16s::x1#0 ] : zp[2]:91 , 
Potential registers zp[2]:62 [ mulu16_sel::return#0 ] : zp[2]:62 , 
Potential registers zp[2]:64 [ sin16s::x2#0 ] : zp[2]:64 , 
Potential registers zp[2]:66 [ mulu16_sel::return#1 ] : zp[2]:66 , 
Potential registers zp[2]:85 [ sin16s::x3#0 ] : zp[2]:85 , 
Potential registers zp[2]:68 [ mulu16_sel::return#2 ] : zp[2]:68 , 
Potential registers zp[2]:70 [ sin16s::x3_6#0 ] : zp[2]:70 , 
Potential registers zp[2]:107 [ sin16s::usinx#0 ] : zp[2]:107 , 
Potential registers zp[2]:72 [ mulu16_sel::return#10 ] : zp[2]:72 , 
Potential registers zp[2]:74 [ sin16s::x4#0 ] : zp[2]:74 , 
Potential registers zp[2]:76 [ mulu16_sel::return#11 ] : zp[2]:76 , 
Potential registers zp[2]:78 [ sin16s::x5#0 ] : zp[2]:78 , 
Potential registers zp[2]:80 [ sin16s::x5_128#0 ] : zp[2]:80 , 
Potential registers zp[2]:87 [ sin16s::usinx#1 ] : zp[2]:87 , 
Potential registers zp[1]:24 [ divr16u::$1 ] : zp[1]:24 , reg byte a , reg byte x , reg byte y , 
Potential registers zp[1]:25 [ divr16u::$2 ] : zp[1]:25 , reg byte a , reg byte x , reg byte y , 
Potential registers zp[2]:95 [ rem16u#14 ] : zp[2]:95 , 
Potential registers zp[2]:47 [ mul16u::b#0 ] : zp[2]:47 , 
Potential registers zp[4]:26 [ mul16u::return#0 ] : zp[4]:26 , 
Potential registers zp[4]:30 [ mulu16_sel::$0 ] : zp[4]:30 , 
Potential registers zp[4]:34 [ mulu16_sel::$1 ] : zp[4]:34 , 
Potential registers zp[2]:56 [ mulu16_sel::return#12 ] : zp[2]:56 , 
Potential registers zp[1]:38 [ print_uchar::$0 ] : zp[1]:38 , reg byte a , reg byte x , reg byte y , 
Potential registers zp[1]:39 [ print_uchar::$2 ] : zp[1]:39 , reg byte a , reg byte x , reg byte y , 
Potential registers zp[1]:10 [ mul16u::$1 ] : zp[1]:10 , reg byte a , reg byte x , reg byte y , 

REGISTER UPLIFT SCOPES
Uplift Scope [mul16u] 35,001,670.33: zp[4]:2 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 ] 24,500,004.57: zp[4]:6 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ] 20,000,002: zp[1]:10 [ mul16u::$1 ] 16,720,002.5: zp[2]:11 [ mul16u::a#2 mul16u::a#0 mul16u::a#1 ] 20,002: zp[4]:26 [ mul16u::return#0 ] 10,001: zp[2]:47 [ mul16u::b#0 ] 
Uplift Scope [print_char] 190,010: zp[1]:13 [ print_char::ch#5 print_char::ch#0 print_char::ch#3 print_char::ch#4 ] 
Uplift Scope [divr16u] 90,147.42: zp[2]:16 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] 31,817.75: zp[2]:18 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] 20,002: zp[1]:24 [ divr16u::$1 ] 20,002: zp[1]:25 [ divr16u::$2 ] 16,540.12: zp[1]:40 [ divr16u::i#2 divr16u::i#1 ] 7,930.39: zp[2]:50 [ divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ] 202: zp[2]:101 [ divr16u::return#2 ] 202: zp[2]:103 [ divr16u::return#3 ] 
Uplift Scope [] 123,153.48: zp[2]:14 [ print_char_cursor#36 print_char_cursor#58 print_char_cursor#54 print_char_cursor#20 print_char_cursor#1 print_char_cursor#12 ] 220.4: zp[2]:95 [ rem16u#14 ] 
Uplift Scope [mulu16_sel] 21,012: zp[2]:22 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 ] 20,002: zp[4]:30 [ mulu16_sel::$0 ] 20,002: zp[4]:34 [ mulu16_sel::$1 ] 15,010.5: zp[2]:41 [ mulu16_sel::v2#5 mulu16_sel::v2#4 mulu16_sel::v2#0 mulu16_sel::v2#1 mulu16_sel::v2#3 ] 2,143.71: zp[2]:56 [ mulu16_sel::return#12 ] 2,002: zp[2]:62 [ mulu16_sel::return#0 ] 2,002: zp[2]:66 [ mulu16_sel::return#1 ] 2,002: zp[2]:68 [ mulu16_sel::return#2 ] 2,002: zp[2]:72 [ mulu16_sel::return#10 ] 2,002: zp[2]:76 [ mulu16_sel::return#11 ] 1,666.83: zp[1]:82 [ mulu16_sel::select#5 ] 
Uplift Scope [print_uchar] 20,002: zp[1]:38 [ print_uchar::$0 ] 20,002: zp[1]:39 [ print_uchar::$2 ] 9,505: zp[1]:49 [ print_uchar::b#2 print_uchar::b#0 print_uchar::b#1 ] 
Uplift Scope [print_str] 30,129.25: zp[2]:20 [ print_str::str#3 print_str::str#6 print_str::str#0 ] 
Uplift Scope [sin16s] 11,061.5: zp[4]:43 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 ] 4,705: zp[2]:52 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 ] 2,002: zp[4]:58 [ sin16s::$4 ] 2,002: zp[2]:64 [ sin16s::x2#0 ] 2,002: zp[2]:70 [ sin16s::x3_6#0 ] 2,002: zp[2]:74 [ sin16s::x4#0 ] 2,002: zp[2]:78 [ sin16s::x5#0 ] 2,002: zp[2]:80 [ sin16s::x5_128#0 ] 500.5: zp[2]:85 [ sin16s::x3#0 ] 500.5: zp[2]:87 [ sin16s::usinx#1 ] 318.5: zp[2]:91 [ sin16s::x1#0 ] 202: zp[2]:97 [ sin16s::return#0 ] 166.83: zp[2]:107 [ sin16s::usinx#0 ] 30.33: zp[1]:121 [ sin16s::isUpper#2 ] 
Uplift Scope [memset] 3,336.67: zp[2]:54 [ memset::dst#2 memset::dst#1 ] 
Uplift Scope [print_uint] 701: zp[2]:83 [ print_uint::w#0 ] 
Uplift Scope [sin16s_gen] 235.67: zp[2]:93 [ sin16s_gen::i#2 sin16s_gen::i#1 ] 202: zp[2]:99 [ sin16s_gen::$2 ] 138.88: zp[4]:109 [ sin16s_gen::x#2 sin16s_gen::x#1 ] 110.62: zp[2]:113 [ sin16s_gen::sintab#2 sin16s_gen::sintab#0 ] 10.18: zp[4]:128 [ sin16s_gen::step#0 ] 
Uplift Scope [print_sint] 456.33: zp[2]:89 [ print_sint::w#4 print_sint::w#0 print_sint::w#1 ] 
Uplift Scope [div32u16u] 202: zp[2]:105 [ div32u16u::quotient_lo#0 ] 40.4: zp[2]:115 [ div32u16u::quotient_hi#0 ] 37.33: zp[4]:117 [ div32u16u::return#1 ] 22: zp[4]:124 [ div32u16u::return#0 ] 
Uplift Scope [main] 26: zp[2]:122 [ main::st1#2 main::st1#1 ] 6.6: zp[2]:132 [ main::sw#0 ] 
Uplift Scope [print_cls] 
Uplift Scope [RADIX] 

Uplifting [mul16u] best 23362 combination zp[4]:2 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 ] zp[4]:6 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ] reg byte a [ mul16u::$1 ] zp[2]:11 [ mul16u::a#2 mul16u::a#0 mul16u::a#1 ] zp[4]:26 [ mul16u::return#0 ] zp[2]:47 [ mul16u::b#0 ] 
Uplifting [print_char] best 23047 combination reg byte a [ print_char::ch#5 print_char::ch#0 print_char::ch#3 print_char::ch#4 ] 
Uplifting [divr16u] best 22857 combination zp[2]:16 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] zp[2]:18 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] reg byte a [ divr16u::$1 ] reg byte a [ divr16u::$2 ] reg byte x [ divr16u::i#2 divr16u::i#1 ] zp[2]:50 [ divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ] zp[2]:101 [ divr16u::return#2 ] zp[2]:103 [ divr16u::return#3 ] 
Uplifting [] best 22857 combination zp[2]:14 [ print_char_cursor#36 print_char_cursor#58 print_char_cursor#54 print_char_cursor#20 print_char_cursor#1 print_char_cursor#12 ] zp[2]:95 [ rem16u#14 ] 
Uplifting [mulu16_sel] best 22839 combination zp[2]:22 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 ] zp[4]:30 [ mulu16_sel::$0 ] zp[4]:34 [ mulu16_sel::$1 ] zp[2]:41 [ mulu16_sel::v2#5 mulu16_sel::v2#4 mulu16_sel::v2#0 mulu16_sel::v2#1 mulu16_sel::v2#3 ] zp[2]:56 [ mulu16_sel::return#12 ] zp[2]:62 [ mulu16_sel::return#0 ] zp[2]:66 [ mulu16_sel::return#1 ] zp[2]:68 [ mulu16_sel::return#2 ] zp[2]:72 [ mulu16_sel::return#10 ] zp[2]:76 [ mulu16_sel::return#11 ] reg byte x [ mulu16_sel::select#5 ] 
Uplifting [print_uchar] best 22821 combination reg byte a [ print_uchar::$0 ] reg byte x [ print_uchar::$2 ] reg byte x [ print_uchar::b#2 print_uchar::b#0 print_uchar::b#1 ] 
Uplifting [print_str] best 22821 combination zp[2]:20 [ print_str::str#3 print_str::str#6 print_str::str#0 ] 
Uplifting [sin16s] best 22814 combination zp[4]:43 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 ] zp[2]:52 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 ] zp[4]:58 [ sin16s::$4 ] zp[2]:64 [ sin16s::x2#0 ] zp[2]:70 [ sin16s::x3_6#0 ] zp[2]:74 [ sin16s::x4#0 ] zp[2]:78 [ sin16s::x5#0 ] zp[2]:80 [ sin16s::x5_128#0 ] zp[2]:85 [ sin16s::x3#0 ] zp[2]:87 [ sin16s::usinx#1 ] zp[2]:91 [ sin16s::x1#0 ] zp[2]:97 [ sin16s::return#0 ] zp[2]:107 [ sin16s::usinx#0 ] reg byte y [ sin16s::isUpper#2 ] 
Uplifting [memset] best 22814 combination zp[2]:54 [ memset::dst#2 memset::dst#1 ] 
Uplifting [print_uint] best 22814 combination zp[2]:83 [ print_uint::w#0 ] 
Uplifting [sin16s_gen] best 22814 combination zp[2]:93 [ sin16s_gen::i#2 sin16s_gen::i#1 ] zp[2]:99 [ sin16s_gen::$2 ] zp[4]:109 [ sin16s_gen::x#2 sin16s_gen::x#1 ] zp[2]:113 [ sin16s_gen::sintab#2 sin16s_gen::sintab#0 ] zp[4]:128 [ sin16s_gen::step#0 ] 
Uplifting [print_sint] best 22814 combination zp[2]:89 [ print_sint::w#4 print_sint::w#0 print_sint::w#1 ] 
Uplifting [div32u16u] best 22814 combination zp[2]:105 [ div32u16u::quotient_lo#0 ] zp[2]:115 [ div32u16u::quotient_hi#0 ] zp[4]:117 [ div32u16u::return#1 ] zp[4]:124 [ div32u16u::return#0 ] 
Uplifting [main] best 22814 combination zp[2]:122 [ main::st1#2 main::st1#1 ] zp[2]:132 [ main::sw#0 ] 
Uplifting [print_cls] best 22814 combination 
Uplifting [RADIX] best 22814 combination 
Coalescing zero page register [ zp[2]:52 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 ] ] with [ zp[2]:87 [ sin16s::usinx#1 ] ] - score: 2
Coalescing zero page register [ zp[2]:16 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] ] with [ zp[2]:95 [ rem16u#14 ] ] - score: 2
Coalescing zero page register [ zp[2]:22 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 ] ] with [ zp[2]:85 [ sin16s::x3#0 ] ] - score: 2
Coalescing zero page register [ zp[2]:89 [ print_sint::w#4 print_sint::w#0 print_sint::w#1 ] ] with [ zp[2]:132 [ main::sw#0 ] ] - score: 1
Coalescing zero page register [ zp[2]:89 [ print_sint::w#4 print_sint::w#0 print_sint::w#1 main::sw#0 ] ] with [ zp[2]:83 [ print_uint::w#0 ] ] - score: 1
Coalescing zero page register [ zp[2]:52 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 ] ] with [ zp[2]:97 [ sin16s::return#0 ] ] - score: 1
Coalescing zero page register [ zp[2]:18 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] ] with [ zp[2]:101 [ divr16u::return#2 ] ] - score: 1
Coalescing zero page register [ zp[2]:18 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 ] ] with [ zp[2]:103 [ divr16u::return#3 ] ] - score: 1
Coalescing zero page register [ zp[2]:22 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 sin16s::x3#0 ] ] with [ zp[2]:64 [ sin16s::x2#0 ] ] - score: 1
Coalescing zero page register [ zp[2]:22 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 sin16s::x3#0 sin16s::x2#0 ] ] with [ zp[2]:74 [ sin16s::x4#0 ] ] - score: 1
Coalescing zero page register [ zp[2]:41 [ mulu16_sel::v2#5 mulu16_sel::v2#4 mulu16_sel::v2#0 mulu16_sel::v2#1 mulu16_sel::v2#3 ] ] with [ zp[2]:47 [ mul16u::b#0 ] ] - score: 1
Coalescing zero page register [ zp[4]:2 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 ] ] with [ zp[4]:26 [ mul16u::return#0 ] ] - score: 1
Coalescing zero page register [ zp[4]:124 [ div32u16u::return#0 ] ] with [ zp[4]:128 [ sin16s_gen::step#0 ] ] - score: 1
Coalescing zero page register [ zp[4]:124 [ div32u16u::return#0 sin16s_gen::step#0 ] ] with [ zp[4]:117 [ div32u16u::return#1 ] ] - score: 1
Coalescing zero page register [ zp[2]:62 [ mulu16_sel::return#0 ] ] with [ zp[2]:56 [ mulu16_sel::return#12 ] ] - score: 1
Coalescing zero page register [ zp[2]:68 [ mulu16_sel::return#2 ] ] with [ zp[2]:70 [ sin16s::x3_6#0 ] ] - score: 1
Coalescing zero page register [ zp[2]:76 [ mulu16_sel::return#11 ] ] with [ zp[2]:78 [ sin16s::x5#0 ] ] - score: 1
Coalescing zero page register [ zp[4]:30 [ mulu16_sel::$0 ] ] with [ zp[4]:34 [ mulu16_sel::$1 ] ] - score: 1
Coalescing zero page register [ zp[2]:52 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 ] ] with [ zp[2]:99 [ sin16s_gen::$2 ] ] - score: 1
Coalescing zero page register [ zp[2]:52 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 ] ] with [ zp[2]:107 [ sin16s::usinx#0 ] ] - score: 1
Coalescing zero page register [ zp[2]:18 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 ] ] with [ zp[2]:105 [ div32u16u::quotient_lo#0 ] ] - score: 1
Coalescing zero page register [ zp[2]:22 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 ] ] with [ zp[2]:66 [ mulu16_sel::return#1 ] ] - score: 1
Coalescing zero page register [ zp[2]:22 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 mulu16_sel::return#1 ] ] with [ zp[2]:72 [ mulu16_sel::return#10 ] ] - score: 1
Coalescing zero page register [ zp[4]:2 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#0 ] ] with [ zp[4]:30 [ mulu16_sel::$0 mulu16_sel::$1 ] ] - score: 1
Coalescing zero page register [ zp[2]:62 [ mulu16_sel::return#0 mulu16_sel::return#12 ] ] with [ zp[2]:68 [ mulu16_sel::return#2 sin16s::x3_6#0 ] ] - score: 1
Coalescing zero page register [ zp[2]:62 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 ] ] with [ zp[2]:76 [ mulu16_sel::return#11 sin16s::x5#0 ] ] - score: 1
Coalescing zero page register [ zp[2]:62 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 ] ] with [ zp[2]:80 [ sin16s::x5_128#0 ] ] - score: 1
Coalescing zero page register [ zp[2]:20 [ print_str::str#3 print_str::str#6 print_str::str#0 ] ] with [ zp[2]:93 [ sin16s_gen::i#2 sin16s_gen::i#1 ] ]
Coalescing zero page register [ zp[2]:89 [ print_sint::w#4 print_sint::w#0 print_sint::w#1 main::sw#0 print_uint::w#0 ] ] with [ zp[2]:113 [ sin16s_gen::sintab#2 sin16s_gen::sintab#0 ] ]
Coalescing zero page register [ zp[2]:54 [ memset::dst#2 memset::dst#1 ] ] with [ zp[2]:52 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 sin16s::usinx#0 ] ]
Coalescing zero page register [ zp[2]:50 [ divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ] ] with [ zp[2]:14 [ print_char_cursor#36 print_char_cursor#58 print_char_cursor#54 print_char_cursor#20 print_char_cursor#1 print_char_cursor#12 ] ]
Coalescing zero page register [ zp[2]:22 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 mulu16_sel::return#1 mulu16_sel::return#10 ] ] with [ zp[2]:16 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 rem16u#14 ] ]
Coalescing zero page register [ zp[2]:41 [ mulu16_sel::v2#5 mulu16_sel::v2#4 mulu16_sel::v2#0 mulu16_sel::v2#1 mulu16_sel::v2#3 mul16u::b#0 ] ] with [ zp[2]:18 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 div32u16u::quotient_lo#0 ] ]
Coalescing zero page register [ zp[2]:115 [ div32u16u::quotient_hi#0 ] ] with [ zp[2]:11 [ mul16u::a#2 mul16u::a#0 mul16u::a#1 ] ]
Coalescing zero page register [ zp[4]:58 [ sin16s::$4 ] ] with [ zp[4]:2 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#0 mulu16_sel::$0 mulu16_sel::$1 ] ]
Coalescing zero page register [ zp[2]:91 [ sin16s::x1#0 ] ] with [ zp[2]:50 [ divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 print_char_cursor#36 print_char_cursor#58 print_char_cursor#54 print_char_cursor#20 print_char_cursor#1 print_char_cursor#12 ] ]
Coalescing zero page register [ zp[2]:62 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 ] ] with [ zp[2]:115 [ div32u16u::quotient_hi#0 mul16u::a#2 mul16u::a#0 mul16u::a#1 ] ]
Allocated (was zp[4]:58) zp[4]:2 [ sin16s::$4 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#0 mulu16_sel::$0 mulu16_sel::$1 ]
Allocated (was zp[2]:62) zp[2]:10 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 div32u16u::quotient_hi#0 mul16u::a#2 mul16u::a#0 mul16u::a#1 ]
Allocated (was zp[2]:91) zp[2]:12 [ sin16s::x1#0 divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 print_char_cursor#36 print_char_cursor#58 print_char_cursor#54 print_char_cursor#20 print_char_cursor#1 print_char_cursor#12 ]
Allocated (was zp[2]:22) zp[2]:14 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 mulu16_sel::return#1 mulu16_sel::return#10 divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 rem16u#14 ]
Allocated (was zp[2]:41) zp[2]:16 [ mulu16_sel::v2#5 mulu16_sel::v2#4 mulu16_sel::v2#0 mulu16_sel::v2#1 mulu16_sel::v2#3 mul16u::b#0 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 div32u16u::quotient_lo#0 ]
Allocated (was zp[2]:20) zp[2]:18 [ print_str::str#3 print_str::str#6 print_str::str#0 sin16s_gen::i#2 sin16s_gen::i#1 ]
Allocated (was zp[4]:43) zp[4]:20 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 ]
Allocated (was zp[2]:54) zp[2]:24 [ memset::dst#2 memset::dst#1 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 sin16s::usinx#0 ]
Allocated (was zp[2]:89) zp[2]:26 [ print_sint::w#4 print_sint::w#0 print_sint::w#1 main::sw#0 print_uint::w#0 sin16s_gen::sintab#2 sin16s_gen::sintab#0 ]
Allocated (was zp[4]:109) zp[4]:28 [ sin16s_gen::x#2 sin16s_gen::x#1 ]
Allocated (was zp[4]:124) zp[4]:32 [ div32u16u::return#0 sin16s_gen::step#0 div32u16u::return#1 ]
Allocated (was zp[2]:122) zp[2]:36 [ main::st1#2 main::st1#1 ]

ASSEMBLER BEFORE OPTIMIZATION
  // File Comments
// Generates a 16-bit signed sine
/// @file
/// Sine Generator functions using only multiplication, addition and bit shifting
///
/// Uses a single division for converting the wavelength to a reciprocal.
/// Generates sine using the series sin(x) = x - x^/3! + x^-5! - x^7/7! ...
/// Uses the approximation sin(x) = x - x^/6 + x^/128
/// Optimization possibility: Use symmetries when generating sine tables. wavelength%2==0 -> mirror symmetry over PI, wavelength%4==0 -> mirror symmetry over PI/2.
  // Upstart
  // Commodore 64 PRG executable file
.file [name="sinusgen16.prg", type="prg", segments="Program"]
.segmentdef Program [segments="Basic, Code, Data"]
.segmentdef Basic [start=$0801]
.segmentdef Code [start=$80d]
.segmentdef Data [startAfter="Code"]
.segment Basic
:BasicUpstart(main)
  // Global Constants & labels
  // PI*2 in u[4.28] format
  .const PI2_u4f28 = $6487ed51
  // PI in u[4.28] format
  .const PI_u4f28 = $3243f6a9
  // PI/2 in u[4.28] format
  .const PI_HALF_u4f28 = $1921fb54
  .const SIZEOF_INT = 2
  .label print_screen = $400
  .label print_char_cursor = $c
  // Remainder after unsigned 16-bit division
  .label rem16u = $e
.segment Code
  // main
main: {
    .label wavelength = $78
    .label sw = $1a
    .label st1 = $24
    // [1] call sin16s_gen
    // [17] phi from main to sin16s_gen [phi:main->sin16s_gen]
  sin16s_gen_from_main:
    jsr sin16s_gen
    // [2] phi from main to main::@5 [phi:main->main::@5]
  __b5_from_main:
    jmp __b5
    // main::@5
  __b5:
    // [3] call print_cls
    // [32] phi from main::@5 to print_cls [phi:main::@5->print_cls]
  print_cls_from___b5:
    jsr print_cls
    // [4] phi from main::@5 to main::@1 [phi:main::@5->main::@1]
  __b1_from___b5:
    // [4] phi print_char_cursor#20 = print_screen#0 [phi:main::@5->main::@1#0] -- pbuz1=pbuc1 
    lda #<print_screen
    sta.z print_char_cursor
    lda #>print_screen
    sta.z print_char_cursor+1
    // [4] phi main::st1#2 = main::sintab1 [phi:main::@5->main::@1#1] -- pwsz1=pwsc1 
    lda #<sintab1
    sta.z st1
    lda #>sintab1
    sta.z st1+1
    jmp __b1
    // main::@1
  __b1:
    // [5] if(main::st1#2<main::sintab1+main::wavelength*SIZEOF_INT) goto main::@2 -- pwsz1_lt_pwsc1_then_la1 
    lda.z st1+1
    cmp #>sintab1+wavelength*SIZEOF_INT
    bcc __b2
    bne !+
    lda.z st1
    cmp #<sintab1+wavelength*SIZEOF_INT
    bcc __b2
  !:
    jmp __breturn
    // main::@return
  __breturn:
    // [6] return 
    rts
    // main::@2
  __b2:
    // [7] main::sw#0 = *main::st1#2 -- vwsz1=_deref_pwsz2 
    ldy #0
    lda (st1),y
    sta.z sw
    iny
    lda (st1),y
    sta.z sw+1
    // [8] if(main::sw#0<0) goto main::@3 -- vwsz1_lt_0_then_la1 
    lda.z sw+1
    bmi __b3_from___b2
    // [9] phi from main::@2 to main::@4 [phi:main::@2->main::@4]
  __b4_from___b2:
    jmp __b4
    // main::@4
  __b4:
    // [10] call print_str
    // [35] phi from main::@4 to print_str [phi:main::@4->print_str]
  print_str_from___b4:
    // [35] phi print_char_cursor#58 = print_char_cursor#20 [phi:main::@4->print_str#0] -- register_copy 
    // [35] phi print_str::str#6 = main::str1 [phi:main::@4->print_str#1] -- pbuz1=pbuc1 
    lda #<str1
    sta.z print_str.str
    lda #>str1
    sta.z print_str.str+1
    jsr print_str
    // [11] phi from main::@2 main::@4 to main::@3 [phi:main::@2/main::@4->main::@3]
  __b3_from___b2:
  __b3_from___b4:
    // [11] phi print_char_cursor#54 = print_char_cursor#20 [phi:main::@2/main::@4->main::@3#0] -- register_copy 
    jmp __b3
    // main::@3
  __b3:
    // [12] print_sint::w#1 = main::sw#0
    // [13] call print_sint
    jsr print_sint
    // [14] phi from main::@3 to main::@6 [phi:main::@3->main::@6]
  __b6_from___b3:
    jmp __b6
    // main::@6
  __b6:
    // [15] call print_str
    // [35] phi from main::@6 to print_str [phi:main::@6->print_str]
  print_str_from___b6:
    // [35] phi print_char_cursor#58 = print_char_cursor#12 [phi:main::@6->print_str#0] -- register_copy 
    // [35] phi print_str::str#6 = main::str [phi:main::@6->print_str#1] -- pbuz1=pbuc1 
    lda #<str
    sta.z print_str.str
    lda #>str
    sta.z print_str.str+1
    jsr print_str
    jmp __b7
    // main::@7
  __b7:
    // [16] main::st1#1 = main::st1#2 + SIZEOF_INT -- pwsz1=pwsz1_plus_vbuc1 
    lda #SIZEOF_INT
    clc
    adc.z st1
    sta.z st1
    bcc !+
    inc.z st1+1
  !:
    // [4] phi from main::@7 to main::@1 [phi:main::@7->main::@1]
  __b1_from___b7:
    // [4] phi print_char_cursor#20 = print_char_cursor#1 [phi:main::@7->main::@1#0] -- register_copy 
    // [4] phi main::st1#2 = main::st1#1 [phi:main::@7->main::@1#1] -- register_copy 
    jmp __b1
  .segment Data
    sintab1: .fill 2*$78, 0
    str: .text "   "
    .byte 0
    str1: .text " "
    .byte 0
}
.segment Code
  // sin16s_gen
// Generate signed (large) unsigned int sine table - on the full -$7fff - $7fff range
// sintab - the table to generate into
// wavelength - the number of sine points in a total sine wavelength (the size of the table)
// void sin16s_gen(__zp($1a) int *sintab, unsigned int wavelength)
sin16s_gen: {
    .label __2 = $18
    .label step = $20
    .label sintab = $1a
    // u[4.28]
    // Iterate over the table
    .label x = $1c
    .label i = $12
    // [18] call div32u16u
  // u[4.28] step = PI*2/wavelength
    // [52] phi from sin16s_gen to div32u16u [phi:sin16s_gen->div32u16u]
  div32u16u_from_sin16s_gen:
    jsr div32u16u
    // [19] div32u16u::return#0 = div32u16u::return#1
    jmp __b3
    // sin16s_gen::@3
  __b3:
    // [20] sin16s_gen::step#0 = div32u16u::return#0
    // [21] phi from sin16s_gen::@3 to sin16s_gen::@1 [phi:sin16s_gen::@3->sin16s_gen::@1]
  __b1_from___b3:
    // [21] phi sin16s_gen::sintab#2 = main::sintab1 [phi:sin16s_gen::@3->sin16s_gen::@1#0] -- pwsz1=pwsc1 
    lda #<main.sintab1
    sta.z sintab
    lda #>main.sintab1
    sta.z sintab+1
    // [21] phi sin16s_gen::x#2 = 0 [phi:sin16s_gen::@3->sin16s_gen::@1#1] -- vduz1=vduc1 
    lda #<0
    sta.z x
    lda #>0
    sta.z x+1
    lda #<0>>$10
    sta.z x+2
    lda #>0>>$10
    sta.z x+3
    // [21] phi sin16s_gen::i#2 = 0 [phi:sin16s_gen::@3->sin16s_gen::@1#2] -- vwuz1=vwuc1 
    lda #<0
    sta.z i
    lda #>0
    sta.z i+1
    jmp __b1
  // u[4.28]
    // sin16s_gen::@1
  __b1:
    // [22] if(sin16s_gen::i#2<main::wavelength) goto sin16s_gen::@2 -- vwuz1_lt_vwuc1_then_la1 
    lda.z i+1
    cmp #>main.wavelength
    bcc __b2
    bne !+
    lda.z i
    cmp #<main.wavelength
    bcc __b2
  !:
    jmp __breturn
    // sin16s_gen::@return
  __breturn:
    // [23] return 
    rts
    // sin16s_gen::@2
  __b2:
    // [24] sin16s::x#0 = sin16s_gen::x#2 -- vduz1=vduz2 
    lda.z x
    sta.z sin16s.x
    lda.z x+1
    sta.z sin16s.x+1
    lda.z x+2
    sta.z sin16s.x+2
    lda.z x+3
    sta.z sin16s.x+3
    // [25] call sin16s
    jsr sin16s
    // [26] sin16s::return#0 = sin16s::return#1
    jmp __b4
    // sin16s_gen::@4
  __b4:
    // [27] sin16s_gen::$2 = sin16s::return#0
    // [28] *sin16s_gen::sintab#2 = sin16s_gen::$2 -- _deref_pwsz1=vwsz2 
    ldy #0
    lda.z __2
    sta (sintab),y
    iny
    lda.z __2+1
    sta (sintab),y
    // [29] sin16s_gen::sintab#0 = sin16s_gen::sintab#2 + SIZEOF_INT -- pwsz1=pwsz1_plus_vbuc1 
    lda #SIZEOF_INT
    clc
    adc.z sintab
    sta.z sintab
    bcc !+
    inc.z sintab+1
  !:
    // [30] sin16s_gen::x#1 = sin16s_gen::x#2 + sin16s_gen::step#0 -- vduz1=vduz1_plus_vduz2 
    clc
    lda.z x
    adc.z step
    sta.z x
    lda.z x+1
    adc.z step+1
    sta.z x+1
    lda.z x+2
    adc.z step+2
    sta.z x+2
    lda.z x+3
    adc.z step+3
    sta.z x+3
    // [31] sin16s_gen::i#1 = ++ sin16s_gen::i#2 -- vwuz1=_inc_vwuz1 
    inc.z i
    bne !+
    inc.z i+1
  !:
    // [21] phi from sin16s_gen::@4 to sin16s_gen::@1 [phi:sin16s_gen::@4->sin16s_gen::@1]
  __b1_from___b4:
    // [21] phi sin16s_gen::sintab#2 = sin16s_gen::sintab#0 [phi:sin16s_gen::@4->sin16s_gen::@1#0] -- register_copy 
    // [21] phi sin16s_gen::x#2 = sin16s_gen::x#1 [phi:sin16s_gen::@4->sin16s_gen::@1#1] -- register_copy 
    // [21] phi sin16s_gen::i#2 = sin16s_gen::i#1 [phi:sin16s_gen::@4->sin16s_gen::@1#2] -- register_copy 
    jmp __b1
}
  // print_cls
// Clear the screen. Also resets current line/char cursor.
print_cls: {
    // [33] call memset
    // [102] phi from print_cls to memset [phi:print_cls->memset]
  memset_from_print_cls:
    jsr memset
    jmp __breturn
    // print_cls::@return
  __breturn:
    // [34] return 
    rts
}
  // print_str
// Print a zero-terminated string
// void print_str(__zp($12) char *str)
print_str: {
    .label str = $12
    // [36] phi from print_str print_str::@3 to print_str::@1 [phi:print_str/print_str::@3->print_str::@1]
  __b1_from_print_str:
  __b1_from___b3:
    // [36] phi print_char_cursor#1 = print_char_cursor#58 [phi:print_str/print_str::@3->print_str::@1#0] -- register_copy 
    // [36] phi print_str::str#3 = print_str::str#6 [phi:print_str/print_str::@3->print_str::@1#1] -- register_copy 
    jmp __b1
    // print_str::@1
  __b1:
    // [37] if(0!=*print_str::str#3) goto print_str::@2 -- 0_neq__deref_pbuz1_then_la1 
    ldy #0
    lda (str),y
    cmp #0
    bne __b2
    jmp __breturn
    // print_str::@return
  __breturn:
    // [38] return 
    rts
    // print_str::@2
  __b2:
    // [39] print_char::ch#0 = *print_str::str#3 -- vbuaa=_deref_pbuz1 
    ldy #0
    lda (str),y
    // [40] call print_char
    // [108] phi from print_str::@2 to print_char [phi:print_str::@2->print_char]
  print_char_from___b2:
    // [108] phi print_char_cursor#36 = print_char_cursor#1 [phi:print_str::@2->print_char#0] -- register_copy 
    // [108] phi print_char::ch#5 = print_char::ch#0 [phi:print_str::@2->print_char#1] -- register_copy 
    jsr print_char
    jmp __b3
    // print_str::@3
  __b3:
    // [41] print_str::str#0 = ++ print_str::str#3 -- pbuz1=_inc_pbuz1 
    inc.z str
    bne !+
    inc.z str+1
  !:
    jmp __b1_from___b3
}
  // print_sint
// Print a signed int as HEX
// void print_sint(__zp($1a) int w)
print_sint: {
    .label w = $1a
    // [42] if(print_sint::w#1<0) goto print_sint::@1 -- vwsz1_lt_0_then_la1 
    lda.z w+1
    bmi __b1_from_print_sint
    // [43] phi from print_sint to print_sint::@3 [phi:print_sint->print_sint::@3]
  __b3_from_print_sint:
    jmp __b3
    // print_sint::@3
  __b3:
    // [44] call print_char
    // [108] phi from print_sint::@3 to print_char [phi:print_sint::@3->print_char]
  print_char_from___b3:
    // [108] phi print_char_cursor#36 = print_char_cursor#54 [phi:print_sint::@3->print_char#0] -- register_copy 
    // [108] phi print_char::ch#5 = ' ' [phi:print_sint::@3->print_char#1] -- vbuaa=vbuc1 
    lda #' '
    jsr print_char
    // [45] phi from print_sint::@3 print_sint::@4 to print_sint::@2 [phi:print_sint::@3/print_sint::@4->print_sint::@2]
  __b2_from___b3:
  __b2_from___b4:
    // [45] phi print_sint::w#4 = print_sint::w#1 [phi:print_sint::@3/print_sint::@4->print_sint::@2#0] -- register_copy 
    jmp __b2
    // print_sint::@2
  __b2:
    // [46] print_uint::w#0 = (unsigned int)print_sint::w#4
    // [47] call print_uint
    jsr print_uint
    jmp __breturn
    // print_sint::@return
  __breturn:
    // [48] return 
    rts
    // [49] phi from print_sint to print_sint::@1 [phi:print_sint->print_sint::@1]
  __b1_from_print_sint:
    jmp __b1
    // print_sint::@1
  __b1:
    // [50] call print_char
    // [108] phi from print_sint::@1 to print_char [phi:print_sint::@1->print_char]
  print_char_from___b1:
    // [108] phi print_char_cursor#36 = print_char_cursor#54 [phi:print_sint::@1->print_char#0] -- register_copy 
    // [108] phi print_char::ch#5 = '-' [phi:print_sint::@1->print_char#1] -- vbuaa=vbuc1 
    lda #'-'
    jsr print_char
    jmp __b4
    // print_sint::@4
  __b4:
    // [51] print_sint::w#0 = - print_sint::w#1 -- vwsz1=_neg_vwsz1 
    lda #0
    sec
    sbc.z w
    sta.z w
    lda #0
    sbc.z w+1
    sta.z w+1
    jmp __b2_from___b4
}
  // div32u16u
// Divide unsigned 32-bit unsigned long dividend with a 16-bit unsigned int divisor
// The 16-bit unsigned int remainder can be found in rem16u after the division
// __zp($20) unsigned long div32u16u(unsigned long dividend, unsigned int divisor)
div32u16u: {
    .label return = $20
    .label quotient_hi = $a
    .label quotient_lo = $10
    // [53] call divr16u
    // [117] phi from div32u16u to divr16u [phi:div32u16u->divr16u]
  divr16u_from_div32u16u:
    // [117] phi divr16u::dividend#5 = word1 PI2_u4f28 [phi:div32u16u->divr16u#0] -- vwuz1=vwuc1 
    lda #<PI2_u4f28>>$10
    sta.z divr16u.dividend
    lda #>PI2_u4f28>>$10
    sta.z divr16u.dividend+1
    // [117] phi divr16u::rem#10 = 0 [phi:div32u16u->divr16u#1] -- vwuz1=vbuc1 
    lda #<0
    sta.z divr16u.rem
    lda #>0
    sta.z divr16u.rem+1
    jsr divr16u
    // [54] divr16u::return#2 = divr16u::return#0
    jmp __b1
    // div32u16u::@1
  __b1:
    // [55] div32u16u::quotient_hi#0 = divr16u::return#2 -- vwuz1=vwuz2 
    lda.z divr16u.return
    sta.z quotient_hi
    lda.z divr16u.return+1
    sta.z quotient_hi+1
    // [56] divr16u::rem#4 = rem16u#14
    // [57] call divr16u
    // [117] phi from div32u16u::@1 to divr16u [phi:div32u16u::@1->divr16u]
  divr16u_from___b1:
    // [117] phi divr16u::dividend#5 = word0 PI2_u4f28 [phi:div32u16u::@1->divr16u#0] -- vwuz1=vwuc1 
    lda #<PI2_u4f28&$ffff
    sta.z divr16u.dividend
    lda #>PI2_u4f28&$ffff
    sta.z divr16u.dividend+1
    // [117] phi divr16u::rem#10 = divr16u::rem#4 [phi:div32u16u::@1->divr16u#1] -- register_copy 
    jsr divr16u
    // [58] divr16u::return#3 = divr16u::return#0
    jmp __b2
    // div32u16u::@2
  __b2:
    // [59] div32u16u::quotient_lo#0 = divr16u::return#3
    // [60] div32u16u::return#1 = div32u16u::quotient_hi#0 dw= div32u16u::quotient_lo#0 -- vduz1=vwuz2_dword_vwuz3 
    lda.z quotient_hi
    sta.z return+2
    lda.z quotient_hi+1
    sta.z return+3
    lda.z quotient_lo
    sta.z return
    lda.z quotient_lo+1
    sta.z return+1
    jmp __breturn
    // div32u16u::@return
  __breturn:
    // [61] return 
    rts
}
  // sin16s
// Calculate signed int sine sin(x)
// x: unsigned long input u[4.28] in the interval $00000000 - PI2_u4f28
// result: signed int sin(x) s[0.15] - using the full range  -$7fff - $7fff
// __zp($18) int sin16s(__zp($14) unsigned long x)
sin16s: {
    .label __4 = 2
    .label x = $14
    .label return = $18
    .label x1 = $c
    .label x2 = $e
    .label x3 = $e
    .label x3_6 = $a
    .label usinx = $18
    .label x4 = $e
    .label x5 = $a
    .label x5_128 = $a
    .label sinx = $18
    // [62] if(sin16s::x#0<PI_u4f28) goto sin16s::@1 -- vduz1_lt_vduc1_then_la1 
    lda.z x+3
    cmp #>PI_u4f28>>$10
    bcc __b1_from_sin16s
    bne !+
    lda.z x+2
    cmp #<PI_u4f28>>$10
    bcc __b1_from_sin16s
    bne !+
    lda.z x+1
    cmp #>PI_u4f28
    bcc __b1_from_sin16s
    bne !+
    lda.z x
    cmp #<PI_u4f28
    bcc __b1_from_sin16s
  !:
    jmp __b4
    // sin16s::@4
  __b4:
    // [63] sin16s::x#1 = sin16s::x#0 - PI_u4f28 -- vduz1=vduz1_minus_vduc1 
    lda.z x
    sec
    sbc #<PI_u4f28
    sta.z x
    lda.z x+1
    sbc #>PI_u4f28
    sta.z x+1
    lda.z x+2
    sbc #<PI_u4f28>>$10
    sta.z x+2
    lda.z x+3
    sbc #>PI_u4f28>>$10
    sta.z x+3
    // [64] phi from sin16s::@4 to sin16s::@1 [phi:sin16s::@4->sin16s::@1]
  __b1_from___b4:
    // [64] phi sin16s::isUpper#2 = 1 [phi:sin16s::@4->sin16s::@1#0] -- vbuyy=vbuc1 
    ldy #1
    // [64] phi sin16s::x#4 = sin16s::x#1 [phi:sin16s::@4->sin16s::@1#1] -- register_copy 
    jmp __b1
    // [64] phi from sin16s to sin16s::@1 [phi:sin16s->sin16s::@1]
  __b1_from_sin16s:
    // [64] phi sin16s::isUpper#2 = 0 [phi:sin16s->sin16s::@1#0] -- vbuyy=vbuc1 
    ldy #0
    // [64] phi sin16s::x#4 = sin16s::x#0 [phi:sin16s->sin16s::@1#1] -- register_copy 
    jmp __b1
    // sin16s::@1
  __b1:
    // [65] if(sin16s::x#4<PI_HALF_u4f28) goto sin16s::@2 -- vduz1_lt_vduc1_then_la1 
    lda.z x+3
    cmp #>PI_HALF_u4f28>>$10
    bcc __b2_from___b1
    bne !+
    lda.z x+2
    cmp #<PI_HALF_u4f28>>$10
    bcc __b2_from___b1
    bne !+
    lda.z x+1
    cmp #>PI_HALF_u4f28
    bcc __b2_from___b1
    bne !+
    lda.z x
    cmp #<PI_HALF_u4f28
    bcc __b2_from___b1
  !:
    jmp __b5
    // sin16s::@5
  __b5:
    // [66] sin16s::x#2 = PI_u4f28 - sin16s::x#4 -- vduz1=vduc1_minus_vduz1 
    lda #<PI_u4f28
    sec
    sbc.z x
    sta.z x
    lda #>PI_u4f28
    sbc.z x+1
    sta.z x+1
    lda #<PI_u4f28>>$10
    sbc.z x+2
    sta.z x+2
    lda #>PI_u4f28>>$10
    sbc.z x+3
    sta.z x+3
    // [67] phi from sin16s::@1 sin16s::@5 to sin16s::@2 [phi:sin16s::@1/sin16s::@5->sin16s::@2]
  __b2_from___b1:
  __b2_from___b5:
    // [67] phi sin16s::x#6 = sin16s::x#4 [phi:sin16s::@1/sin16s::@5->sin16s::@2#0] -- register_copy 
    jmp __b2
    // sin16s::@2
  __b2:
    // [68] sin16s::$4 = sin16s::x#6 << 3 -- vduz1=vduz2_rol_3 
    lda.z x
    asl
    sta.z __4
    lda.z x+1
    rol
    sta.z __4+1
    lda.z x+2
    rol
    sta.z __4+2
    lda.z x+3
    rol
    sta.z __4+3
    asl.z __4
    rol.z __4+1
    rol.z __4+2
    rol.z __4+3
    asl.z __4
    rol.z __4+1
    rol.z __4+2
    rol.z __4+3
    // [69] sin16s::x1#0 = word1  sin16s::$4 -- vwuz1=_word1_vduz2 
    // sinx = x - x^3/6 + x5/128;
    lda.z __4+2
    sta.z x1
    lda.z __4+3
    sta.z x1+1
    // [70] mulu16_sel::v1#0 = sin16s::x1#0 -- vwuz1=vwuz2 
    lda.z x1
    sta.z mulu16_sel.v1
    lda.z x1+1
    sta.z mulu16_sel.v1+1
    // [71] mulu16_sel::v2#0 = sin16s::x1#0 -- vwuz1=vwuz2 
    lda.z x1
    sta.z mulu16_sel.v2
    lda.z x1+1
    sta.z mulu16_sel.v2+1
    // [72] call mulu16_sel
  // u[1.15]
    // [135] phi from sin16s::@2 to mulu16_sel [phi:sin16s::@2->mulu16_sel]
  mulu16_sel_from___b2:
    // [135] phi mulu16_sel::select#5 = 0 [phi:sin16s::@2->mulu16_sel#0] -- vbuxx=vbuc1 
    ldx #0
    // [135] phi mulu16_sel::v2#5 = mulu16_sel::v2#0 [phi:sin16s::@2->mulu16_sel#1] -- register_copy 
    // [135] phi mulu16_sel::v1#5 = mulu16_sel::v1#0 [phi:sin16s::@2->mulu16_sel#2] -- register_copy 
    jsr mulu16_sel
    // [73] mulu16_sel::return#0 = mulu16_sel::return#12
    jmp __b7
    // sin16s::@7
  __b7:
    // [74] sin16s::x2#0 = mulu16_sel::return#0 -- vwuz1=vwuz2 
    lda.z mulu16_sel.return
    sta.z x2
    lda.z mulu16_sel.return+1
    sta.z x2+1
    // [75] mulu16_sel::v1#1 = sin16s::x2#0
    // [76] mulu16_sel::v2#1 = sin16s::x1#0 -- vwuz1=vwuz2 
    lda.z x1
    sta.z mulu16_sel.v2
    lda.z x1+1
    sta.z mulu16_sel.v2+1
    // [77] call mulu16_sel
  // u[2.14] x^2
    // [135] phi from sin16s::@7 to mulu16_sel [phi:sin16s::@7->mulu16_sel]
  mulu16_sel_from___b7:
    // [135] phi mulu16_sel::select#5 = 1 [phi:sin16s::@7->mulu16_sel#0] -- vbuxx=vbuc1 
    ldx #1
    // [135] phi mulu16_sel::v2#5 = mulu16_sel::v2#1 [phi:sin16s::@7->mulu16_sel#1] -- register_copy 
    // [135] phi mulu16_sel::v1#5 = mulu16_sel::v1#1 [phi:sin16s::@7->mulu16_sel#2] -- register_copy 
    jsr mulu16_sel
    // [78] mulu16_sel::return#1 = mulu16_sel::return#12 -- vwuz1=vwuz2 
    lda.z mulu16_sel.return
    sta.z mulu16_sel.return_1
    lda.z mulu16_sel.return+1
    sta.z mulu16_sel.return_1+1
    jmp __b8
    // sin16s::@8
  __b8:
    // [79] sin16s::x3#0 = mulu16_sel::return#1
    // [80] mulu16_sel::v1#2 = sin16s::x3#0
    // [81] call mulu16_sel
  // u[2.14] x^3
    // [135] phi from sin16s::@8 to mulu16_sel [phi:sin16s::@8->mulu16_sel]
  mulu16_sel_from___b8:
    // [135] phi mulu16_sel::select#5 = 1 [phi:sin16s::@8->mulu16_sel#0] -- vbuxx=vbuc1 
    ldx #1
    // [135] phi mulu16_sel::v2#5 = (unsigned int)$10000/6 [phi:sin16s::@8->mulu16_sel#1] -- vwuz1=vwuc1 
    lda #<$10000/6
    sta.z mulu16_sel.v2
    lda #>$10000/6
    sta.z mulu16_sel.v2+1
    // [135] phi mulu16_sel::v1#5 = mulu16_sel::v1#2 [phi:sin16s::@8->mulu16_sel#2] -- register_copy 
    jsr mulu16_sel
    // [82] mulu16_sel::return#2 = mulu16_sel::return#12
    jmp __b9
    // sin16s::@9
  __b9:
    // [83] sin16s::x3_6#0 = mulu16_sel::return#2
    // [84] sin16s::usinx#0 = sin16s::x1#0 - sin16s::x3_6#0 -- vwuz1=vwuz2_minus_vwuz3 
    // u[1.15] x^3/6;
    lda.z x1
    sec
    sbc.z x3_6
    sta.z usinx
    lda.z x1+1
    sbc.z x3_6+1
    sta.z usinx+1
    // [85] mulu16_sel::v1#3 = sin16s::x3#0
    // [86] mulu16_sel::v2#3 = sin16s::x1#0 -- vwuz1=vwuz2 
    lda.z x1
    sta.z mulu16_sel.v2
    lda.z x1+1
    sta.z mulu16_sel.v2+1
    // [87] call mulu16_sel
  // u[1.15] x - x^3/6
    // [135] phi from sin16s::@9 to mulu16_sel [phi:sin16s::@9->mulu16_sel]
  mulu16_sel_from___b9:
    // [135] phi mulu16_sel::select#5 = 0 [phi:sin16s::@9->mulu16_sel#0] -- vbuxx=vbuc1 
    ldx #0
    // [135] phi mulu16_sel::v2#5 = mulu16_sel::v2#3 [phi:sin16s::@9->mulu16_sel#1] -- register_copy 
    // [135] phi mulu16_sel::v1#5 = mulu16_sel::v1#3 [phi:sin16s::@9->mulu16_sel#2] -- register_copy 
    jsr mulu16_sel
    // [88] mulu16_sel::return#10 = mulu16_sel::return#12 -- vwuz1=vwuz2 
    lda.z mulu16_sel.return
    sta.z mulu16_sel.return_1
    lda.z mulu16_sel.return+1
    sta.z mulu16_sel.return_1+1
    jmp __b10
    // sin16s::@10
  __b10:
    // [89] sin16s::x4#0 = mulu16_sel::return#10
    // [90] mulu16_sel::v1#4 = sin16s::x4#0
    // [91] mulu16_sel::v2#4 = sin16s::x1#0 -- vwuz1=vwuz2 
    lda.z x1
    sta.z mulu16_sel.v2
    lda.z x1+1
    sta.z mulu16_sel.v2+1
    // [92] call mulu16_sel
  // u[3.13] x^4
    // [135] phi from sin16s::@10 to mulu16_sel [phi:sin16s::@10->mulu16_sel]
  mulu16_sel_from___b10:
    // [135] phi mulu16_sel::select#5 = 0 [phi:sin16s::@10->mulu16_sel#0] -- vbuxx=vbuc1 
    ldx #0
    // [135] phi mulu16_sel::v2#5 = mulu16_sel::v2#4 [phi:sin16s::@10->mulu16_sel#1] -- register_copy 
    // [135] phi mulu16_sel::v1#5 = mulu16_sel::v1#4 [phi:sin16s::@10->mulu16_sel#2] -- register_copy 
    jsr mulu16_sel
    // [93] mulu16_sel::return#11 = mulu16_sel::return#12
    jmp __b11
    // sin16s::@11
  __b11:
    // [94] sin16s::x5#0 = mulu16_sel::return#11
    // [95] sin16s::x5_128#0 = sin16s::x5#0 >> 4 -- vwuz1=vwuz1_ror_4 
    // u[4.12] x^5
    lsr.z x5_128+1
    ror.z x5_128
    lsr.z x5_128+1
    ror.z x5_128
    lsr.z x5_128+1
    ror.z x5_128
    lsr.z x5_128+1
    ror.z x5_128
    // [96] sin16s::usinx#1 = sin16s::usinx#0 + sin16s::x5_128#0 -- vwuz1=vwuz1_plus_vwuz2 
    clc
    lda.z usinx
    adc.z x5_128
    sta.z usinx
    lda.z usinx+1
    adc.z x5_128+1
    sta.z usinx+1
    // [97] if(sin16s::isUpper#2==0) goto sin16s::@12 -- vbuyy_eq_0_then_la1 
    cpy #0
    beq __b12
    jmp __b6
    // sin16s::@6
  __b6:
    // [98] sin16s::sinx#1 = - (int)sin16s::usinx#1 -- vwsz1=_neg_vwsz1 
    lda #0
    sec
    sbc.z sinx
    sta.z sinx
    lda #0
    sbc.z sinx+1
    sta.z sinx+1
    // [99] phi from sin16s::@12 sin16s::@6 to sin16s::@3 [phi:sin16s::@12/sin16s::@6->sin16s::@3]
  __b3_from___b12:
  __b3_from___b6:
    // [99] phi sin16s::return#1 = sin16s::return#5 [phi:sin16s::@12/sin16s::@6->sin16s::@3#0] -- register_copy 
    jmp __b3
    // sin16s::@3
  __b3:
    jmp __breturn
    // sin16s::@return
  __breturn:
    // [100] return 
    rts
    // sin16s::@12
  __b12:
    // [101] sin16s::return#5 = (int)sin16s::usinx#1
    jmp __b3_from___b12
}
  // memset
// Copies the character c (an unsigned char) to the first num characters of the object pointed to by the argument str.
// void * memset(void *str, char c, unsigned int num)
memset: {
    .const c = ' '
    .const num = $3e8
    .label str = print_screen
    .label end = str+num
    .label dst = $18
    // [103] phi from memset to memset::@1 [phi:memset->memset::@1]
  __b1_from_memset:
    // [103] phi memset::dst#2 = (char *)memset::str#0 [phi:memset->memset::@1#0] -- pbuz1=pbuc1 
    lda #<str
    sta.z dst
    lda #>str
    sta.z dst+1
    jmp __b1
    // memset::@1
  __b1:
    // [104] if(memset::dst#2!=memset::end#0) goto memset::@2 -- pbuz1_neq_pbuc1_then_la1 
    lda.z dst+1
    cmp #>end
    bne __b2
    lda.z dst
    cmp #<end
    bne __b2
    jmp __breturn
    // memset::@return
  __breturn:
    // [105] return 
    rts
    // memset::@2
  __b2:
    // [106] *memset::dst#2 = memset::c#0 -- _deref_pbuz1=vbuc1 
    lda #c
    ldy #0
    sta (dst),y
    // [107] memset::dst#1 = ++ memset::dst#2 -- pbuz1=_inc_pbuz1 
    inc.z dst
    bne !+
    inc.z dst+1
  !:
    // [103] phi from memset::@2 to memset::@1 [phi:memset::@2->memset::@1]
  __b1_from___b2:
    // [103] phi memset::dst#2 = memset::dst#1 [phi:memset::@2->memset::@1#0] -- register_copy 
    jmp __b1
}
  // print_char
// Print a single char
// void print_char(__register(A) char ch)
print_char: {
    // [109] *print_char_cursor#36 = print_char::ch#5 -- _deref_pbuz1=vbuaa 
    ldy #0
    sta (print_char_cursor),y
    // [110] print_char_cursor#12 = ++ print_char_cursor#36 -- pbuz1=_inc_pbuz1 
    inc.z print_char_cursor
    bne !+
    inc.z print_char_cursor+1
  !:
    jmp __breturn
    // print_char::@return
  __breturn:
    // [111] return 
    rts
}
  // print_uint
// Print a unsigned int as HEX
// void print_uint(__zp($1a) unsigned int w)
print_uint: {
    .label w = $1a
    // [112] print_uchar::b#0 = byte1  print_uint::w#0 -- vbuxx=_byte1_vwuz1 
    ldx.z w+1
    // [113] call print_uchar
    // [144] phi from print_uint to print_uchar [phi:print_uint->print_uchar]
  print_uchar_from_print_uint:
    // [144] phi print_uchar::b#2 = print_uchar::b#0 [phi:print_uint->print_uchar#0] -- register_copy 
    jsr print_uchar
    jmp __b1
    // print_uint::@1
  __b1:
    // [114] print_uchar::b#1 = byte0  print_uint::w#0 -- vbuxx=_byte0_vwuz1 
    ldx.z w
    // [115] call print_uchar
    // [144] phi from print_uint::@1 to print_uchar [phi:print_uint::@1->print_uchar]
  print_uchar_from___b1:
    // [144] phi print_uchar::b#2 = print_uchar::b#1 [phi:print_uint::@1->print_uchar#0] -- register_copy 
    jsr print_uchar
    jmp __breturn
    // print_uint::@return
  __breturn:
    // [116] return 
    rts
}
  // divr16u
// Performs division on two 16 bit unsigned ints and an initial remainder
// Returns the quotient dividend/divisor.
// The final remainder will be set into the global variable rem16u
// Implemented using simple binary division
// __zp($10) unsigned int divr16u(__zp($c) unsigned int dividend, unsigned int divisor, __zp($e) unsigned int rem)
divr16u: {
    .label rem = $e
    .label dividend = $c
    .label quotient = $10
    .label return = $10
    // [118] phi from divr16u to divr16u::@1 [phi:divr16u->divr16u::@1]
  __b1_from_divr16u:
    // [118] phi divr16u::i#2 = 0 [phi:divr16u->divr16u::@1#0] -- vbuxx=vbuc1 
    ldx #0
    // [118] phi divr16u::quotient#3 = 0 [phi:divr16u->divr16u::@1#1] -- vwuz1=vwuc1 
    lda #<0
    sta.z quotient
    lda #>0
    sta.z quotient+1
    // [118] phi divr16u::dividend#3 = divr16u::dividend#5 [phi:divr16u->divr16u::@1#2] -- register_copy 
    // [118] phi divr16u::rem#5 = divr16u::rem#10 [phi:divr16u->divr16u::@1#3] -- register_copy 
    jmp __b1
    // [118] phi from divr16u::@3 to divr16u::@1 [phi:divr16u::@3->divr16u::@1]
  __b1_from___b3:
    // [118] phi divr16u::i#2 = divr16u::i#1 [phi:divr16u::@3->divr16u::@1#0] -- register_copy 
    // [118] phi divr16u::quotient#3 = divr16u::return#0 [phi:divr16u::@3->divr16u::@1#1] -- register_copy 
    // [118] phi divr16u::dividend#3 = divr16u::dividend#0 [phi:divr16u::@3->divr16u::@1#2] -- register_copy 
    // [118] phi divr16u::rem#5 = divr16u::rem#11 [phi:divr16u::@3->divr16u::@1#3] -- register_copy 
    jmp __b1
    // divr16u::@1
  __b1:
    // [119] divr16u::rem#0 = divr16u::rem#5 << 1 -- vwuz1=vwuz1_rol_1 
    asl.z rem
    rol.z rem+1
    // [120] divr16u::$1 = byte1  divr16u::dividend#3 -- vbuaa=_byte1_vwuz1 
    lda.z dividend+1
    // [121] divr16u::$2 = divr16u::$1 & $80 -- vbuaa=vbuaa_band_vbuc1 
    and #$80
    // [122] if(divr16u::$2==0) goto divr16u::@2 -- vbuaa_eq_0_then_la1 
    cmp #0
    beq __b2_from___b1
    jmp __b4
    // divr16u::@4
  __b4:
    // [123] divr16u::rem#1 = divr16u::rem#0 | 1 -- vwuz1=vwuz1_bor_vbuc1 
    lda #1
    ora.z rem
    sta.z rem
    // [124] phi from divr16u::@1 divr16u::@4 to divr16u::@2 [phi:divr16u::@1/divr16u::@4->divr16u::@2]
  __b2_from___b1:
  __b2_from___b4:
    // [124] phi divr16u::rem#6 = divr16u::rem#0 [phi:divr16u::@1/divr16u::@4->divr16u::@2#0] -- register_copy 
    jmp __b2
    // divr16u::@2
  __b2:
    // [125] divr16u::dividend#0 = divr16u::dividend#3 << 1 -- vwuz1=vwuz1_rol_1 
    asl.z dividend
    rol.z dividend+1
    // [126] divr16u::quotient#1 = divr16u::quotient#3 << 1 -- vwuz1=vwuz1_rol_1 
    asl.z quotient
    rol.z quotient+1
    // [127] if(divr16u::rem#6<main::wavelength) goto divr16u::@3 -- vwuz1_lt_vwuc1_then_la1 
    lda.z rem+1
    cmp #>main.wavelength
    bcc __b3_from___b2
    bne !+
    lda.z rem
    cmp #<main.wavelength
    bcc __b3_from___b2
  !:
    jmp __b5
    // divr16u::@5
  __b5:
    // [128] divr16u::quotient#2 = ++ divr16u::quotient#1 -- vwuz1=_inc_vwuz1 
    inc.z quotient
    bne !+
    inc.z quotient+1
  !:
    // [129] divr16u::rem#2 = divr16u::rem#6 - main::wavelength -- vwuz1=vwuz1_minus_vwuc1 
    lda.z rem
    sec
    sbc #<main.wavelength
    sta.z rem
    lda.z rem+1
    sbc #>main.wavelength
    sta.z rem+1
    // [130] phi from divr16u::@2 divr16u::@5 to divr16u::@3 [phi:divr16u::@2/divr16u::@5->divr16u::@3]
  __b3_from___b2:
  __b3_from___b5:
    // [130] phi divr16u::return#0 = divr16u::quotient#1 [phi:divr16u::@2/divr16u::@5->divr16u::@3#0] -- register_copy 
    // [130] phi divr16u::rem#11 = divr16u::rem#6 [phi:divr16u::@2/divr16u::@5->divr16u::@3#1] -- register_copy 
    jmp __b3
    // divr16u::@3
  __b3:
    // [131] divr16u::i#1 = ++ divr16u::i#2 -- vbuxx=_inc_vbuxx 
    inx
    // [132] if(divr16u::i#1!=$10) goto divr16u::@1 -- vbuxx_neq_vbuc1_then_la1 
    cpx #$10
    bne __b1_from___b3
    jmp __b6
    // divr16u::@6
  __b6:
    // [133] rem16u#14 = divr16u::rem#11
    jmp __breturn
    // divr16u::@return
  __breturn:
    // [134] return 
    rts
}
  // mulu16_sel
// Calculate val*val for two unsigned int values - the result is 16 selected bits of the 32-bit result.
// The select parameter indicates how many of the highest bits of the 32-bit result to skip
// __zp($a) unsigned int mulu16_sel(__zp($e) unsigned int v1, __zp($10) unsigned int v2, __register(X) char select)
mulu16_sel: {
    .label __0 = 2
    .label __1 = 2
    .label v1 = $e
    .label v2 = $10
    .label return = $a
    .label return_1 = $e
    // [136] mul16u::a#0 = mulu16_sel::v1#5 -- vwuz1=vwuz2 
    lda.z v1
    sta.z mul16u.a
    lda.z v1+1
    sta.z mul16u.a+1
    // [137] mul16u::b#0 = mulu16_sel::v2#5
    // [138] call mul16u
    jsr mul16u
    // [139] mul16u::return#0 = mul16u::res#2
    jmp __b1
    // mulu16_sel::@1
  __b1:
    // [140] mulu16_sel::$0 = mul16u::return#0
    // [141] mulu16_sel::$1 = mulu16_sel::$0 << mulu16_sel::select#5 -- vduz1=vduz1_rol_vbuxx 
    cpx #0
    beq !e+
  !:
    asl.z __1
    rol.z __1+1
    rol.z __1+2
    rol.z __1+3
    dex
    bne !-
  !e:
    // [142] mulu16_sel::return#12 = word1  mulu16_sel::$1 -- vwuz1=_word1_vduz2 
    lda.z __1+2
    sta.z return
    lda.z __1+3
    sta.z return+1
    jmp __breturn
    // mulu16_sel::@return
  __breturn:
    // [143] return 
    rts
}
  // print_uchar
// Print a char as HEX
// void print_uchar(__register(X) char b)
print_uchar: {
    // [145] print_uchar::$0 = print_uchar::b#2 >> 4 -- vbuaa=vbuxx_ror_4 
    txa
    lsr
    lsr
    lsr
    lsr
    // [146] print_char::ch#3 = print_hextab[print_uchar::$0] -- vbuaa=pbuc1_derefidx_vbuaa 
    tay
    lda print_hextab,y
    // [147] call print_char
  // Table of hexadecimal digits
    // [108] phi from print_uchar to print_char [phi:print_uchar->print_char]
  print_char_from_print_uchar:
    // [108] phi print_char_cursor#36 = print_char_cursor#12 [phi:print_uchar->print_char#0] -- register_copy 
    // [108] phi print_char::ch#5 = print_char::ch#3 [phi:print_uchar->print_char#1] -- register_copy 
    jsr print_char
    jmp __b1
    // print_uchar::@1
  __b1:
    // [148] print_uchar::$2 = print_uchar::b#2 & $f -- vbuxx=vbuxx_band_vbuc1 
    lda #$f
    axs #0
    // [149] print_char::ch#4 = print_hextab[print_uchar::$2] -- vbuaa=pbuc1_derefidx_vbuxx 
    lda print_hextab,x
    // [150] call print_char
    // [108] phi from print_uchar::@1 to print_char [phi:print_uchar::@1->print_char]
  print_char_from___b1:
    // [108] phi print_char_cursor#36 = print_char_cursor#12 [phi:print_uchar::@1->print_char#0] -- register_copy 
    // [108] phi print_char::ch#5 = print_char::ch#4 [phi:print_uchar::@1->print_char#1] -- register_copy 
    jsr print_char
    jmp __breturn
    // print_uchar::@return
  __breturn:
    // [151] return 
    rts
}
  // mul16u
// Perform binary multiplication of two unsigned 16-bit unsigned ints into a 32-bit unsigned long
// __zp(2) unsigned long mul16u(__zp($a) unsigned int a, __zp($10) unsigned int b)
mul16u: {
    .label a = $a
    .label b = $10
    .label return = 2
    .label mb = 6
    .label res = 2
    // [152] mul16u::mb#0 = (unsigned long)mul16u::b#0 -- vduz1=_dword_vwuz2 
    lda.z b
    sta.z mb
    lda.z b+1
    sta.z mb+1
    lda #0
    sta.z mb+2
    sta.z mb+3
    // [153] phi from mul16u to mul16u::@1 [phi:mul16u->mul16u::@1]
  __b1_from_mul16u:
    // [153] phi mul16u::mb#2 = mul16u::mb#0 [phi:mul16u->mul16u::@1#0] -- register_copy 
    // [153] phi mul16u::res#2 = 0 [phi:mul16u->mul16u::@1#1] -- vduz1=vduc1 
    lda #<0
    sta.z res
    lda #>0
    sta.z res+1
    lda #<0>>$10
    sta.z res+2
    lda #>0>>$10
    sta.z res+3
    // [153] phi mul16u::a#2 = mul16u::a#0 [phi:mul16u->mul16u::@1#2] -- register_copy 
    jmp __b1
    // mul16u::@1
  __b1:
    // [154] if(mul16u::a#2!=0) goto mul16u::@2 -- vwuz1_neq_0_then_la1 
    lda.z a
    ora.z a+1
    bne __b2
    jmp __breturn
    // mul16u::@return
  __breturn:
    // [155] return 
    rts
    // mul16u::@2
  __b2:
    // [156] mul16u::$1 = mul16u::a#2 & 1 -- vbuaa=vwuz1_band_vbuc1 
    lda #1
    and.z a
    // [157] if(mul16u::$1==0) goto mul16u::@3 -- vbuaa_eq_0_then_la1 
    cmp #0
    beq __b3_from___b2
    jmp __b4
    // mul16u::@4
  __b4:
    // [158] mul16u::res#1 = mul16u::res#2 + mul16u::mb#2 -- vduz1=vduz1_plus_vduz2 
    clc
    lda.z res
    adc.z mb
    sta.z res
    lda.z res+1
    adc.z mb+1
    sta.z res+1
    lda.z res+2
    adc.z mb+2
    sta.z res+2
    lda.z res+3
    adc.z mb+3
    sta.z res+3
    // [159] phi from mul16u::@2 mul16u::@4 to mul16u::@3 [phi:mul16u::@2/mul16u::@4->mul16u::@3]
  __b3_from___b2:
  __b3_from___b4:
    // [159] phi mul16u::res#6 = mul16u::res#2 [phi:mul16u::@2/mul16u::@4->mul16u::@3#0] -- register_copy 
    jmp __b3
    // mul16u::@3
  __b3:
    // [160] mul16u::a#1 = mul16u::a#2 >> 1 -- vwuz1=vwuz1_ror_1 
    lsr.z a+1
    ror.z a
    // [161] mul16u::mb#1 = mul16u::mb#2 << 1 -- vduz1=vduz1_rol_1 
    asl.z mb
    rol.z mb+1
    rol.z mb+2
    rol.z mb+3
    // [153] phi from mul16u::@3 to mul16u::@1 [phi:mul16u::@3->mul16u::@1]
  __b1_from___b3:
    // [153] phi mul16u::mb#2 = mul16u::mb#1 [phi:mul16u::@3->mul16u::@1#0] -- register_copy 
    // [153] phi mul16u::res#2 = mul16u::res#6 [phi:mul16u::@3->mul16u::@1#1] -- register_copy 
    // [153] phi mul16u::a#2 = mul16u::a#1 [phi:mul16u::@3->mul16u::@1#2] -- register_copy 
    jmp __b1
}
  // File Data
.segment Data
  print_hextab: .text "0123456789abcdef"

ASSEMBLER OPTIMIZATIONS
Removing instruction jmp __b5
Removing instruction jmp __b1
Removing instruction jmp __breturn
Removing instruction jmp __b4
Removing instruction jmp __b3
Removing instruction jmp __b6
Removing instruction jmp __b7
Removing instruction jmp __b3
Removing instruction jmp __b1
Removing instruction jmp __breturn
Removing instruction jmp __b4
Removing instruction jmp __breturn
Removing instruction jmp __b1
Removing instruction jmp __breturn
Removing instruction jmp __b3
Removing instruction jmp __b3
Removing instruction jmp __b2
Removing instruction jmp __breturn
Removing instruction jmp __b1
Removing instruction jmp __b4
Removing instruction jmp __b1
Removing instruction jmp __b2
Removing instruction jmp __breturn
Removing instruction jmp __b4
Removing instruction jmp __b1
Removing instruction jmp __b5
Removing instruction jmp __b2
Removing instruction jmp __b7
Removing instruction jmp __b8
Removing instruction jmp __b9
Removing instruction jmp __b10
Removing instruction jmp __b11
Removing instruction jmp __b6
Removing instruction jmp __b3
Removing instruction jmp __breturn
Removing instruction jmp __b1
Removing instruction jmp __breturn
Removing instruction jmp __breturn
Removing instruction jmp __b1
Removing instruction jmp __breturn
Removing instruction jmp __b1
Removing instruction jmp __b4
Removing instruction jmp __b2
Removing instruction jmp __b5
Removing instruction jmp __b3
Removing instruction jmp __b6
Removing instruction jmp __breturn
Removing instruction jmp __b1
Removing instruction jmp __breturn
Removing instruction jmp __b1
Removing instruction jmp __breturn
Removing instruction jmp __b1
Removing instruction jmp __breturn
Removing instruction jmp __b4
Removing instruction jmp __b3
Succesful ASM optimization Pass5NextJumpElimination
Removing instruction lda.z sw+1
Removing instruction lda #>0
Removing instruction lda #>0
Removing instruction lda #>0
Replacing instruction lda #<0 with TXA
Removing instruction lda #>0
Removing instruction lda #>0
Succesful ASM optimization Pass5UnnecesaryLoadElimination
Replacing label __b3_from___b2 with __b3
Replacing label __b1_from___b3 with __b1
Replacing label __b1_from_print_sint with __b1
Replacing label __b2_from___b4 with __b2
Replacing label __b2_from___b1 with __b2
Replacing label __b2_from___b1 with __b2
Replacing label __b2_from___b1 with __b2
Replacing label __b2_from___b1 with __b2
Replacing label __b3_from___b12 with __b3
Replacing label __b2_from___b1 with __b2
Replacing label __b3_from___b2 with __b3
Replacing label __b3_from___b2 with __b3
Replacing label __b1_from___b3 with __b1
Replacing label __b3_from___b2 with __b3
Removing instruction __b5_from_main:
Removing instruction print_cls_from___b5:
Removing instruction __b4_from___b2:
Removing instruction print_str_from___b4:
Removing instruction __b3_from___b2:
Removing instruction __b3_from___b4:
Removing instruction __b6_from___b3:
Removing instruction print_str_from___b6:
Removing instruction __b1_from___b3:
Removing instruction __b1_from_print_str:
Removing instruction __b1_from___b3:
Removing instruction __b3_from_print_sint:
Removing instruction print_char_from___b3:
Removing instruction __b2_from___b3:
Removing instruction __b2_from___b4:
Removing instruction __b1_from_print_sint:
Removing instruction print_char_from___b1:
Removing instruction __b2_from___b1:
Removing instruction __b2_from___b5:
Removing instruction __b3_from___b12:
Removing instruction __b3_from___b6:
Removing instruction __breturn:
Removing instruction __b1_from___b3:
Removing instruction __b2_from___b1:
Removing instruction __b2_from___b4:
Removing instruction __b3_from___b2:
Removing instruction __b3_from___b5:
Removing instruction __breturn:
Removing instruction __b3_from___b2:
Removing instruction __b3_from___b4:
Succesful ASM optimization Pass5RedundantLabelElimination
Removing instruction sin16s_gen_from_main:
Removing instruction __b5:
Removing instruction __b1_from___b5:
Removing instruction __breturn:
Removing instruction __b4:
Removing instruction __b6:
Removing instruction __b7:
Removing instruction __b1_from___b7:
Removing instruction div32u16u_from_sin16s_gen:
Removing instruction __b3:
Removing instruction __breturn:
Removing instruction __b4:
Removing instruction __b1_from___b4:
Removing instruction memset_from_print_cls:
Removing instruction __breturn:
Removing instruction __breturn:
Removing instruction print_char_from___b2:
Removing instruction __b3:
Removing instruction __b3:
Removing instruction __breturn:
Removing instruction __b4:
Removing instruction divr16u_from_div32u16u:
Removing instruction __b1:
Removing instruction divr16u_from___b1:
Removing instruction __b2:
Removing instruction __breturn:
Removing instruction __b4:
Removing instruction __b1_from___b4:
Removing instruction __b5:
Removing instruction mulu16_sel_from___b2:
Removing instruction __b7:
Removing instruction mulu16_sel_from___b7:
Removing instruction __b8:
Removing instruction mulu16_sel_from___b8:
Removing instruction __b9:
Removing instruction mulu16_sel_from___b9:
Removing instruction __b10:
Removing instruction mulu16_sel_from___b10:
Removing instruction __b11:
Removing instruction __b6:
Removing instruction __b1_from_memset:
Removing instruction __breturn:
Removing instruction __b1_from___b2:
Removing instruction __breturn:
Removing instruction print_uchar_from_print_uint:
Removing instruction __b1:
Removing instruction print_uchar_from___b1:
Removing instruction __breturn:
Removing instruction __b1_from_divr16u:
Removing instruction __b4:
Removing instruction __b5:
Removing instruction __b6:
Removing instruction __b1:
Removing instruction __breturn:
Removing instruction print_char_from_print_uchar:
Removing instruction __b1:
Removing instruction print_char_from___b1:
Removing instruction __breturn:
Removing instruction __b1_from_mul16u:
Removing instruction __breturn:
Removing instruction __b4:
Removing instruction __b1_from___b3:
Succesful ASM optimization Pass5UnusedLabelElimination
Skipping double jump to __b3 in beq __b12
Replacing jump to rts with rts in jmp __b3
Succesful ASM optimization Pass5DoubleJumpElimination
Relabelling long label __b1_from_sin16s to __b4
Succesful ASM optimization Pass5RelabelLongLabels
Removing instruction jmp __b1
Succesful ASM optimization Pass5NextJumpElimination
Removing instruction lda #<0
Succesful ASM optimization Pass5UnnecesaryLoadElimination
Removing instruction __b12:
Succesful ASM optimization Pass5UnusedLabelElimination
Removing unreachable instruction rts
Succesful ASM optimization Pass5UnreachableCodeElimination

FINAL SYMBOL TABLE
__constant const unsigned long PI2_u4f28 = $6487ed51
__constant const unsigned long PI_HALF_u4f28 = $1921fb54
__constant const unsigned long PI_u4f28 = $3243f6a9
__constant char RADIX::BINARY = 2
__constant char RADIX::DECIMAL = $a
__constant char RADIX::HEXADECIMAL = $10
__constant char RADIX::OCTAL = 8
__constant char SIZEOF_INT = 2
unsigned long div32u16u(unsigned long dividend , unsigned int divisor)
unsigned long div32u16u::dividend
unsigned int div32u16u::divisor
unsigned long div32u16u::quotient
unsigned int div32u16u::quotient_hi
unsigned int div32u16u::quotient_hi#0 // quotient_hi zp[2]:10 40.4
unsigned int div32u16u::quotient_lo
unsigned int div32u16u::quotient_lo#0 // quotient_lo zp[2]:16 202.0
unsigned long div32u16u::return
unsigned long div32u16u::return#0 // return zp[4]:32 22.0
unsigned long div32u16u::return#1 // return zp[4]:32 37.33333333333333
unsigned int divr16u(unsigned int dividend , unsigned int divisor , unsigned int rem)
char divr16u::$1 // reg byte a 20002.0
char divr16u::$2 // reg byte a 20002.0
unsigned int divr16u::dividend
unsigned int divr16u::dividend#0 // dividend zp[2]:12 2500.25
unsigned int divr16u::dividend#3 // dividend zp[2]:12 4429.142857142857
unsigned int divr16u::dividend#5 // dividend zp[2]:12 1001.0
unsigned int divr16u::divisor
char divr16u::i
char divr16u::i#1 // reg byte x 15001.5
char divr16u::i#2 // reg byte x 1538.6153846153845
unsigned int divr16u::quotient
unsigned int divr16u::quotient#1 // quotient zp[2]:16 15001.5
unsigned int divr16u::quotient#2 // quotient zp[2]:16 10001.0
unsigned int divr16u::quotient#3 // quotient zp[2]:16 2500.25
unsigned int divr16u::rem
unsigned int divr16u::rem#0 // rem zp[2]:14 7500.75
unsigned int divr16u::rem#1 // rem zp[2]:14 20002.0
unsigned int divr16u::rem#10 // rem zp[2]:14 1102.0
unsigned int divr16u::rem#11 // rem zp[2]:14 10334.666666666666
unsigned int divr16u::rem#2 // rem zp[2]:14 20002.0
unsigned int divr16u::rem#4 // rem zp[2]:14 202.0
unsigned int divr16u::rem#5 // rem zp[2]:14 21003.0
unsigned int divr16u::rem#6 // rem zp[2]:14 10001.0
unsigned int divr16u::return
unsigned int divr16u::return#0 // return zp[2]:16 4315.0
unsigned int divr16u::return#2 // return zp[2]:16 202.0
unsigned int divr16u::return#3 // return zp[2]:16 202.0
void main()
__constant int main::sintab1[$78] = { fill( $78, 0) }
int *main::st1
int *main::st1#1 // st1 zp[2]:36 22.0
int *main::st1#2 // st1 zp[2]:36 4.0
__constant char main::str[4] = "   "
__constant char main::str1[2] = " "
int main::sw
int main::sw#0 // sw zp[2]:26 6.6000000000000005
__constant unsigned int main::wavelength = $78
void * memset(void *str , char c , unsigned int num)
char memset::c
__constant char memset::c#0 = ' ' // c
char *memset::dst
char *memset::dst#1 // dst zp[2]:24 2002.0
char *memset::dst#2 // dst zp[2]:24 1334.6666666666667
char *memset::end
__constant char *memset::end#0 = (char *)memset::str#0+memset::num#0 // end
unsigned int memset::num
__constant unsigned int memset::num#0 = $3e8 // num
void *memset::return
void *memset::str
__constant void *memset::str#0 = (void *)print_screen#0 // str
unsigned long mul16u(unsigned int a , unsigned int b)
char mul16u::$1 // reg byte a 2.0000002E7
unsigned int mul16u::a
unsigned int mul16u::a#0 // a zp[2]:10 36667.33333333333
unsigned int mul16u::a#1 // a zp[2]:10 1.0000001E7
unsigned int mul16u::a#2 // a zp[2]:10 6683334.166666666
unsigned int mul16u::b
unsigned int mul16u::b#0 // b zp[2]:16 10001.0
unsigned long mul16u::mb
unsigned long mul16u::mb#0 // mb zp[4]:6 200002.0
unsigned long mul16u::mb#1 // mb zp[4]:6 2.0000002E7
unsigned long mul16u::mb#2 // mb zp[4]:6 4300000.571428571
unsigned long mul16u::res
unsigned long mul16u::res#1 // res zp[4]:2 2.0000002E7
unsigned long mul16u::res#2 // res zp[4]:2 5001667.333333333
unsigned long mul16u::res#6 // res zp[4]:2 1.0000001E7
unsigned long mul16u::return
unsigned long mul16u::return#0 // return zp[4]:2 20002.0
unsigned int mulu16_sel(unsigned int v1 , unsigned int v2 , char select)
unsigned long mulu16_sel::$0 // zp[4]:2 20002.0
unsigned long mulu16_sel::$1 // zp[4]:2 20002.0
unsigned int mulu16_sel::return
unsigned int mulu16_sel::return#0 // return zp[2]:10 2002.0
unsigned int mulu16_sel::return#1 // return_1 zp[2]:14 2002.0
unsigned int mulu16_sel::return#10 // return_1 zp[2]:14 2002.0
unsigned int mulu16_sel::return#11 // return zp[2]:10 2002.0
unsigned int mulu16_sel::return#12 // return zp[2]:10 2143.714285714286
unsigned int mulu16_sel::return#2 // return zp[2]:10 2002.0
char mulu16_sel::select
char mulu16_sel::select#5 // reg byte x 1666.8333333333333
unsigned int mulu16_sel::v1
unsigned int mulu16_sel::v1#0 // v1 zp[2]:14 1001.0
unsigned int mulu16_sel::v1#1 // v1 zp[2]:14 1001.0
unsigned int mulu16_sel::v1#2 // v1 zp[2]:14 2002.0
unsigned int mulu16_sel::v1#3 // v1 zp[2]:14 1001.0
unsigned int mulu16_sel::v1#4 // v1 zp[2]:14 1001.0
unsigned int mulu16_sel::v1#5 // v1 zp[2]:14 15006.0
unsigned int mulu16_sel::v2
unsigned int mulu16_sel::v2#0 // v2 zp[2]:16 2002.0
unsigned int mulu16_sel::v2#1 // v2 zp[2]:16 2002.0
unsigned int mulu16_sel::v2#3 // v2 zp[2]:16 2002.0
unsigned int mulu16_sel::v2#4 // v2 zp[2]:16 2002.0
unsigned int mulu16_sel::v2#5 // v2 zp[2]:16 7002.5
void print_char(char ch)
char print_char::ch
char print_char::ch#0 // reg byte a 20002.0
char print_char::ch#3 // reg byte a 20002.0
char print_char::ch#4 // reg byte a 20002.0
char print_char::ch#5 // reg byte a 130004.0
char *print_char_cursor
char *print_char_cursor#1 // print_char_cursor zp[2]:12 2875.0
char *print_char_cursor#12 // print_char_cursor zp[2]:12 5000.576923076923
char *print_char_cursor#20 // print_char_cursor zp[2]:12 6.6000000000000005
char *print_char_cursor#36 // print_char_cursor zp[2]:12 115103.5
char *print_char_cursor#54 // print_char_cursor zp[2]:12 44.8
char *print_char_cursor#58 // print_char_cursor zp[2]:12 123.0
void print_cls()
__constant const char print_hextab[] = "0123456789abcdef"z
char *print_line_cursor
char *print_screen
__constant char *print_screen#0 = (char *) 1024 // print_screen
void print_sint(int w)
int print_sint::w
int print_sint::w#0 // w zp[2]:26 202.0
int print_sint::w#1 // w zp[2]:26 52.33333333333333
int print_sint::w#4 // w zp[2]:26 202.0
void print_str(char *str)
char *print_str::str
char *print_str::str#0 // str zp[2]:18 20002.0
char *print_str::str#3 // str zp[2]:18 10026.25
char *print_str::str#6 // str zp[2]:18 101.0
void print_uchar(char b)
char print_uchar::$0 // reg byte a 20002.0
char print_uchar::$2 // reg byte x 20002.0
char print_uchar::b
char print_uchar::b#0 // reg byte x 2002.0
char print_uchar::b#1 // reg byte x 2002.0
char print_uchar::b#2 // reg byte x 5501.0
void print_uint(unsigned int w)
unsigned int print_uint::w
unsigned int print_uint::w#0 // w zp[2]:26 701.0
unsigned int rem16u
unsigned int rem16u#14 // rem16u zp[2]:14 220.39999999999998
int sin16s(unsigned long x)
unsigned long sin16s::$4 // zp[4]:2 2002.0
char sin16s::isUpper
char sin16s::isUpper#2 // reg byte y 30.333333333333332
int sin16s::return
int sin16s::return#0 // return zp[2]:24 202.0
int sin16s::return#1 // return zp[2]:24 701.0
int sin16s::return#5 // return zp[2]:24 2002.0
int sin16s::sinx
int sin16s::sinx#1 // sinx zp[2]:24 2002.0
unsigned int sin16s::usinx
unsigned int sin16s::usinx#0 // usinx zp[2]:24 166.83333333333334
unsigned int sin16s::usinx#1 // usinx zp[2]:24 500.5
unsigned long sin16s::x
unsigned long sin16s::x#0 // x zp[4]:20 1552.0
unsigned long sin16s::x#1 // x zp[4]:20 2002.0
unsigned long sin16s::x#2 // x zp[4]:20 2002.0
unsigned long sin16s::x#4 // x zp[4]:20 2502.5
unsigned long sin16s::x#6 // x zp[4]:20 3003.0
unsigned int sin16s::x1
unsigned int sin16s::x1#0 // x1 zp[2]:12 318.5
unsigned int sin16s::x2
unsigned int sin16s::x2#0 // x2 zp[2]:14 2002.0
unsigned int sin16s::x3
unsigned int sin16s::x3#0 // x3 zp[2]:14 500.5
unsigned int sin16s::x3_6
unsigned int sin16s::x3_6#0 // x3_6 zp[2]:10 2002.0
unsigned int sin16s::x4
unsigned int sin16s::x4#0 // x4 zp[2]:14 2002.0
unsigned int sin16s::x5
unsigned int sin16s::x5#0 // x5 zp[2]:10 2002.0
unsigned int sin16s::x5_128
unsigned int sin16s::x5_128#0 // x5_128 zp[2]:10 2002.0
void sin16s_gen(int *sintab , unsigned int wavelength)
int sin16s_gen::$2 // zp[2]:24 202.0
unsigned int sin16s_gen::i
unsigned int sin16s_gen::i#1 // i zp[2]:18 202.0
unsigned int sin16s_gen::i#2 // i zp[2]:18 33.666666666666664
int *sin16s_gen::sintab
int *sin16s_gen::sintab#0 // sintab zp[2]:26 67.33333333333333
int *sin16s_gen::sintab#2 // sintab zp[2]:26 43.285714285714285
unsigned long sin16s_gen::step
unsigned long sin16s_gen::step#0 // step zp[4]:32 10.181818181818182
unsigned int sin16s_gen::wavelength
unsigned long sin16s_gen::x
unsigned long sin16s_gen::x#1 // x zp[4]:28 101.0
unsigned long sin16s_gen::x#2 // x zp[4]:28 37.875

zp[2]:36 [ main::st1#2 main::st1#1 ]
zp[4]:28 [ sin16s_gen::x#2 sin16s_gen::x#1 ]
zp[2]:18 [ print_str::str#3 print_str::str#6 print_str::str#0 sin16s_gen::i#2 sin16s_gen::i#1 ]
zp[2]:26 [ print_sint::w#4 print_sint::w#0 print_sint::w#1 main::sw#0 print_uint::w#0 sin16s_gen::sintab#2 sin16s_gen::sintab#0 ]
reg byte y [ sin16s::isUpper#2 ]
zp[4]:20 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 ]
zp[2]:24 [ memset::dst#2 memset::dst#1 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 sin16s::usinx#0 ]
reg byte a [ print_char::ch#5 print_char::ch#0 print_char::ch#3 print_char::ch#4 ]
reg byte x [ divr16u::i#2 divr16u::i#1 ]
zp[2]:14 [ mulu16_sel::v1#5 mulu16_sel::v1#4 mulu16_sel::v1#0 mulu16_sel::v1#1 mulu16_sel::v1#2 mulu16_sel::v1#3 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 mulu16_sel::return#1 mulu16_sel::return#10 divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 rem16u#14 ]
zp[2]:16 [ mulu16_sel::v2#5 mulu16_sel::v2#4 mulu16_sel::v2#0 mulu16_sel::v2#1 mulu16_sel::v2#3 mul16u::b#0 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 div32u16u::quotient_lo#0 ]
reg byte x [ mulu16_sel::select#5 ]
reg byte x [ print_uchar::b#2 print_uchar::b#0 print_uchar::b#1 ]
zp[4]:6 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
zp[4]:32 [ div32u16u::return#0 sin16s_gen::step#0 div32u16u::return#1 ]
zp[4]:2 [ sin16s::$4 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#0 mulu16_sel::$0 mulu16_sel::$1 ]
zp[2]:12 [ sin16s::x1#0 divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 print_char_cursor#36 print_char_cursor#58 print_char_cursor#54 print_char_cursor#20 print_char_cursor#1 print_char_cursor#12 ]
zp[2]:10 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 div32u16u::quotient_hi#0 mul16u::a#2 mul16u::a#0 mul16u::a#1 ]
reg byte a [ divr16u::$1 ]
reg byte a [ divr16u::$2 ]
reg byte a [ print_uchar::$0 ]
reg byte x [ print_uchar::$2 ]
reg byte a [ mul16u::$1 ]


FINAL ASSEMBLER
Score: 19169

  // File Comments
// Generates a 16-bit signed sine
/// @file
/// Sine Generator functions using only multiplication, addition and bit shifting
///
/// Uses a single division for converting the wavelength to a reciprocal.
/// Generates sine using the series sin(x) = x - x^/3! + x^-5! - x^7/7! ...
/// Uses the approximation sin(x) = x - x^/6 + x^/128
/// Optimization possibility: Use symmetries when generating sine tables. wavelength%2==0 -> mirror symmetry over PI, wavelength%4==0 -> mirror symmetry over PI/2.
  // Upstart
  // Commodore 64 PRG executable file
.file [name="sinusgen16.prg", type="prg", segments="Program"]
.segmentdef Program [segments="Basic, Code, Data"]
.segmentdef Basic [start=$0801]
.segmentdef Code [start=$80d]
.segmentdef Data [startAfter="Code"]
.segment Basic
:BasicUpstart(main)
  // Global Constants & labels
  // PI*2 in u[4.28] format
  .const PI2_u4f28 = $6487ed51
  // PI in u[4.28] format
  .const PI_u4f28 = $3243f6a9
  // PI/2 in u[4.28] format
  .const PI_HALF_u4f28 = $1921fb54
  .const SIZEOF_INT = 2
  .label print_screen = $400
  .label print_char_cursor = $c
  // Remainder after unsigned 16-bit division
  .label rem16u = $e
.segment Code
  // main
main: {
    .label wavelength = $78
    .label sw = $1a
    .label st1 = $24
    // sin16s_gen(sintab1, wavelength)
    // [1] call sin16s_gen
    // [17] phi from main to sin16s_gen [phi:main->sin16s_gen]
    jsr sin16s_gen
    // [2] phi from main to main::@5 [phi:main->main::@5]
    // main::@5
    // print_cls()
    // [3] call print_cls
    // [32] phi from main::@5 to print_cls [phi:main::@5->print_cls]
    jsr print_cls
    // [4] phi from main::@5 to main::@1 [phi:main::@5->main::@1]
    // [4] phi print_char_cursor#20 = print_screen#0 [phi:main::@5->main::@1#0] -- pbuz1=pbuc1 
    lda #<print_screen
    sta.z print_char_cursor
    lda #>print_screen
    sta.z print_char_cursor+1
    // [4] phi main::st1#2 = main::sintab1 [phi:main::@5->main::@1#1] -- pwsz1=pwsc1 
    lda #<sintab1
    sta.z st1
    lda #>sintab1
    sta.z st1+1
    // main::@1
  __b1:
    // for(signed word* st1 = sintab1; st1<sintab1+wavelength; st1++ )
    // [5] if(main::st1#2<main::sintab1+main::wavelength*SIZEOF_INT) goto main::@2 -- pwsz1_lt_pwsc1_then_la1 
    lda.z st1+1
    cmp #>sintab1+wavelength*SIZEOF_INT
    bcc __b2
    bne !+
    lda.z st1
    cmp #<sintab1+wavelength*SIZEOF_INT
    bcc __b2
  !:
    // main::@return
    // }
    // [6] return 
    rts
    // main::@2
  __b2:
    // signed word sw = *st1
    // [7] main::sw#0 = *main::st1#2 -- vwsz1=_deref_pwsz2 
    ldy #0
    lda (st1),y
    sta.z sw
    iny
    lda (st1),y
    sta.z sw+1
    // if(sw>=0)
    // [8] if(main::sw#0<0) goto main::@3 -- vwsz1_lt_0_then_la1 
    bmi __b3
    // [9] phi from main::@2 to main::@4 [phi:main::@2->main::@4]
    // main::@4
    // print_str(" ")
    // [10] call print_str
    // [35] phi from main::@4 to print_str [phi:main::@4->print_str]
    // [35] phi print_char_cursor#58 = print_char_cursor#20 [phi:main::@4->print_str#0] -- register_copy 
    // [35] phi print_str::str#6 = main::str1 [phi:main::@4->print_str#1] -- pbuz1=pbuc1 
    lda #<str1
    sta.z print_str.str
    lda #>str1
    sta.z print_str.str+1
    jsr print_str
    // [11] phi from main::@2 main::@4 to main::@3 [phi:main::@2/main::@4->main::@3]
    // [11] phi print_char_cursor#54 = print_char_cursor#20 [phi:main::@2/main::@4->main::@3#0] -- register_copy 
    // main::@3
  __b3:
    // print_sint(sw)
    // [12] print_sint::w#1 = main::sw#0
    // [13] call print_sint
    jsr print_sint
    // [14] phi from main::@3 to main::@6 [phi:main::@3->main::@6]
    // main::@6
    // print_str("   ")
    // [15] call print_str
    // [35] phi from main::@6 to print_str [phi:main::@6->print_str]
    // [35] phi print_char_cursor#58 = print_char_cursor#12 [phi:main::@6->print_str#0] -- register_copy 
    // [35] phi print_str::str#6 = main::str [phi:main::@6->print_str#1] -- pbuz1=pbuc1 
    lda #<str
    sta.z print_str.str
    lda #>str
    sta.z print_str.str+1
    jsr print_str
    // main::@7
    // for(signed word* st1 = sintab1; st1<sintab1+wavelength; st1++ )
    // [16] main::st1#1 = main::st1#2 + SIZEOF_INT -- pwsz1=pwsz1_plus_vbuc1 
    lda #SIZEOF_INT
    clc
    adc.z st1
    sta.z st1
    bcc !+
    inc.z st1+1
  !:
    // [4] phi from main::@7 to main::@1 [phi:main::@7->main::@1]
    // [4] phi print_char_cursor#20 = print_char_cursor#1 [phi:main::@7->main::@1#0] -- register_copy 
    // [4] phi main::st1#2 = main::st1#1 [phi:main::@7->main::@1#1] -- register_copy 
    jmp __b1
  .segment Data
    sintab1: .fill 2*$78, 0
    str: .text "   "
    .byte 0
    str1: .text " "
    .byte 0
}
.segment Code
  // sin16s_gen
// Generate signed (large) unsigned int sine table - on the full -$7fff - $7fff range
// sintab - the table to generate into
// wavelength - the number of sine points in a total sine wavelength (the size of the table)
// void sin16s_gen(__zp($1a) int *sintab, unsigned int wavelength)
sin16s_gen: {
    .label __2 = $18
    .label step = $20
    .label sintab = $1a
    // u[4.28]
    // Iterate over the table
    .label x = $1c
    .label i = $12
    // unsigned long step = div32u16u(PI2_u4f28, wavelength)
    // [18] call div32u16u
  // u[4.28] step = PI*2/wavelength
    // [52] phi from sin16s_gen to div32u16u [phi:sin16s_gen->div32u16u]
    jsr div32u16u
    // unsigned long step = div32u16u(PI2_u4f28, wavelength)
    // [19] div32u16u::return#0 = div32u16u::return#1
    // sin16s_gen::@3
    // [20] sin16s_gen::step#0 = div32u16u::return#0
    // [21] phi from sin16s_gen::@3 to sin16s_gen::@1 [phi:sin16s_gen::@3->sin16s_gen::@1]
    // [21] phi sin16s_gen::sintab#2 = main::sintab1 [phi:sin16s_gen::@3->sin16s_gen::@1#0] -- pwsz1=pwsc1 
    lda #<main.sintab1
    sta.z sintab
    lda #>main.sintab1
    sta.z sintab+1
    // [21] phi sin16s_gen::x#2 = 0 [phi:sin16s_gen::@3->sin16s_gen::@1#1] -- vduz1=vduc1 
    lda #<0
    sta.z x
    sta.z x+1
    lda #<0>>$10
    sta.z x+2
    lda #>0>>$10
    sta.z x+3
    // [21] phi sin16s_gen::i#2 = 0 [phi:sin16s_gen::@3->sin16s_gen::@1#2] -- vwuz1=vwuc1 
    lda #<0
    sta.z i
    sta.z i+1
  // u[4.28]
    // sin16s_gen::@1
  __b1:
    // for( unsigned int i=0; i<wavelength; i++)
    // [22] if(sin16s_gen::i#2<main::wavelength) goto sin16s_gen::@2 -- vwuz1_lt_vwuc1_then_la1 
    lda.z i+1
    cmp #>main.wavelength
    bcc __b2
    bne !+
    lda.z i
    cmp #<main.wavelength
    bcc __b2
  !:
    // sin16s_gen::@return
    // }
    // [23] return 
    rts
    // sin16s_gen::@2
  __b2:
    // sin16s(x)
    // [24] sin16s::x#0 = sin16s_gen::x#2 -- vduz1=vduz2 
    lda.z x
    sta.z sin16s.x
    lda.z x+1
    sta.z sin16s.x+1
    lda.z x+2
    sta.z sin16s.x+2
    lda.z x+3
    sta.z sin16s.x+3
    // [25] call sin16s
    jsr sin16s
    // [26] sin16s::return#0 = sin16s::return#1
    // sin16s_gen::@4
    // [27] sin16s_gen::$2 = sin16s::return#0
    // *sintab++ = sin16s(x)
    // [28] *sin16s_gen::sintab#2 = sin16s_gen::$2 -- _deref_pwsz1=vwsz2 
    ldy #0
    lda.z __2
    sta (sintab),y
    iny
    lda.z __2+1
    sta (sintab),y
    // *sintab++ = sin16s(x);
    // [29] sin16s_gen::sintab#0 = sin16s_gen::sintab#2 + SIZEOF_INT -- pwsz1=pwsz1_plus_vbuc1 
    lda #SIZEOF_INT
    clc
    adc.z sintab
    sta.z sintab
    bcc !+
    inc.z sintab+1
  !:
    // x = x + step
    // [30] sin16s_gen::x#1 = sin16s_gen::x#2 + sin16s_gen::step#0 -- vduz1=vduz1_plus_vduz2 
    clc
    lda.z x
    adc.z step
    sta.z x
    lda.z x+1
    adc.z step+1
    sta.z x+1
    lda.z x+2
    adc.z step+2
    sta.z x+2
    lda.z x+3
    adc.z step+3
    sta.z x+3
    // for( unsigned int i=0; i<wavelength; i++)
    // [31] sin16s_gen::i#1 = ++ sin16s_gen::i#2 -- vwuz1=_inc_vwuz1 
    inc.z i
    bne !+
    inc.z i+1
  !:
    // [21] phi from sin16s_gen::@4 to sin16s_gen::@1 [phi:sin16s_gen::@4->sin16s_gen::@1]
    // [21] phi sin16s_gen::sintab#2 = sin16s_gen::sintab#0 [phi:sin16s_gen::@4->sin16s_gen::@1#0] -- register_copy 
    // [21] phi sin16s_gen::x#2 = sin16s_gen::x#1 [phi:sin16s_gen::@4->sin16s_gen::@1#1] -- register_copy 
    // [21] phi sin16s_gen::i#2 = sin16s_gen::i#1 [phi:sin16s_gen::@4->sin16s_gen::@1#2] -- register_copy 
    jmp __b1
}
  // print_cls
// Clear the screen. Also resets current line/char cursor.
print_cls: {
    // memset(print_screen, ' ', 1000)
    // [33] call memset
    // [102] phi from print_cls to memset [phi:print_cls->memset]
    jsr memset
    // print_cls::@return
    // }
    // [34] return 
    rts
}
  // print_str
// Print a zero-terminated string
// void print_str(__zp($12) char *str)
print_str: {
    .label str = $12
    // [36] phi from print_str print_str::@3 to print_str::@1 [phi:print_str/print_str::@3->print_str::@1]
    // [36] phi print_char_cursor#1 = print_char_cursor#58 [phi:print_str/print_str::@3->print_str::@1#0] -- register_copy 
    // [36] phi print_str::str#3 = print_str::str#6 [phi:print_str/print_str::@3->print_str::@1#1] -- register_copy 
    // print_str::@1
  __b1:
    // while(*str)
    // [37] if(0!=*print_str::str#3) goto print_str::@2 -- 0_neq__deref_pbuz1_then_la1 
    ldy #0
    lda (str),y
    cmp #0
    bne __b2
    // print_str::@return
    // }
    // [38] return 
    rts
    // print_str::@2
  __b2:
    // print_char(*(str++))
    // [39] print_char::ch#0 = *print_str::str#3 -- vbuaa=_deref_pbuz1 
    ldy #0
    lda (str),y
    // [40] call print_char
    // [108] phi from print_str::@2 to print_char [phi:print_str::@2->print_char]
    // [108] phi print_char_cursor#36 = print_char_cursor#1 [phi:print_str::@2->print_char#0] -- register_copy 
    // [108] phi print_char::ch#5 = print_char::ch#0 [phi:print_str::@2->print_char#1] -- register_copy 
    jsr print_char
    // print_str::@3
    // print_char(*(str++));
    // [41] print_str::str#0 = ++ print_str::str#3 -- pbuz1=_inc_pbuz1 
    inc.z str
    bne !+
    inc.z str+1
  !:
    jmp __b1
}
  // print_sint
// Print a signed int as HEX
// void print_sint(__zp($1a) int w)
print_sint: {
    .label w = $1a
    // if(w<0)
    // [42] if(print_sint::w#1<0) goto print_sint::@1 -- vwsz1_lt_0_then_la1 
    lda.z w+1
    bmi __b1
    // [43] phi from print_sint to print_sint::@3 [phi:print_sint->print_sint::@3]
    // print_sint::@3
    // print_char(' ')
    // [44] call print_char
    // [108] phi from print_sint::@3 to print_char [phi:print_sint::@3->print_char]
    // [108] phi print_char_cursor#36 = print_char_cursor#54 [phi:print_sint::@3->print_char#0] -- register_copy 
    // [108] phi print_char::ch#5 = ' ' [phi:print_sint::@3->print_char#1] -- vbuaa=vbuc1 
    lda #' '
    jsr print_char
    // [45] phi from print_sint::@3 print_sint::@4 to print_sint::@2 [phi:print_sint::@3/print_sint::@4->print_sint::@2]
    // [45] phi print_sint::w#4 = print_sint::w#1 [phi:print_sint::@3/print_sint::@4->print_sint::@2#0] -- register_copy 
    // print_sint::@2
  __b2:
    // print_uint((unsigned int)w)
    // [46] print_uint::w#0 = (unsigned int)print_sint::w#4
    // [47] call print_uint
    jsr print_uint
    // print_sint::@return
    // }
    // [48] return 
    rts
    // [49] phi from print_sint to print_sint::@1 [phi:print_sint->print_sint::@1]
    // print_sint::@1
  __b1:
    // print_char('-')
    // [50] call print_char
    // [108] phi from print_sint::@1 to print_char [phi:print_sint::@1->print_char]
    // [108] phi print_char_cursor#36 = print_char_cursor#54 [phi:print_sint::@1->print_char#0] -- register_copy 
    // [108] phi print_char::ch#5 = '-' [phi:print_sint::@1->print_char#1] -- vbuaa=vbuc1 
    lda #'-'
    jsr print_char
    // print_sint::@4
    // w = -w
    // [51] print_sint::w#0 = - print_sint::w#1 -- vwsz1=_neg_vwsz1 
    lda #0
    sec
    sbc.z w
    sta.z w
    lda #0
    sbc.z w+1
    sta.z w+1
    jmp __b2
}
  // div32u16u
// Divide unsigned 32-bit unsigned long dividend with a 16-bit unsigned int divisor
// The 16-bit unsigned int remainder can be found in rem16u after the division
// __zp($20) unsigned long div32u16u(unsigned long dividend, unsigned int divisor)
div32u16u: {
    .label return = $20
    .label quotient_hi = $a
    .label quotient_lo = $10
    // unsigned int quotient_hi = divr16u(WORD1(dividend), divisor, 0)
    // [53] call divr16u
    // [117] phi from div32u16u to divr16u [phi:div32u16u->divr16u]
    // [117] phi divr16u::dividend#5 = word1 PI2_u4f28 [phi:div32u16u->divr16u#0] -- vwuz1=vwuc1 
    lda #<PI2_u4f28>>$10
    sta.z divr16u.dividend
    lda #>PI2_u4f28>>$10
    sta.z divr16u.dividend+1
    // [117] phi divr16u::rem#10 = 0 [phi:div32u16u->divr16u#1] -- vwuz1=vbuc1 
    lda #<0
    sta.z divr16u.rem
    sta.z divr16u.rem+1
    jsr divr16u
    // unsigned int quotient_hi = divr16u(WORD1(dividend), divisor, 0)
    // [54] divr16u::return#2 = divr16u::return#0
    // div32u16u::@1
    // [55] div32u16u::quotient_hi#0 = divr16u::return#2 -- vwuz1=vwuz2 
    lda.z divr16u.return
    sta.z quotient_hi
    lda.z divr16u.return+1
    sta.z quotient_hi+1
    // unsigned int quotient_lo = divr16u(WORD0(dividend), divisor, rem16u)
    // [56] divr16u::rem#4 = rem16u#14
    // [57] call divr16u
    // [117] phi from div32u16u::@1 to divr16u [phi:div32u16u::@1->divr16u]
    // [117] phi divr16u::dividend#5 = word0 PI2_u4f28 [phi:div32u16u::@1->divr16u#0] -- vwuz1=vwuc1 
    lda #<PI2_u4f28&$ffff
    sta.z divr16u.dividend
    lda #>PI2_u4f28&$ffff
    sta.z divr16u.dividend+1
    // [117] phi divr16u::rem#10 = divr16u::rem#4 [phi:div32u16u::@1->divr16u#1] -- register_copy 
    jsr divr16u
    // unsigned int quotient_lo = divr16u(WORD0(dividend), divisor, rem16u)
    // [58] divr16u::return#3 = divr16u::return#0
    // div32u16u::@2
    // [59] div32u16u::quotient_lo#0 = divr16u::return#3
    // unsigned long quotient = MAKELONG( quotient_hi, quotient_lo )
    // [60] div32u16u::return#1 = div32u16u::quotient_hi#0 dw= div32u16u::quotient_lo#0 -- vduz1=vwuz2_dword_vwuz3 
    lda.z quotient_hi
    sta.z return+2
    lda.z quotient_hi+1
    sta.z return+3
    lda.z quotient_lo
    sta.z return
    lda.z quotient_lo+1
    sta.z return+1
    // div32u16u::@return
    // }
    // [61] return 
    rts
}
  // sin16s
// Calculate signed int sine sin(x)
// x: unsigned long input u[4.28] in the interval $00000000 - PI2_u4f28
// result: signed int sin(x) s[0.15] - using the full range  -$7fff - $7fff
// __zp($18) int sin16s(__zp($14) unsigned long x)
sin16s: {
    .label __4 = 2
    .label x = $14
    .label return = $18
    .label x1 = $c
    .label x2 = $e
    .label x3 = $e
    .label x3_6 = $a
    .label usinx = $18
    .label x4 = $e
    .label x5 = $a
    .label x5_128 = $a
    .label sinx = $18
    // if(x >= PI_u4f28 )
    // [62] if(sin16s::x#0<PI_u4f28) goto sin16s::@1 -- vduz1_lt_vduc1_then_la1 
    lda.z x+3
    cmp #>PI_u4f28>>$10
    bcc __b4
    bne !+
    lda.z x+2
    cmp #<PI_u4f28>>$10
    bcc __b4
    bne !+
    lda.z x+1
    cmp #>PI_u4f28
    bcc __b4
    bne !+
    lda.z x
    cmp #<PI_u4f28
    bcc __b4
  !:
    // sin16s::@4
    // x = x - PI_u4f28
    // [63] sin16s::x#1 = sin16s::x#0 - PI_u4f28 -- vduz1=vduz1_minus_vduc1 
    lda.z x
    sec
    sbc #<PI_u4f28
    sta.z x
    lda.z x+1
    sbc #>PI_u4f28
    sta.z x+1
    lda.z x+2
    sbc #<PI_u4f28>>$10
    sta.z x+2
    lda.z x+3
    sbc #>PI_u4f28>>$10
    sta.z x+3
    // [64] phi from sin16s::@4 to sin16s::@1 [phi:sin16s::@4->sin16s::@1]
    // [64] phi sin16s::isUpper#2 = 1 [phi:sin16s::@4->sin16s::@1#0] -- vbuyy=vbuc1 
    ldy #1
    // [64] phi sin16s::x#4 = sin16s::x#1 [phi:sin16s::@4->sin16s::@1#1] -- register_copy 
    jmp __b1
    // [64] phi from sin16s to sin16s::@1 [phi:sin16s->sin16s::@1]
  __b4:
    // [64] phi sin16s::isUpper#2 = 0 [phi:sin16s->sin16s::@1#0] -- vbuyy=vbuc1 
    ldy #0
    // [64] phi sin16s::x#4 = sin16s::x#0 [phi:sin16s->sin16s::@1#1] -- register_copy 
    // sin16s::@1
  __b1:
    // if(x >= PI_HALF_u4f28 )
    // [65] if(sin16s::x#4<PI_HALF_u4f28) goto sin16s::@2 -- vduz1_lt_vduc1_then_la1 
    lda.z x+3
    cmp #>PI_HALF_u4f28>>$10
    bcc __b2
    bne !+
    lda.z x+2
    cmp #<PI_HALF_u4f28>>$10
    bcc __b2
    bne !+
    lda.z x+1
    cmp #>PI_HALF_u4f28
    bcc __b2
    bne !+
    lda.z x
    cmp #<PI_HALF_u4f28
    bcc __b2
  !:
    // sin16s::@5
    // x = PI_u4f28 - x
    // [66] sin16s::x#2 = PI_u4f28 - sin16s::x#4 -- vduz1=vduc1_minus_vduz1 
    lda #<PI_u4f28
    sec
    sbc.z x
    sta.z x
    lda #>PI_u4f28
    sbc.z x+1
    sta.z x+1
    lda #<PI_u4f28>>$10
    sbc.z x+2
    sta.z x+2
    lda #>PI_u4f28>>$10
    sbc.z x+3
    sta.z x+3
    // [67] phi from sin16s::@1 sin16s::@5 to sin16s::@2 [phi:sin16s::@1/sin16s::@5->sin16s::@2]
    // [67] phi sin16s::x#6 = sin16s::x#4 [phi:sin16s::@1/sin16s::@5->sin16s::@2#0] -- register_copy 
    // sin16s::@2
  __b2:
    // x<<3
    // [68] sin16s::$4 = sin16s::x#6 << 3 -- vduz1=vduz2_rol_3 
    lda.z x
    asl
    sta.z __4
    lda.z x+1
    rol
    sta.z __4+1
    lda.z x+2
    rol
    sta.z __4+2
    lda.z x+3
    rol
    sta.z __4+3
    asl.z __4
    rol.z __4+1
    rol.z __4+2
    rol.z __4+3
    asl.z __4
    rol.z __4+1
    rol.z __4+2
    rol.z __4+3
    // unsigned int x1 = WORD1(x<<3)
    // [69] sin16s::x1#0 = word1  sin16s::$4 -- vwuz1=_word1_vduz2 
    // sinx = x - x^3/6 + x5/128;
    lda.z __4+2
    sta.z x1
    lda.z __4+3
    sta.z x1+1
    // unsigned int x2 = mulu16_sel(x1, x1, 0)
    // [70] mulu16_sel::v1#0 = sin16s::x1#0 -- vwuz1=vwuz2 
    lda.z x1
    sta.z mulu16_sel.v1
    lda.z x1+1
    sta.z mulu16_sel.v1+1
    // [71] mulu16_sel::v2#0 = sin16s::x1#0 -- vwuz1=vwuz2 
    lda.z x1
    sta.z mulu16_sel.v2
    lda.z x1+1
    sta.z mulu16_sel.v2+1
    // [72] call mulu16_sel
  // u[1.15]
    // [135] phi from sin16s::@2 to mulu16_sel [phi:sin16s::@2->mulu16_sel]
    // [135] phi mulu16_sel::select#5 = 0 [phi:sin16s::@2->mulu16_sel#0] -- vbuxx=vbuc1 
    ldx #0
    // [135] phi mulu16_sel::v2#5 = mulu16_sel::v2#0 [phi:sin16s::@2->mulu16_sel#1] -- register_copy 
    // [135] phi mulu16_sel::v1#5 = mulu16_sel::v1#0 [phi:sin16s::@2->mulu16_sel#2] -- register_copy 
    jsr mulu16_sel
    // unsigned int x2 = mulu16_sel(x1, x1, 0)
    // [73] mulu16_sel::return#0 = mulu16_sel::return#12
    // sin16s::@7
    // [74] sin16s::x2#0 = mulu16_sel::return#0 -- vwuz1=vwuz2 
    lda.z mulu16_sel.return
    sta.z x2
    lda.z mulu16_sel.return+1
    sta.z x2+1
    // unsigned int x3 = mulu16_sel(x2, x1, 1)
    // [75] mulu16_sel::v1#1 = sin16s::x2#0
    // [76] mulu16_sel::v2#1 = sin16s::x1#0 -- vwuz1=vwuz2 
    lda.z x1
    sta.z mulu16_sel.v2
    lda.z x1+1
    sta.z mulu16_sel.v2+1
    // [77] call mulu16_sel
  // u[2.14] x^2
    // [135] phi from sin16s::@7 to mulu16_sel [phi:sin16s::@7->mulu16_sel]
    // [135] phi mulu16_sel::select#5 = 1 [phi:sin16s::@7->mulu16_sel#0] -- vbuxx=vbuc1 
    ldx #1
    // [135] phi mulu16_sel::v2#5 = mulu16_sel::v2#1 [phi:sin16s::@7->mulu16_sel#1] -- register_copy 
    // [135] phi mulu16_sel::v1#5 = mulu16_sel::v1#1 [phi:sin16s::@7->mulu16_sel#2] -- register_copy 
    jsr mulu16_sel
    // unsigned int x3 = mulu16_sel(x2, x1, 1)
    // [78] mulu16_sel::return#1 = mulu16_sel::return#12 -- vwuz1=vwuz2 
    lda.z mulu16_sel.return
    sta.z mulu16_sel.return_1
    lda.z mulu16_sel.return+1
    sta.z mulu16_sel.return_1+1
    // sin16s::@8
    // [79] sin16s::x3#0 = mulu16_sel::return#1
    // unsigned int x3_6 = mulu16_sel(x3, 0x10000/6, 1)
    // [80] mulu16_sel::v1#2 = sin16s::x3#0
    // [81] call mulu16_sel
  // u[2.14] x^3
    // [135] phi from sin16s::@8 to mulu16_sel [phi:sin16s::@8->mulu16_sel]
    // [135] phi mulu16_sel::select#5 = 1 [phi:sin16s::@8->mulu16_sel#0] -- vbuxx=vbuc1 
    ldx #1
    // [135] phi mulu16_sel::v2#5 = (unsigned int)$10000/6 [phi:sin16s::@8->mulu16_sel#1] -- vwuz1=vwuc1 
    lda #<$10000/6
    sta.z mulu16_sel.v2
    lda #>$10000/6
    sta.z mulu16_sel.v2+1
    // [135] phi mulu16_sel::v1#5 = mulu16_sel::v1#2 [phi:sin16s::@8->mulu16_sel#2] -- register_copy 
    jsr mulu16_sel
    // unsigned int x3_6 = mulu16_sel(x3, 0x10000/6, 1)
    // [82] mulu16_sel::return#2 = mulu16_sel::return#12
    // sin16s::@9
    // [83] sin16s::x3_6#0 = mulu16_sel::return#2
    // unsigned int usinx = x1 - x3_6
    // [84] sin16s::usinx#0 = sin16s::x1#0 - sin16s::x3_6#0 -- vwuz1=vwuz2_minus_vwuz3 
    // u[1.15] x^3/6;
    lda.z x1
    sec
    sbc.z x3_6
    sta.z usinx
    lda.z x1+1
    sbc.z x3_6+1
    sta.z usinx+1
    // unsigned int x4 = mulu16_sel(x3, x1, 0)
    // [85] mulu16_sel::v1#3 = sin16s::x3#0
    // [86] mulu16_sel::v2#3 = sin16s::x1#0 -- vwuz1=vwuz2 
    lda.z x1
    sta.z mulu16_sel.v2
    lda.z x1+1
    sta.z mulu16_sel.v2+1
    // [87] call mulu16_sel
  // u[1.15] x - x^3/6
    // [135] phi from sin16s::@9 to mulu16_sel [phi:sin16s::@9->mulu16_sel]
    // [135] phi mulu16_sel::select#5 = 0 [phi:sin16s::@9->mulu16_sel#0] -- vbuxx=vbuc1 
    ldx #0
    // [135] phi mulu16_sel::v2#5 = mulu16_sel::v2#3 [phi:sin16s::@9->mulu16_sel#1] -- register_copy 
    // [135] phi mulu16_sel::v1#5 = mulu16_sel::v1#3 [phi:sin16s::@9->mulu16_sel#2] -- register_copy 
    jsr mulu16_sel
    // unsigned int x4 = mulu16_sel(x3, x1, 0)
    // [88] mulu16_sel::return#10 = mulu16_sel::return#12 -- vwuz1=vwuz2 
    lda.z mulu16_sel.return
    sta.z mulu16_sel.return_1
    lda.z mulu16_sel.return+1
    sta.z mulu16_sel.return_1+1
    // sin16s::@10
    // [89] sin16s::x4#0 = mulu16_sel::return#10
    // unsigned int x5 = mulu16_sel(x4, x1, 0)
    // [90] mulu16_sel::v1#4 = sin16s::x4#0
    // [91] mulu16_sel::v2#4 = sin16s::x1#0 -- vwuz1=vwuz2 
    lda.z x1
    sta.z mulu16_sel.v2
    lda.z x1+1
    sta.z mulu16_sel.v2+1
    // [92] call mulu16_sel
  // u[3.13] x^4
    // [135] phi from sin16s::@10 to mulu16_sel [phi:sin16s::@10->mulu16_sel]
    // [135] phi mulu16_sel::select#5 = 0 [phi:sin16s::@10->mulu16_sel#0] -- vbuxx=vbuc1 
    ldx #0
    // [135] phi mulu16_sel::v2#5 = mulu16_sel::v2#4 [phi:sin16s::@10->mulu16_sel#1] -- register_copy 
    // [135] phi mulu16_sel::v1#5 = mulu16_sel::v1#4 [phi:sin16s::@10->mulu16_sel#2] -- register_copy 
    jsr mulu16_sel
    // unsigned int x5 = mulu16_sel(x4, x1, 0)
    // [93] mulu16_sel::return#11 = mulu16_sel::return#12
    // sin16s::@11
    // [94] sin16s::x5#0 = mulu16_sel::return#11
    // unsigned int x5_128 = x5>>4
    // [95] sin16s::x5_128#0 = sin16s::x5#0 >> 4 -- vwuz1=vwuz1_ror_4 
    // u[4.12] x^5
    lsr.z x5_128+1
    ror.z x5_128
    lsr.z x5_128+1
    ror.z x5_128
    lsr.z x5_128+1
    ror.z x5_128
    lsr.z x5_128+1
    ror.z x5_128
    // usinx = usinx + x5_128
    // [96] sin16s::usinx#1 = sin16s::usinx#0 + sin16s::x5_128#0 -- vwuz1=vwuz1_plus_vwuz2 
    clc
    lda.z usinx
    adc.z x5_128
    sta.z usinx
    lda.z usinx+1
    adc.z x5_128+1
    sta.z usinx+1
    // if(isUpper!=0)
    // [97] if(sin16s::isUpper#2==0) goto sin16s::@12 -- vbuyy_eq_0_then_la1 
    cpy #0
    beq __b3
    // sin16s::@6
    // sinx = -(signed int)usinx
    // [98] sin16s::sinx#1 = - (int)sin16s::usinx#1 -- vwsz1=_neg_vwsz1 
    lda #0
    sec
    sbc.z sinx
    sta.z sinx
    lda #0
    sbc.z sinx+1
    sta.z sinx+1
    // [99] phi from sin16s::@12 sin16s::@6 to sin16s::@3 [phi:sin16s::@12/sin16s::@6->sin16s::@3]
    // [99] phi sin16s::return#1 = sin16s::return#5 [phi:sin16s::@12/sin16s::@6->sin16s::@3#0] -- register_copy 
    // sin16s::@3
  __b3:
    // sin16s::@return
    // }
    // [100] return 
    rts
    // sin16s::@12
    // [101] sin16s::return#5 = (int)sin16s::usinx#1
}
  // memset
// Copies the character c (an unsigned char) to the first num characters of the object pointed to by the argument str.
// void * memset(void *str, char c, unsigned int num)
memset: {
    .const c = ' '
    .const num = $3e8
    .label str = print_screen
    .label end = str+num
    .label dst = $18
    // [103] phi from memset to memset::@1 [phi:memset->memset::@1]
    // [103] phi memset::dst#2 = (char *)memset::str#0 [phi:memset->memset::@1#0] -- pbuz1=pbuc1 
    lda #<str
    sta.z dst
    lda #>str
    sta.z dst+1
    // memset::@1
  __b1:
    // for(char* dst = str; dst!=end; dst++)
    // [104] if(memset::dst#2!=memset::end#0) goto memset::@2 -- pbuz1_neq_pbuc1_then_la1 
    lda.z dst+1
    cmp #>end
    bne __b2
    lda.z dst
    cmp #<end
    bne __b2
    // memset::@return
    // }
    // [105] return 
    rts
    // memset::@2
  __b2:
    // *dst = c
    // [106] *memset::dst#2 = memset::c#0 -- _deref_pbuz1=vbuc1 
    lda #c
    ldy #0
    sta (dst),y
    // for(char* dst = str; dst!=end; dst++)
    // [107] memset::dst#1 = ++ memset::dst#2 -- pbuz1=_inc_pbuz1 
    inc.z dst
    bne !+
    inc.z dst+1
  !:
    // [103] phi from memset::@2 to memset::@1 [phi:memset::@2->memset::@1]
    // [103] phi memset::dst#2 = memset::dst#1 [phi:memset::@2->memset::@1#0] -- register_copy 
    jmp __b1
}
  // print_char
// Print a single char
// void print_char(__register(A) char ch)
print_char: {
    // *(print_char_cursor++) = ch
    // [109] *print_char_cursor#36 = print_char::ch#5 -- _deref_pbuz1=vbuaa 
    ldy #0
    sta (print_char_cursor),y
    // *(print_char_cursor++) = ch;
    // [110] print_char_cursor#12 = ++ print_char_cursor#36 -- pbuz1=_inc_pbuz1 
    inc.z print_char_cursor
    bne !+
    inc.z print_char_cursor+1
  !:
    // print_char::@return
    // }
    // [111] return 
    rts
}
  // print_uint
// Print a unsigned int as HEX
// void print_uint(__zp($1a) unsigned int w)
print_uint: {
    .label w = $1a
    // print_uchar(BYTE1(w))
    // [112] print_uchar::b#0 = byte1  print_uint::w#0 -- vbuxx=_byte1_vwuz1 
    ldx.z w+1
    // [113] call print_uchar
    // [144] phi from print_uint to print_uchar [phi:print_uint->print_uchar]
    // [144] phi print_uchar::b#2 = print_uchar::b#0 [phi:print_uint->print_uchar#0] -- register_copy 
    jsr print_uchar
    // print_uint::@1
    // print_uchar(BYTE0(w))
    // [114] print_uchar::b#1 = byte0  print_uint::w#0 -- vbuxx=_byte0_vwuz1 
    ldx.z w
    // [115] call print_uchar
    // [144] phi from print_uint::@1 to print_uchar [phi:print_uint::@1->print_uchar]
    // [144] phi print_uchar::b#2 = print_uchar::b#1 [phi:print_uint::@1->print_uchar#0] -- register_copy 
    jsr print_uchar
    // print_uint::@return
    // }
    // [116] return 
    rts
}
  // divr16u
// Performs division on two 16 bit unsigned ints and an initial remainder
// Returns the quotient dividend/divisor.
// The final remainder will be set into the global variable rem16u
// Implemented using simple binary division
// __zp($10) unsigned int divr16u(__zp($c) unsigned int dividend, unsigned int divisor, __zp($e) unsigned int rem)
divr16u: {
    .label rem = $e
    .label dividend = $c
    .label quotient = $10
    .label return = $10
    // [118] phi from divr16u to divr16u::@1 [phi:divr16u->divr16u::@1]
    // [118] phi divr16u::i#2 = 0 [phi:divr16u->divr16u::@1#0] -- vbuxx=vbuc1 
    ldx #0
    // [118] phi divr16u::quotient#3 = 0 [phi:divr16u->divr16u::@1#1] -- vwuz1=vwuc1 
    txa
    sta.z quotient
    sta.z quotient+1
    // [118] phi divr16u::dividend#3 = divr16u::dividend#5 [phi:divr16u->divr16u::@1#2] -- register_copy 
    // [118] phi divr16u::rem#5 = divr16u::rem#10 [phi:divr16u->divr16u::@1#3] -- register_copy 
    // [118] phi from divr16u::@3 to divr16u::@1 [phi:divr16u::@3->divr16u::@1]
    // [118] phi divr16u::i#2 = divr16u::i#1 [phi:divr16u::@3->divr16u::@1#0] -- register_copy 
    // [118] phi divr16u::quotient#3 = divr16u::return#0 [phi:divr16u::@3->divr16u::@1#1] -- register_copy 
    // [118] phi divr16u::dividend#3 = divr16u::dividend#0 [phi:divr16u::@3->divr16u::@1#2] -- register_copy 
    // [118] phi divr16u::rem#5 = divr16u::rem#11 [phi:divr16u::@3->divr16u::@1#3] -- register_copy 
    // divr16u::@1
  __b1:
    // rem = rem << 1
    // [119] divr16u::rem#0 = divr16u::rem#5 << 1 -- vwuz1=vwuz1_rol_1 
    asl.z rem
    rol.z rem+1
    // BYTE1(dividend)
    // [120] divr16u::$1 = byte1  divr16u::dividend#3 -- vbuaa=_byte1_vwuz1 
    lda.z dividend+1
    // BYTE1(dividend) & 0x80
    // [121] divr16u::$2 = divr16u::$1 & $80 -- vbuaa=vbuaa_band_vbuc1 
    and #$80
    // if( (BYTE1(dividend) & 0x80) != 0 )
    // [122] if(divr16u::$2==0) goto divr16u::@2 -- vbuaa_eq_0_then_la1 
    cmp #0
    beq __b2
    // divr16u::@4
    // rem = rem | 1
    // [123] divr16u::rem#1 = divr16u::rem#0 | 1 -- vwuz1=vwuz1_bor_vbuc1 
    lda #1
    ora.z rem
    sta.z rem
    // [124] phi from divr16u::@1 divr16u::@4 to divr16u::@2 [phi:divr16u::@1/divr16u::@4->divr16u::@2]
    // [124] phi divr16u::rem#6 = divr16u::rem#0 [phi:divr16u::@1/divr16u::@4->divr16u::@2#0] -- register_copy 
    // divr16u::@2
  __b2:
    // dividend = dividend << 1
    // [125] divr16u::dividend#0 = divr16u::dividend#3 << 1 -- vwuz1=vwuz1_rol_1 
    asl.z dividend
    rol.z dividend+1
    // quotient = quotient << 1
    // [126] divr16u::quotient#1 = divr16u::quotient#3 << 1 -- vwuz1=vwuz1_rol_1 
    asl.z quotient
    rol.z quotient+1
    // if(rem>=divisor)
    // [127] if(divr16u::rem#6<main::wavelength) goto divr16u::@3 -- vwuz1_lt_vwuc1_then_la1 
    lda.z rem+1
    cmp #>main.wavelength
    bcc __b3
    bne !+
    lda.z rem
    cmp #<main.wavelength
    bcc __b3
  !:
    // divr16u::@5
    // quotient++;
    // [128] divr16u::quotient#2 = ++ divr16u::quotient#1 -- vwuz1=_inc_vwuz1 
    inc.z quotient
    bne !+
    inc.z quotient+1
  !:
    // rem = rem - divisor
    // [129] divr16u::rem#2 = divr16u::rem#6 - main::wavelength -- vwuz1=vwuz1_minus_vwuc1 
    lda.z rem
    sec
    sbc #<main.wavelength
    sta.z rem
    lda.z rem+1
    sbc #>main.wavelength
    sta.z rem+1
    // [130] phi from divr16u::@2 divr16u::@5 to divr16u::@3 [phi:divr16u::@2/divr16u::@5->divr16u::@3]
    // [130] phi divr16u::return#0 = divr16u::quotient#1 [phi:divr16u::@2/divr16u::@5->divr16u::@3#0] -- register_copy 
    // [130] phi divr16u::rem#11 = divr16u::rem#6 [phi:divr16u::@2/divr16u::@5->divr16u::@3#1] -- register_copy 
    // divr16u::@3
  __b3:
    // for( char i : 0..15)
    // [131] divr16u::i#1 = ++ divr16u::i#2 -- vbuxx=_inc_vbuxx 
    inx
    // [132] if(divr16u::i#1!=$10) goto divr16u::@1 -- vbuxx_neq_vbuc1_then_la1 
    cpx #$10
    bne __b1
    // divr16u::@6
    // rem16u = rem
    // [133] rem16u#14 = divr16u::rem#11
    // divr16u::@return
    // }
    // [134] return 
    rts
}
  // mulu16_sel
// Calculate val*val for two unsigned int values - the result is 16 selected bits of the 32-bit result.
// The select parameter indicates how many of the highest bits of the 32-bit result to skip
// __zp($a) unsigned int mulu16_sel(__zp($e) unsigned int v1, __zp($10) unsigned int v2, __register(X) char select)
mulu16_sel: {
    .label __0 = 2
    .label __1 = 2
    .label v1 = $e
    .label v2 = $10
    .label return = $a
    .label return_1 = $e
    // mul16u(v1, v2)
    // [136] mul16u::a#0 = mulu16_sel::v1#5 -- vwuz1=vwuz2 
    lda.z v1
    sta.z mul16u.a
    lda.z v1+1
    sta.z mul16u.a+1
    // [137] mul16u::b#0 = mulu16_sel::v2#5
    // [138] call mul16u
    jsr mul16u
    // [139] mul16u::return#0 = mul16u::res#2
    // mulu16_sel::@1
    // [140] mulu16_sel::$0 = mul16u::return#0
    // mul16u(v1, v2)<<select
    // [141] mulu16_sel::$1 = mulu16_sel::$0 << mulu16_sel::select#5 -- vduz1=vduz1_rol_vbuxx 
    cpx #0
    beq !e+
  !:
    asl.z __1
    rol.z __1+1
    rol.z __1+2
    rol.z __1+3
    dex
    bne !-
  !e:
    // WORD1(mul16u(v1, v2)<<select)
    // [142] mulu16_sel::return#12 = word1  mulu16_sel::$1 -- vwuz1=_word1_vduz2 
    lda.z __1+2
    sta.z return
    lda.z __1+3
    sta.z return+1
    // mulu16_sel::@return
    // }
    // [143] return 
    rts
}
  // print_uchar
// Print a char as HEX
// void print_uchar(__register(X) char b)
print_uchar: {
    // b>>4
    // [145] print_uchar::$0 = print_uchar::b#2 >> 4 -- vbuaa=vbuxx_ror_4 
    txa
    lsr
    lsr
    lsr
    lsr
    // print_char(print_hextab[b>>4])
    // [146] print_char::ch#3 = print_hextab[print_uchar::$0] -- vbuaa=pbuc1_derefidx_vbuaa 
    tay
    lda print_hextab,y
    // [147] call print_char
  // Table of hexadecimal digits
    // [108] phi from print_uchar to print_char [phi:print_uchar->print_char]
    // [108] phi print_char_cursor#36 = print_char_cursor#12 [phi:print_uchar->print_char#0] -- register_copy 
    // [108] phi print_char::ch#5 = print_char::ch#3 [phi:print_uchar->print_char#1] -- register_copy 
    jsr print_char
    // print_uchar::@1
    // b&0xf
    // [148] print_uchar::$2 = print_uchar::b#2 & $f -- vbuxx=vbuxx_band_vbuc1 
    lda #$f
    axs #0
    // print_char(print_hextab[b&0xf])
    // [149] print_char::ch#4 = print_hextab[print_uchar::$2] -- vbuaa=pbuc1_derefidx_vbuxx 
    lda print_hextab,x
    // [150] call print_char
    // [108] phi from print_uchar::@1 to print_char [phi:print_uchar::@1->print_char]
    // [108] phi print_char_cursor#36 = print_char_cursor#12 [phi:print_uchar::@1->print_char#0] -- register_copy 
    // [108] phi print_char::ch#5 = print_char::ch#4 [phi:print_uchar::@1->print_char#1] -- register_copy 
    jsr print_char
    // print_uchar::@return
    // }
    // [151] return 
    rts
}
  // mul16u
// Perform binary multiplication of two unsigned 16-bit unsigned ints into a 32-bit unsigned long
// __zp(2) unsigned long mul16u(__zp($a) unsigned int a, __zp($10) unsigned int b)
mul16u: {
    .label a = $a
    .label b = $10
    .label return = 2
    .label mb = 6
    .label res = 2
    // unsigned long mb = b
    // [152] mul16u::mb#0 = (unsigned long)mul16u::b#0 -- vduz1=_dword_vwuz2 
    lda.z b
    sta.z mb
    lda.z b+1
    sta.z mb+1
    lda #0
    sta.z mb+2
    sta.z mb+3
    // [153] phi from mul16u to mul16u::@1 [phi:mul16u->mul16u::@1]
    // [153] phi mul16u::mb#2 = mul16u::mb#0 [phi:mul16u->mul16u::@1#0] -- register_copy 
    // [153] phi mul16u::res#2 = 0 [phi:mul16u->mul16u::@1#1] -- vduz1=vduc1 
    sta.z res
    sta.z res+1
    lda #<0>>$10
    sta.z res+2
    lda #>0>>$10
    sta.z res+3
    // [153] phi mul16u::a#2 = mul16u::a#0 [phi:mul16u->mul16u::@1#2] -- register_copy 
    // mul16u::@1
  __b1:
    // while(a!=0)
    // [154] if(mul16u::a#2!=0) goto mul16u::@2 -- vwuz1_neq_0_then_la1 
    lda.z a
    ora.z a+1
    bne __b2
    // mul16u::@return
    // }
    // [155] return 
    rts
    // mul16u::@2
  __b2:
    // a&1
    // [156] mul16u::$1 = mul16u::a#2 & 1 -- vbuaa=vwuz1_band_vbuc1 
    lda #1
    and.z a
    // if( (a&1) != 0)
    // [157] if(mul16u::$1==0) goto mul16u::@3 -- vbuaa_eq_0_then_la1 
    cmp #0
    beq __b3
    // mul16u::@4
    // res = res + mb
    // [158] mul16u::res#1 = mul16u::res#2 + mul16u::mb#2 -- vduz1=vduz1_plus_vduz2 
    clc
    lda.z res
    adc.z mb
    sta.z res
    lda.z res+1
    adc.z mb+1
    sta.z res+1
    lda.z res+2
    adc.z mb+2
    sta.z res+2
    lda.z res+3
    adc.z mb+3
    sta.z res+3
    // [159] phi from mul16u::@2 mul16u::@4 to mul16u::@3 [phi:mul16u::@2/mul16u::@4->mul16u::@3]
    // [159] phi mul16u::res#6 = mul16u::res#2 [phi:mul16u::@2/mul16u::@4->mul16u::@3#0] -- register_copy 
    // mul16u::@3
  __b3:
    // a = a>>1
    // [160] mul16u::a#1 = mul16u::a#2 >> 1 -- vwuz1=vwuz1_ror_1 
    lsr.z a+1
    ror.z a
    // mb = mb<<1
    // [161] mul16u::mb#1 = mul16u::mb#2 << 1 -- vduz1=vduz1_rol_1 
    asl.z mb
    rol.z mb+1
    rol.z mb+2
    rol.z mb+3
    // [153] phi from mul16u::@3 to mul16u::@1 [phi:mul16u::@3->mul16u::@1]
    // [153] phi mul16u::mb#2 = mul16u::mb#1 [phi:mul16u::@3->mul16u::@1#0] -- register_copy 
    // [153] phi mul16u::res#2 = mul16u::res#6 [phi:mul16u::@3->mul16u::@1#1] -- register_copy 
    // [153] phi mul16u::a#2 = mul16u::a#1 [phi:mul16u::@3->mul16u::@1#2] -- register_copy 
    jmp __b1
}
  // File Data
.segment Data
  print_hextab: .text "0123456789abcdef"