mirror of
https://github.com/irmen/ksim65.git
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hook into kernel LOAD including directory listing
This commit is contained in:
Irmen de Jong
parent
9dc8721a43
commit
bc3a0f8daa
@ -1,13 +1,13 @@
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package razorvine.c64emu
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import razorvine.examplemachines.DebugWindow
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import razorvine.ksim65.Bus
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import razorvine.ksim65.Cpu6502
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import razorvine.ksim65.IVirtualMachine
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import razorvine.ksim65.Version
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import razorvine.ksim65.*
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import razorvine.ksim65.components.*
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import java.io.File
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import java.io.FileFilter
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import java.io.FileNotFoundException
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import java.io.IOException
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import java.io.Serializable
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import java.nio.file.Path
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import java.nio.file.Paths
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import javax.swing.ImageIcon
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@ -34,10 +34,113 @@ class C64Machine(title: String) : IVirtualMachine {
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private val hostDisplay = MainC64Window(title, chargenData, ram, cpu, cia1)
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private var paused = false
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fun breakpointKernelLoad(cpu: Cpu6502, pc: Address): Cpu6502.BreakpointResult {
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if(cpu.regA==0) {
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val fnlen = ram[0xb7] // file name length
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val fa = ram[0xba] // device number
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val sa = ram[0xb9] // secondary address
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val txttab = ram[0x2b] + 256*ram[0x2c] // basic load address ($0801 usually)
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val fnaddr = ram[0xbb] + 256*ram[0xbc] // file name address
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return if(fnlen>0) {
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val filename = (0 until fnlen).map { ram[fnaddr+it].toChar() }.joinToString("")
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val loadEndAddress = searchAndLoadFile(filename, fa, sa, txttab)
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if(loadEndAddress!=null) {
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ram[0x90] = 0 // status OK
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ram[0xae] = (loadEndAddress and 0xff).toShort()
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ram[0xaf] = (loadEndAddress ushr 8).toShort()
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Cpu6502.BreakpointResult(0xf5a9, 0) // success!
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} else Cpu6502.BreakpointResult(0xf704, null) // 'file not found'
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} else Cpu6502.BreakpointResult(0xf710, null) // 'missing file name'
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} else return Cpu6502.BreakpointResult(0xf707, null) // 'device not present' (VERIFY command not supported)
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}
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// TODO: breakpoint on kernel SAVE
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private fun searchAndLoadFile(filename: String, device: UByte, secondary: UByte, basicLoadAddress: Address): Address? {
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when (filename) {
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"*" -> {
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// load the first file in the directory
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return searchAndLoadFile(File(".").listFiles()?.firstOrNull()?.name ?: "", device, secondary, basicLoadAddress)
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}
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"$" -> {
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// load the directory
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val files = File(".")
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.listFiles(FileFilter { it.isFile })!!
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.associate {
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val name = it.nameWithoutExtension.toUpperCase()
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val ext = it.extension.toUpperCase()
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val fileAndSize = Pair(it, it.length())
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if(name.isEmpty())
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Pair("." + ext, "") to fileAndSize
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else
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Pair(name, ext) to fileAndSize
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}
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val dirname = File(".").canonicalPath.substringAfterLast(File.separator).toUpperCase()
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val dirlisting = makeDirListing(dirname, files, basicLoadAddress)
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ram.load(dirlisting, basicLoadAddress)
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return basicLoadAddress + dirlisting.size - 1
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}
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else -> {
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fun findHostFile(filename: String): String? {
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val file = File(".").listFiles(FileFilter { it.isFile })?.firstOrNull {
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it.name.toUpperCase()==filename
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}
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return file?.name
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}
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val hostFileName = findHostFile(filename) ?: findHostFile("$filename.PRG") ?: return null
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return try {
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return if (secondary == 1.toShort()) {
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val (loadAddress, size) = ram.loadPrg(hostFileName, null)
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loadAddress + size - 1
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} else {
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val (loadAddress, size) = ram.loadPrg(hostFileName, basicLoadAddress)
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loadAddress + size - 1
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}
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} catch (iox: IOException) {
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println("LOAD ERROR $iox")
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null
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}
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}
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}
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}
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private fun makeDirListing(
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dirname: String,
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files: Map<Pair<String, String>, Pair<File, Long>>,
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basicLoadAddress: Address
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): Array<UByte> {
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var address = basicLoadAddress
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val listing = mutableListOf<UByte>()
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fun addLine(lineNumber: Int, line: String) {
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address += line.length + 3
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listing.add((address and 0xff).toShort())
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listing.add((address ushr 8).toShort())
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listing.add((lineNumber and 0xff).toShort())
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listing.add((lineNumber ushr 8).toShort())
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listing.addAll(line.map{ it.toShort() })
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listing.add(0)
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}
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addLine(0, "\u0012\"${dirname.take(16).padEnd(16)}\" 00 2A")
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var totalBlocks = 0
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files.forEach {
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val blocksize = (it.value.second / 256).toInt()
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totalBlocks += blocksize
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val filename = it.key.first.take(16)
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val padding1 = " ".substring(blocksize.toString().length)
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val padding2 = " ".substring(filename.length)
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addLine(blocksize, "$padding1 \"$filename\" $padding2 ${it.key.second.take(3).padEnd(3)}" )
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}
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addLine(kotlin.math.max(0, 664-totalBlocks), "BLOCKS FREE.")
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listing.add(0)
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listing.add(0)
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return listing.toTypedArray()
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}
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init {
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hostDisplay.iconImage = ImageIcon(javaClass.getResource("/icon.png")).image
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debugWindow.iconImage = hostDisplay.iconImage
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debugWindow.setLocation(hostDisplay.location.x+hostDisplay.width, hostDisplay.location.y)
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cpu.addBreakpoint(0xffd5, ::breakpointKernelLoad)
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bus += basicRom
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bus += kernalRom
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@ -73,8 +176,8 @@ class C64Machine(title: String) : IVirtualMachine {
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}
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override fun loadFileInRam(file: File, loadAddress: Address?) {
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if(file.extension=="prg" && loadAddress==null)
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ram.loadPrg(file.inputStream())
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if(file.extension=="prg" && (loadAddress==null || loadAddress==0x0801))
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ram.loadPrg(file.inputStream(), null)
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else
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ram.load(file.readBytes(), loadAddress!!)
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}
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@ -1,13 +1,10 @@
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package razorvine.examplemachines
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import razorvine.ksim65.Bus
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import razorvine.ksim65.Cpu6502
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import razorvine.ksim65.*
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import java.awt.*
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import java.awt.image.BufferedImage
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import javax.imageio.ImageIO
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import javax.swing.event.MouseInputListener
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import razorvine.ksim65.IHostInterface
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import razorvine.ksim65.IVirtualMachine
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import java.awt.event.*
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import java.io.File
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import java.lang.Integer.parseInt
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@ -302,12 +299,12 @@ class DebugWindow(private val vm: IVirtualMachine) : JFrame("debugger"), ActionL
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fun updateCpu(cpu: Cpu6502, bus: Bus) {
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val state = cpu.snapshot()
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cyclesTf.text = state.cycles.toString()
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regAtf.text = cpu.hexB(state.A)
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regXtf.text = cpu.hexB(state.X)
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regYtf.text = cpu.hexB(state.Y)
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regAtf.text = hexB(state.A)
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regXtf.text = hexB(state.X)
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regYtf.text = hexB(state.Y)
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regPtf.text = "NV-BDIZC\n" + state.P.asInt().toString(2).padStart(8, '0')
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regPCtf.text = cpu.hexW(state.PC)
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regSPtf.text = cpu.hexB(state.SP)
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regPCtf.text = hexW(state.PC)
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regSPtf.text = hexB(state.SP)
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val memory = bus.memoryComponentFor(state.PC)
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disassemTf.text = cpu.disassembleOneInstruction(memory.data, state.PC, memory.startAddress).first.substringAfter(' ').trim()
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val pages = vm.getZeroAndStackPages()
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@ -36,7 +36,7 @@ class VirtualMachine(title: String) : IVirtualMachine {
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ram[Cpu6502.RESET_vector] = 0x00
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ram[Cpu6502.RESET_vector + 1] = 0x10
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ram.loadPrg(javaClass.getResourceAsStream("/vmdemo.prg"))
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ram.loadPrg(javaClass.getResourceAsStream("/vmdemo.prg"), null)
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bus += rtc
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bus += timer
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@ -56,7 +56,7 @@ class VirtualMachine(title: String) : IVirtualMachine {
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override fun loadFileInRam(file: File, loadAddress: Address?) {
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if (file.extension == "prg" && loadAddress == null)
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ram.loadPrg(file.inputStream())
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ram.loadPrg(file.inputStream(), null)
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else
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ram.load(file.readBytes(), loadAddress!!)
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}
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@ -5,6 +5,7 @@ import razorvine.ksim65.components.BusComponent
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import razorvine.ksim65.components.MemoryComponent
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import razorvine.ksim65.components.UByte
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/**
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* 6502 cpu simulation (the NMOS version) including the 'illegal' opcodes.
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* TODO: actually implement the illegal opcodes, see http://www.ffd2.com/fridge/docs/6502-NMOS.extra.opcodes
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@ -82,7 +83,22 @@ open class Cpu6502(private val stopOnBrk: Boolean = false) : BusComponent() {
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val P: StatusRegister,
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val PC: Address,
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val cycles: Long
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)
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) {
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override fun toString(): String {
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return "cycle:$cycles - pc=${hexW(PC)} " +
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"A=${hexB(A)} " +
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"X=${hexB(X)} " +
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"Y=${hexB(Y)} " +
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"SP=${hexB(SP)} " +
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" n=" + (if (P.N) "1" else "0") +
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" v=" + (if (P.V) "1" else "0") +
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" b=" + (if (P.B) "1" else "0") +
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" d=" + (if (P.D) "1" else "0") +
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" i=" + (if (P.I) "1" else "0") +
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" z=" + (if (P.Z) "1" else "0") +
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" c=" + (if (P.C) "1" else "0")
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}
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}
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protected enum class AddrMode {
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Imp,
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@ -163,24 +179,6 @@ open class Cpu6502(private val stopOnBrk: Boolean = false) : BusComponent() {
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fun removeBreakpoint(address: Address) = breakpoints.remove(address)
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fun hexW(number: Address, allowSingleByte: Boolean = false): String {
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val msb = number ushr 8
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val lsb = number and 0xff
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return if (msb == 0 && allowSingleByte)
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hexB(lsb)
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else
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hexB(msb) + hexB(lsb)
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}
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fun hexB(number: Short): String = hexB(number.toInt())
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fun hexB(number: Int): String {
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val hexdigits = "0123456789abcdef"
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val loNibble = number and 15
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val hiNibble = number ushr 4
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return hexdigits[hiNibble].toString() + hexdigits[loNibble]
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}
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fun disassemble(memory: MemoryComponent, from: Address, to: Address) =
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disassemble(memory.data, memory.startAddress, from, to)
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@ -333,7 +331,7 @@ open class Cpu6502(private val stopOnBrk: Boolean = false) : BusComponent() {
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currentOpcode = read(regPC)
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currentInstruction = instructions[currentOpcode]
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tracing?.invoke(logState())
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tracing?.invoke(snapshot().toString())
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breakpoints[regPC]?.let { breakpoint ->
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val oldPC = regPC
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@ -381,21 +379,6 @@ open class Cpu6502(private val stopOnBrk: Boolean = false) : BusComponent() {
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pendingInterrupt = Interrupt.IRQ
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}
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fun logState(): String =
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"cycle:$totalCycles - pc=${hexW(regPC)} " +
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"A=${hexB(regA)} " +
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"X=${hexB(regX)} " +
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"Y=${hexB(regY)} " +
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"SP=${hexB(regSP)} " +
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" n=" + (if (regP.N) "1" else "0") +
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" v=" + (if (regP.V) "1" else "0") +
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" b=" + (if (regP.B) "1" else "0") +
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" d=" + (if (regP.D) "1" else "0") +
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" i=" + (if (regP.I) "1" else "0") +
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" z=" + (if (regP.Z) "1" else "0") +
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" c=" + (if (regP.C) "1" else "0") +
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" icycles=$instrCycles instr=${hexB(currentOpcode)}:${currentInstruction.mnemonic}"
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protected fun getFetched() =
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if (currentInstruction.mode == AddrMode.Imm ||
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currentInstruction.mode == AddrMode.Acc ||
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21
src/main/kotlin/razorvine/ksim65/Utils.kt
Normal file
21
src/main/kotlin/razorvine/ksim65/Utils.kt
Normal file
@ -0,0 +1,21 @@
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package razorvine.ksim65
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import razorvine.ksim65.components.Address
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fun hexW(number: Address, allowSingleByte: Boolean = false): String {
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val msb = number ushr 8
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val lsb = number and 0xff
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return if (msb == 0 && allowSingleByte)
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hexB(lsb)
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else
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hexB(msb) + hexB(lsb)
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}
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fun hexB(number: Short): String = hexB(number.toInt())
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fun hexB(number: Int): String {
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val hexdigits = "0123456789abcdef"
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val loNibble = number and 15
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val hiNibble = number ushr 4
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return hexdigits[hiNibble].toString() + hexdigits[loNibble]
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}
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@ -1,6 +1,7 @@
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package razorvine.ksim65.components
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import java.io.File
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import java.io.IOException
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import java.io.InputStream
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/**
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@ -26,14 +27,17 @@ class Ram(startAddress: Address, endAddress: Address) : MemoryComponent(startAdd
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/**
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* Load a c64-style prg program. This file type has the load address as the first two bytes.
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*/
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fun loadPrg(filename: String) = loadPrg(File(filename).inputStream())
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fun loadPrg(filename: String, overrideLoadAddress: Address?)
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= loadPrg(File(filename).inputStream(), overrideLoadAddress)
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/**
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* Load a c64-style prg program. This file type has the load address as the first two bytes.
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*/
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fun loadPrg(stream: InputStream) {
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fun loadPrg(stream: InputStream, overrideLoadAddress: Address?): Pair<Address, Int> {
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val bytes = stream.readBytes()
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val loadAddress = (bytes[0].toInt() or (bytes[1].toInt() shl 8)) and 65535
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if(bytes.size > 0xffff)
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throw IOException("file too large")
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val loadAddress = overrideLoadAddress ?: bytes[0] + 256* bytes[1]
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val baseAddress = loadAddress - startAddress
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bytes.drop(2).forEachIndexed { index, byte ->
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data[baseAddress + index] =
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@ -42,10 +46,11 @@ class Ram(startAddress: Address, endAddress: Address) : MemoryComponent(startAdd
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else
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(256 + byte).toShort()
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}
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return Pair(baseAddress, bytes.size-2)
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}
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/**
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* load a binary program at the given address
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* load a binary data file at the given address
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*/
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fun load(filename: String, address: Address) {
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val bytes = File(filename).readBytes()
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@ -42,7 +42,7 @@ abstract class FunctionalTestsBase {
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}
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protected fun runTest(testprogram: String) {
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ram.loadPrg("src/test/kotlin/6502testsuite/$testprogram")
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ram.loadPrg("src/test/kotlin/6502testsuite/$testprogram", null)
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bus.reset()
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cpu.regSP = 0xfd
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cpu.regP.fromInt(0b00100100)
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@ -50,7 +50,7 @@ abstract class FunctionalTestsBase {
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while (cpu.totalCycles < 50000000L) {
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bus.clock()
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}
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fail("test hangs: " + cpu.logState())
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fail("test hangs: " + cpu.snapshot())
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} catch (e: Cpu6502.InstructionError) {
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println(">>> INSTRUCTION ERROR: ${e.message}")
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} catch (le: KernalLoadNextPart) {
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@ -2,6 +2,7 @@ import razorvine.ksim65.Bus
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import razorvine.ksim65.Cpu6502
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import razorvine.ksim65.Cpu65C02
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import razorvine.ksim65.components.Ram
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import razorvine.ksim65.hexB
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import kotlin.test.*
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import kotlin.system.measureNanoTime
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import kotlin.test.assertEquals
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@ -140,9 +141,9 @@ class Test6502CpuBasics {
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val actualA = ram[0x00fd]
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val predictedF = ram[0x00fe]
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val actualF = ram[0x00ff]
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println("BCD TEST: FAIL!! code=${cpu.hexB(code)} value1=${cpu.hexB(v1)} value2=${cpu.hexB(v2)}")
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println(" predictedA=${cpu.hexB(predictedA)}")
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println(" actualA=${cpu.hexB(actualA)}")
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println("BCD TEST: FAIL!! code=${hexB(code)} value1=${hexB(v1)} value2=${hexB(v2)}")
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println(" predictedA=${hexB(predictedA)}")
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println(" actualA=${hexB(actualA)}")
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println(" predictedF=${predictedF.toString(2).padStart(8,'0')}")
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println(" actualF=${actualF.toString(2).padStart(8,'0')}")
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fail("BCD test failed")
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@ -36,7 +36,7 @@ class Test6502Functional {
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return
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}
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println(cpu.logState())
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println(cpu.snapshot())
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val d = cpu.disassemble(ram, cpu.regPC-20, cpu.regPC+20)
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println(d.joinToString ("\n"))
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fail("test failed")
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@ -68,7 +68,7 @@ class Test6502Functional {
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return
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}
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println(cpu.logState())
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println(cpu.snapshot())
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val d = cpu.disassemble(ram, cpu.regPC-20, cpu.regPC+20)
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println(d.joinToString ("\n"))
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fail("test failed")
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