mirror of https://github.com/irmen/ksim65.git
81 lines
2.6 KiB
Kotlin
81 lines
2.6 KiB
Kotlin
package razorvine.ksim65
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import razorvine.ksim65.components.*
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import razorvine.ksim65.components.Cpu6502.Companion.IRQ_vector
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import razorvine.ksim65.components.Cpu6502.Companion.NMI_vector
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import razorvine.ksim65.components.Cpu6502.Companion.RESET_vector
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fun main(args: Array<String>) {
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printSoftwareHeader()
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startSimulator(args)
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}
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internal fun printSoftwareHeader() {
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val buildVersion = object {}.javaClass.getResource("/version.txt").readText().trim()
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println("\nKSim65 6502 cpu simulator v$buildVersion by Irmen de Jong (irmen@razorvine.net)")
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println("This software is free and licensed under the MIT open-source license\n")
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}
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private fun startSimulator(args: Array<String>) {
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// create a computer system.
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// note that the order in which components are added to the bus, is important:
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// it determines the priority of reads and writes.
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val cpu = Cpu6502(true)
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val ram = Ram(0, 0xffff)
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ram[RESET_vector] = 0x00
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ram[RESET_vector + 1] = 0x10
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ram[IRQ_vector] = 0x00
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ram[IRQ_vector + 1] = 0x20
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ram[NMI_vector] = 0x00
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ram[NMI_vector + 1] = 0x30
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// // read the RTC and write the date+time to $2000
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// for(b in listOf(0xa0, 0x00, 0xb9, 0x00, 0xd1, 0x99, 0x00, 0x20, 0xc8, 0xc0, 0x09, 0xd0, 0xf5, 0x00).withIndex()) {
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// ram[0x1000+b.index] = b.value.toShort()
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// }
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// set the timer to $22aa00 and enable it on regular irq
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for(b in listOf(0xa9, 0x00, 0x8d, 0x00, 0xd2, 0xa9, 0x00, 0x8d, 0x01, 0xd2, 0xa9, 0xaa, 0x8d, 0x02,
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0xd2, 0xa9, 0x22, 0x8d, 0x03, 0xd2, 0xa9, 0x01, 0x8d, 0x00, 0xd2, 0x4c, 0x19, 0x10).withIndex()) {
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ram[0x1000+b.index] = b.value.toShort()
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}
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// load the irq routine that prints 'irq!' to the parallel port
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for(b in listOf(0x48, 0xa9, 0x09, 0x8d, 0x00, 0xd0, 0xee, 0x01, 0xd0, 0xa9, 0x12, 0x8d, 0x00, 0xd0,
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0xee, 0x01, 0xd0, 0xa9, 0x11, 0x8d, 0x00, 0xd0, 0xee, 0x01, 0xd0, 0xa9, 0x21, 0x8d, 0x00, 0xd0,
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0xee, 0x01, 0xd0, 0x68, 0x40).withIndex()) {
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ram[0x2000+b.index] = b.value.toShort()
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}
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val parallel = ParallelPort(0xd000, 0xd001)
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val clock = RealTimeClock(0xd100, 0xd108)
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val timer = Timer(0xd200, 0xd203, cpu)
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val bus = Bus()
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bus.add(cpu)
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bus.add(parallel)
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bus.add(clock)
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bus.add(timer)
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bus.add(ram)
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bus.reset()
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cpu.Status.I = false // enable interrupts
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try {
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while (true) {
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bus.clock()
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}
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} catch (ix: Cpu6502.InstructionError) {
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println("Hmmm... $ix")
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}
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ram.hexDump(0x1000, 0x1020)
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val dis = cpu.disassemble(ram, 0x1000, 0x1020)
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println(dis.joinToString("\n"))
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ram.hexDump(0x2000, 0x2008)
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}
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