mirror of https://github.com/irmen/ksim65.git
282 lines
12 KiB
Kotlin
282 lines
12 KiB
Kotlin
package razorvine.c64emu
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import razorvine.examplemachines.DebugWindow
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import razorvine.ksim65.*
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import razorvine.ksim65.components.Address
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import razorvine.ksim65.components.Ram
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import razorvine.ksim65.components.Rom
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import razorvine.ksim65.components.UByte
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import java.io.File
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import java.io.FileFilter
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import java.io.FileNotFoundException
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import java.io.IOException
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import java.nio.file.Path
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import java.nio.file.Paths
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import javax.swing.ImageIcon
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import javax.swing.JOptionPane
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import kotlin.concurrent.scheduleAtFixedRate
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/**
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* The virtual representation of the Commodore-64
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*
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* It simulates text-mode video.
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* It hooks into the LOAD and SAVE kernal routines so you can actually
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* load and save your basic programs to the host filesystem.
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*/
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class C64Machine(title: String) : IVirtualMachine {
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private val romsPath = determineRomPath()
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private val chargenRom = Rom(0xd000, 0xdfff).also {
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val chargenData = romsPath.resolve("chargen").toFile().readBytes()
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it.load(chargenData)
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}
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private val basicRom = Rom(0xa000, 0xbfff).also {
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val basicData = romsPath.resolve("basic").toFile().readBytes()
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it.load(basicData)
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}
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private val kernalRom = Rom(0xe000, 0xffff).also {
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val kernalData = romsPath.resolve("kernal").toFile().readBytes()
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it.load(kernalData)
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}
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val cpuIoPort = CpuIoPort()
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// This bus contains "mmu" logic to control the memory bank switching controlled by the 6510's io port in $00/$01.
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// Therefore we provide it the various roms directly and not "connect" these to the bus in the default way.
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override val bus = Bus6510(cpuIoPort, chargenRom, basicRom, kernalRom)
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override val cpu = Cpu6502()
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// the C64 has 64KB of RAM. Some of it may be banked out and replaced by ROM.
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val ram = Ram(0x0000, 0xffff)
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val vic = VicII(0xd000, 0xd3ff, cpu)
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val cia1 = Cia(1, 0xdc00, 0xdcff, cpu)
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val cia2 = Cia(2, 0xdd00, 0xddff, cpu)
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private val monitor = Monitor(bus, cpu)
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private val debugWindow = DebugWindow(this)
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private val hostDisplay = MainC64Window(title, chargenRom, ram, cpu, cia1)
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private var paused = false
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init {
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cpu.addBreakpoint(0xffd5, ::breakpointKernelLoad) // intercept LOAD subroutine in the kernal
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cpu.addBreakpoint(0xffd8, ::breakpointKernelSave) // intercept SAVE subroutine in the kernal
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cpu.breakpointForBRK = ::breakpointBRK
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bus += vic
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bus += cia1
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bus += cia2
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bus += cpuIoPort
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bus += ram // note: the ROMs are mapped depending on the cpu's io port
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bus += cpu
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bus.reset()
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hostDisplay.iconImage = ImageIcon(javaClass.getResource("/icon.png")).image
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debugWindow.iconImage = hostDisplay.iconImage
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debugWindow.setLocation(hostDisplay.location.x+hostDisplay.width, hostDisplay.location.y)
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debugWindow.isVisible = true
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hostDisplay.isVisible = true
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//hostDisplay.start(30)
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}
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private fun breakpointKernelLoad(cpu: Cpu6502, pc: Address): Cpu6502.BreakpointResultAction {
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if (cpu.regA == 0) {
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val fnlen = ram[0xb7] // file name length
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val fa = ram[0xba] // device number
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val sa = ram[0xb9] // secondary address
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val txttab = ram[0x2b]+256*ram[0x2c] // basic load address ($0801 usually)
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val fnaddr = ram[0xbb]+256*ram[0xbc] // file name address
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return if (fnlen > 0) {
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val filename = (0 until fnlen).map { ram[fnaddr+it].toChar() }.joinToString("")
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val loadEndAddress = searchAndLoadFile(filename, fa, sa, txttab)
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if (loadEndAddress != null) {
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ram[0x90] = 0 // status OK
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ram[0xae] = (loadEndAddress and 0xff).toShort()
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ram[0xaf] = (loadEndAddress ushr 8).toShort()
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Cpu6502.BreakpointResultAction(changePC = 0xf5a9) // success!
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} else Cpu6502.BreakpointResultAction(changePC = 0xf704) // 'file not found'
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} else Cpu6502.BreakpointResultAction(changePC = 0xf710) // 'missing file name'
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} else return Cpu6502.BreakpointResultAction(changePC = 0xf707) // 'device not present' (VERIFY command not supported)
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}
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private fun breakpointKernelSave(cpu: Cpu6502, pc: Address): Cpu6502.BreakpointResultAction {
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val fnlen = ram[0xb7] // file name length
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// val fa = ram[0xba] // device number
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// val sa = ram[0xb9] // secondary address
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val fnaddr = ram[0xbb]+256*ram[0xbc] // file name address
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return if (fnlen > 0) {
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val fromAddr = ram[cpu.regA]+256*ram[cpu.regA+1]
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val endAddr = cpu.regX+256*cpu.regY
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val data = (fromAddr..endAddr).map { ram[it].toByte() }.toByteArray()
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var filename = (0 until fnlen).map { ram[fnaddr+it].toChar() }.joinToString("").toLowerCase()
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if (!filename.endsWith(".prg")) filename += ".prg"
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File(filename).outputStream().use {
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it.write(fromAddr and 0xff)
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it.write(fromAddr ushr 8)
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it.write(data)
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}
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ram[0x90] = 0 // status OK
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Cpu6502.BreakpointResultAction(changePC = 0xf5a9) // success!
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} else Cpu6502.BreakpointResultAction(changePC = 0xf710) // 'missing file name'
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}
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private fun breakpointBRK(cpu: Cpu6502, pc: Address): Cpu6502.BreakpointResultAction {
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throw Cpu6502.InstructionError("BRK instruction hit at $${hexW(pc)}")
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}
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private fun searchAndLoadFile(filename: String, device: UByte, secondary: UByte, basicLoadAddress: Address): Address? {
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when (filename) {
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"*" -> {
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// load the first file in the directory
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return searchAndLoadFile(File(".").listFiles()?.firstOrNull()?.name ?: "", device, secondary, basicLoadAddress)
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}
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"$" -> {
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// load the directory
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val files = File(".").listFiles(FileFilter { it.isFile })!!.associate {
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val name = it.nameWithoutExtension.toUpperCase()
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val ext = it.extension.toUpperCase()
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val fileAndSize = Pair(it, it.length())
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if (name.isEmpty()) Pair(".$ext", "") to fileAndSize
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else Pair(name, ext) to fileAndSize
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}
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val dirname = File(".").canonicalPath.substringAfterLast(File.separator).toUpperCase()
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val dirlisting = makeDirListing(dirname, files, basicLoadAddress)
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ram.load(dirlisting, basicLoadAddress)
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return basicLoadAddress+dirlisting.size-1
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}
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else -> {
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fun findHostFile(filename: String): String? {
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val file = File(".").listFiles(FileFilter { it.isFile })?.firstOrNull {
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it.name.toUpperCase() == filename
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}
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return file?.name
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}
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val hostFileName = findHostFile(filename) ?: findHostFile("$filename.PRG") ?: return null
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return try {
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return if (secondary == 1.toShort()) {
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val (loadAddress, size) = ram.loadPrg(hostFileName, null)
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loadAddress+size-1
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} else {
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val (loadAddress, size) = ram.loadPrg(hostFileName, basicLoadAddress)
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loadAddress+size-1
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}
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} catch (iox: IOException) {
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println("LOAD ERROR $iox")
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null
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}
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}
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}
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}
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private fun makeDirListing(dirname: String, files: Map<Pair<String, String>, Pair<File, Long>>,
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basicLoadAddress: Address): Array<UByte> {
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var address = basicLoadAddress
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val listing = mutableListOf<UByte>()
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fun addLine(lineNumber: Int, line: String) {
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address += line.length+3
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listing.add((address and 0xff).toShort())
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listing.add((address ushr 8).toShort())
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listing.add((lineNumber and 0xff).toShort())
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listing.add((lineNumber ushr 8).toShort())
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listing.addAll(line.map { it.toShort() })
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listing.add(0)
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}
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addLine(0, "\u0012\"${dirname.take(16).padEnd(16)}\" 00 2A")
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var totalBlocks = 0
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files.forEach {
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val blocksize = (it.value.second/256).toInt()
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totalBlocks += blocksize
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val filename = it.key.first.take(16)
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val padding1 = " ".substring(blocksize.toString().length)
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val padding2 = " ".substring(filename.length)
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addLine(blocksize, "$padding1 \"$filename\" $padding2${it.key.second.take(3).padEnd(3)}")
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}
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addLine(kotlin.math.max(0, 664-totalBlocks), "BLOCKS FREE.")
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listing.add(0)
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listing.add(0)
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return listing.toTypedArray()
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}
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override fun loadFileInRam(file: File, loadAddress: Address?) {
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if (file.extension == "prg" && (loadAddress == null || loadAddress == 0x0801)) ram.loadPrg(file.inputStream(), null)
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else ram.load(file.readBytes(), loadAddress!!)
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}
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override fun getZeroAndStackPages(): Array<UByte> = ram.getBlock(0, 512)
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override fun pause(paused: Boolean) {
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this.paused = paused
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}
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override fun step() {
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// step a single full instruction
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while (cpu.instrCycles > 0) bus.clock()
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bus.clock()
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while (cpu.instrCycles > 0) bus.clock()
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}
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override fun reset() {
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bus.reset()
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hostDisplay.reset()
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}
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override fun executeMonitorCommand(command: String) = monitor.command(command)
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fun start() {
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javax.swing.Timer(50) {
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debugWindow.updateCpu(cpu, bus)
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}.start()
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// we synchronise cpu cycles to the vertical blank of the Vic chip
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// this should result in ~1 Mhz cpu speed
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val timer = java.util.Timer("cpu-cycle", true)
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timer.scheduleAtFixedRate(0, 1000L/VicII.framerate) {
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// if(cpu.isLooping) {
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// // cpu is jump looping, could do some sleeping here perhaps
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// // but should still consider irqs occurring in the meantime...
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// }
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if (!paused) {
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try {
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while (vic.vsync) step()
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while (!vic.vsync) step()
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hostDisplay.repaint() // repaint synced with VIC vertical blank
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} catch (rx: RuntimeException) {
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JOptionPane.showMessageDialog(hostDisplay, "Run time error: $rx", "Error during execution", JOptionPane.ERROR_MESSAGE)
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this.cancel()
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throw rx
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} catch (ex: Error) {
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JOptionPane.showMessageDialog(hostDisplay, "Run time error: $ex", "Error during execution", JOptionPane.ERROR_MESSAGE)
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this.cancel()
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throw ex
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}
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}
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}
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}
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}
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fun determineRomPath(): Path {
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val candidates = listOf("./roms", "~/roms/c64", "~/roms", "~/.vice/C64")
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candidates.forEach {
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val path = Paths.get(expandUser(it))
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if (path.toFile().isDirectory) return path
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}
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throw FileNotFoundException("no roms directory found, tried: $candidates")
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}
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fun expandUser(path: String): String {
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return when {
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path.startsWith("~/") -> System.getProperty("user.home")+path.substring(1)
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path.startsWith("~"+File.separatorChar) -> System.getProperty("user.home")+path.substring(1)
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path.startsWith("~") -> throw UnsupportedOperationException("home dir expansion not implemented for other users")
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else -> path
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}
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}
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fun main() {
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val machine = C64Machine("virtual Commodore-64 - using KSim65 v${Version.version}")
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machine.start()
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}
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