l65/samples/vcs_basic.l65

require'vcs'
mappers['2K']()

local kernel = function()
    ldx#0xb0 @_loop sta WSYNC stx COLUBK dex bne _loop
end

@@main
    init()
@_frame
    overscan() vblank() screen(kernel) jmp _frame

; -- needed if last instruction is implied
writebin(filename..'.bin')
writesym(filename..'.sym')
print(stats)
Sections now generate regular labels for themselves. 2017-09-30 00:35:59 +02:00			`require'vcs'`
			`mappers['2K']()`

			`local kernel = function()`
			`ldx#0xb0 @_loop sta WSYNC stx COLUBK dex bne _loop`
			`end`

			`@@main`
			`init()`
			`@_frame`
			`overscan() vblank() screen(kernel) jmp _frame`
Tested cross bank stubs generation. 2017-10-03 11:51:36 +02:00
			`; -- needed if last instruction is implied`
Sections now generate regular labels for themselves. 2017-09-30 00:35:59 +02:00			`writebin(filename..'.bin')`
			`writesym(filename..'.sym')`
			`print(stats)`