Added LXI instruction.

This commit is contained in:
mooz 2018-11-08 01:11:17 +01:00
parent 6fafc034a0
commit 564746133a
2 changed files with 54 additions and 17 deletions

View File

@ -38,7 +38,9 @@ local Keywords_data = {
'dc',
}
local Keywords_7801 = {
'block', 'calf', 'calt', 'dcr', 'jr', 'lxi', 'mvi', 'nop'
'block', 'calb', 'calf', 'calt', 'daa', 'dcr', 'exa', 'exx',
'halt', 'jb', 'jr', 'lxi', 'mvi', 'nop', 'ret', 'reti',
'rets', 'sio', 'softi', 'stm', 'table',
}
local Registers_7801 = {
a=8,b=8,c=8,d=8,e=8,h=8,l=8,v=8,
@ -62,10 +64,10 @@ opcode_arg_encapsulate(true)
local opcode_encapsulate = {} -- additionnal opcode, to have basic encapsulation (function(a) return a end)
local opcode_alias = {} -- alternate user names for opcodes
local opcode_implied = lookupify{
'block', 'dcr', 'nop'
'block', 'calb', 'daa', 'exa', 'exx', 'halt', 'jb', 'nop', 'ret', 'reti', 'rets', 'sio', 'softi', 'stm', 'table'
}
local opcode_immediate = lookupify{
'calf', 'calt', 'lxi', 'mvi'
'calf', 'calt'
}
local opcode_relative = lookupify{
'jr',
@ -73,10 +75,17 @@ local opcode_relative = lookupify{
local opcode_reg = lookupify{
'dcr', 'inr'
}
local opcode_regw = lookupify{
'lxi'
}
local opcode_reg_list = {
a = lookupify{'dcr','inr'},
b = lookupify{'dcr','inr'},
c = lookupify{'dcr','inr'},
bc = lookupify{'lxi'},
de = lookupify{'lxi'},
hl = lookupify{'lxi'},
sp = lookupify{'lxi'},
}
local addressing_map = {
@ -84,6 +93,7 @@ local addressing_map = {
imm = opcode_immediate,
rel = opcode_relative,
reg = opcode_reg,
regw = opcode_regw,
}
local Scope = {
@ -1391,13 +1401,40 @@ local function ParseLua(src, src_name)
end
stat = emit_call{name=op, args={expr, mod_expr}, inverse_encapsulate=inverse_encapsulate, paren_open_white=paren_open_whites} break
end
if opcode_reg[op] then
if opcode_reg[op] or opcode_regw[op] then
tok:Save()
local register_name = tok:Get(tokenList).Data
if not Registers_7801[register_name] then return false, GenerateError(register_name .. " is not a valid register") end
if not opcode_reg_list[register_name] and opcode_reg_list[register_name][op] then
return false, GenerateError("Opcode " .. op " doesn't support " .. register_name .. " register")
end
stat = emit_call{name=op .. register_name, args={expr}, encapsulate=false} break
local call_args = {name=op..register_name}
if not Registers_7801[register_name] then tok:Restore()
return false, GenerateError(register_name .. " is not a valid register")
end
if not opcode_reg_list[register_name] and opcode_reg_list[register_name][op] then tok:Restore()
return false, GenerateError("Opcode " .. op .. " doesn't support this addressing mode")
end
if opcode_regw[op] then
if not tok:ConsumeSymbol(',', tokenList) then tok:Restore()
return false, GenerateError("Opcode " .. op .. " doesn't support this addressing mode")
end
local inverse_encapsulate = tok:ConsumeSymbol('!', tokenList)
local st, expr = ParseExpr(scope) if not st then tok:Restore()
return false, expr
end
local paren_open_whites = {}
if inverse_encapsulate then for _,v in ipairs(tokenList[#tokenList-1].LeadingWhite) do table.insert(paren_open_whites, v) end end
for _,v in ipairs(tokenList[#tokenList].LeadingWhite) do table.insert(paren_open_whites, v) end
if tok:ConsumeSymbol(',', tokenList) then
commaTokenList[1] = tokenList[#tokenList]
mod_st, mod_expr = ParseExpr(scope)
if not mod_st then tok:Restore()
return false, mod_expr
end
end
call_args.args={expr, mod_expr}
call_args.inverse_encapsulate=inverse_encapsulate
call_args.paren_open_white=paren_open_whites
end
tok:Commit()
stat = emit_call(call_args) break
end
if opcode_implied[op] then stat = emit_call{name=op} break end
error("internal error: unable to find addressing of valid opcode " .. op) -- should not happen

View File

@ -209,8 +209,8 @@ for k,v in pairs(opvind) do
end
end
--[[ [todo]
local opvindxx ={
--[[
local opviwaxx ={
aniw=M.op(0x05,16),
oriw=M.op(0x15,16),
gtiw=M.op(0x25,13),
@ -220,8 +220,8 @@ local opvindxx ={
neiw=M.op(0x65,13),
mviw=M.op(0x71,13),
eqiw=M.op(0x75,13)
} M.opvindxx = opvindxx
for k,v in pairs(opvindxx) do
} M.opvwaxx = opvwaxx
for k,v in pairs(opvwaxx) do
M[k .. 'vindxx'] = function(late0, early0, late1, early1)
local l65dbg = { info=debug.getinfo(2, 'Sl'), trace=debug.traceback(nil, 1) }
local size = function()
@ -240,16 +240,16 @@ for k,v in pairs(opvindxx) do
end
]]--
local opwwww = {
local opw = {
call=M.op(0x44,16),
jmp=M.op(0x54,10),
lxisp=M.op(0x04,10),
lxibc=M.op(0x14,10),
lxide=M.op(0x24,10),
lxihl=M.op(0x34,10)
} M.opwwww = opwwww
for k,v in pairs(opwwww) do
M[k .. 'wwww'] = function(late, early)
} M.opw = opw
for k,v in pairs(opw) do
M[k] = function(late, early)
local l65dbg = { info=debug.getinfo(2, 'Sl'), trace=debug.traceback(nil, 1) }
local size = function() late,early = M.size_op(late,early) return 3 end
local bin = function() local l65dbg=l65dbg