mirror of https://github.com/g012/l65.git
[NES] Added UxROM, GxROM, CNROM, MMC1 mappers.
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g012
parent
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commit
a60cf98c57
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nes.l65
266
nes.l65
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@ -274,6 +274,7 @@ end
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local n0ne = function(x) return not x or x == 0 end
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local val0 = function(x) return x and x or 0 end
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-- https://wiki.nesdev.com/w/index.php/NROM
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mappers.NROM = function(t)
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if not t then t = {} end
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if not t.prgsize then t.prgsize = 16384 end
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@ -290,11 +291,249 @@ mappers.NROM = function(t)
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end
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mappers[0] = mappers.NROM
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-- https://wiki.nesdev.com/w/index.php/UxROM
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-- Has bus conflicts.
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mappers.UxROM = function(t)
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if not t then t = {} end
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t.mapperid = 2
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if not t.prgsize then t.prgsize = 32768 end
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assert(t.prgsize >= 0x8000 and t.prgsize <= 0x40000, "prgsize must be at least 32kB and at most 256kB")
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if not t.chrsize then t.chrsize = 8192 end
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assert(t.chrsize == 0x2000, "chrsize must be 8kB")
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assert(not t.mirror or ({ h=1, v=1 })[t.mirror:lower()], "only H and V mirroring are supported")
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local bc = t.prgsize//0x4000
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for bi=0,bc-2 do
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local o,ix = 0x8000 + bi*0x4000, bc-1-bi
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_ENV['prgrom'..ix] = location{o, o+0x3fff, rorg=0x8000, name='prgrom'..ix}
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end
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local prglast = 0x8000 + (bc-1)*0x4000
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prgrom0 = location{prglast, prglast+0x3fff, rorg=0xc000, name='prgrom0'}
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prgrom = prgrom0
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section{"vectors", org=prglast+0x3ffa} dc.w nmi, main, irq
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@@bankbytes -- for handling bus conflicts
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for i=0,bc-2 do byte(i) end
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local chrstart = 0x8000 + bc*0x4000
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chrrom = location{chrstart, chrstart + 0x1fff, name='chrrom'}
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function switchprgrom(bankix)
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assert(bankix < bc-1)
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lda #bankix tax sta bankbytes,x
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end
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mappers.init = function()
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switchprgrom(1)
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end
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end
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mappers[2] = mappers.UxROM
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--[[
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https://wiki.nesdev.com/w/index.php/CNROM
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Has bus conflicts.
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8kB chrroms are created, unless t.onechrrom is set, in which case only one big chrrom
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location is created instead.
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]]
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mappers.CNROM = function(t)
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if not t then t = {} end
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t.mapperid = 3
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if not t.prgsize then t.prgsize = 16384 end
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assert(t.prgsize == 16384 or t.prgsize == 32768, "prgsize must be 16 or 32kB")
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if not t.chrsize then t.chrsize = 8192 end
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assert(t.chrsize >= 0x2000 and t.chrsize <= 0x8000, "chrsize must be at least 8kB and at most 32kB")
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assert(not t.mirror or ({ h=1, v=1 })[t.mirror:lower()], "only H and V mirroring are supported")
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local prgstart = 0x10000 - t.prgsize
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hdrrom = location{prgstart - 16, prgstart - 1, name='header'}
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header(t)
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prgrom = location{prgstart, 0xffff, name='prgrom'}
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section{"vectors", org=0xfffa} dc.w nmi, main, irq
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@@bankbytes -- for handling bus conflicts
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dc.b 0x00, 0x01, 0x02, 0x03
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dc.b 0x10, 0x11, 0x12, 0x13
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dc.b 0x20, 0x21, 0x22, 0x23
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dc.b 0x30, 0x31, 0x32, 0x33
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local cc = t.chrsize//0x2000
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if t.onechrrom then
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chrrom0 = location{chrstart, chrstart + cc*0x2000 - 1, name='chrrom'}
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else
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for ci=0,cc-1 do
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local o = chrstart + ci*0x2000
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_ENV['chrrom'..ci] = location{o, o+0x2000-1, name='chrrom'..ci}
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end
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end
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chrrom = chrrom0
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securitydiodes = 0 -- set to actual value, eg 0x20
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function switchchrrom(bankix)
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assert(bankix < cc)
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assert(securitydiodes < 0x40)
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ldx #bankix|securitydiodes>>2 lda #bankix|securitydiodes sta bankbytes,x
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end
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mappers.init = function()
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switchchrrom(0)
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end
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end
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mappers[3] = mappers.CNROM
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--[[
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https://wiki.nesdev.com/w/index.php/GxROM
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Has bus conflicts.
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prgroms are numbered from last (0) to first (#-1), so that adding more does not change
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prgrom0, which must contain the reset vector (main).
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8kB chrroms are created, unless t.onechrrom is set, in which case only one big chrrom
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location is created instead.
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]]
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mappers.GxROM = function(t)
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if not t then t = {} end
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t.mapperid = 66
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if not t.prgsize then t.prgsize = 32768 end
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assert(t.prgsize >= 0x8000 and t.prgsize <= 0x20000, "prgsize must be at least 32kB and at most 128kB")
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if not t.chrsize then t.chrsize = 8192 end
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assert(t.chrsize >= 0x2000 and t.chrsize <= 0x8000, "chrsize must be at least 8kB and at most 32kB")
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assert(not t.mirror or ({ h=1, v=1 })[t.mirror:lower()], "only H and V mirroring are supported")
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hdrrom = location{0x7ff0, 0x7fff, name='header'}
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header(t)
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local bc = t.prgsize//0x8000
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for bi=0,bc-1 do
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local o,ix = 0x8000 + bi*0x8000, bc-1-bi
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_ENV['prgrom'..ix] = location{o, o+0x7fff, rorg=0x8000, name='prgrom'..ix}
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section("bankbytes"..ix) -- for handling bus conflicts
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dc.b 0x00, 0x01, 0x02, 0x03
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dc.b 0x10, 0x11, 0x12, 0x13
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dc.b 0x20, 0x21, 0x22, 0x23
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dc.b 0x30, 0x31, 0x32, 0x33
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end
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section{"vectors", org=0x8000+bc*0x8000-6} dc.w nmi, main, irq
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prgrom = prgrom0
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local cc = t.chrsize//0x2000
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if t.onechrrom then
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chrrom0 = location{chrstart, chrstart + cc*0x2000 - 1, name='chrrom'}
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else
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for ci=0,cc-1 do
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local o = chrstart + ci*0x2000
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_ENV['chrrom'..ci] = location{o, o+0x2000-1, name='chrrom'..ci}
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end
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end
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chrrom = chrrom0
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bankregister = 0
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function switchprgrom(bankix)
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assert(bankix < bc)
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bankregister = (bankregister & ~0x30) | (bankix << 4)
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ldx #bankregister&3|bankregister>>2 lda #bankregister sta bankbytes0,x
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end
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function switchchrrom(bankix)
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assert(bankix < cc)
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bankregister = (bankregister & ~3) | bankix
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ldx #bankregister&3|bankregister>>2 lda #bankregister sta bankbytes0,x
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end
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mappers.init = function()
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switchchrrom(0)
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end
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end
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mappers[66] = mappers.GxROM
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--[[
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https://wiki.nesdev.com/w/index.php/MMC1
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prgroms are numbered from last (0) to first (#-1), so that adding more does not change
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prgrom0, which must contain the reset vector (main).
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t.prgmap is an optional function taking a prgrom bank index and returning its rorg value.
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Default is to create 16kB banks if prgswitchmode is not all, 32kB otherwise, and rorg them
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accordingly.
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Same goes for chrrom sizes.
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If t.onechrrom is set, only one big chrrom location is created instead.
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t.prgswitchmode:
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'first' makes 0x8000-0xbfff switchable (default)
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'last' makes 0xc000-0xffff switchable
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'all' makes 0x8000-0xffff switchable
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t.chrswitchmode:
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'all' switches whole 8kB at a time (default)
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'half' switches 2 separate 4kB banks
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]]
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mappers.MMC1 = function(t)
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if not t then t = {} end
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t.mapperid = 1
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if not t.prgswitchmode then t.prgswitchmode = 'first' end
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if not t.chrswitchmode then t.chrswitchmode = 'all' end
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if not t.wramsize then t.wramsize = 0 end
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if not t.bramsize and t.wramsize == 0 then t.bramsize = 8192 end
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local prgram = t.bramsize + t.wramsize
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assert(prgram >= 0x2000 and prgram <= 0x8000, "bramsize or wramsize must be at least 8kB and at most 32kB")
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if not t.prgsize then t.prgsize = 32768 end
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assert(t.prgsize >= 0x8000 and t.prgsize <= 0x80000, "prgsize must be at least 32kB and at most 512kB")
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if not t.chrsize then t.chrsize = 8192 end
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assert(t.chrsize >= 0x2000 and t.chrsize <= 0x20000, "chrsize must be at least 8kB and at most 128kB")
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hdrrom = location{0x7FF0, 0x7FFF, name='header'}
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header(t)
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local bsz = t.prgswitchmode=='all' and 0x8000 or 0x4000
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local prgmap = t.prgmap or function(bi, bc) return t.prgswitchmode=='last' and 0xc000 or 0x8000 end
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local bc = t.prgsize//bsz
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for bi=0,bc-1 do
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local o,ix = 0x8000 + bi*bsz, bc-1-bi
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_ENV['prgrom'..ix] = location{o, o+bsz-1, rorg=prgmap(ix,bc), name='prgrom'..ix}
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end
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section{"vectors", org=0x8000+bc*bsz-6} dc.w nmi, main, irq
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prgrom = prgrom0
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local chrstart = 0x8000 + bc*bsz
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local csz = t.chrswitchmode=='all' and 0x2000 or 0x1000
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local cc = t.chrsize//csz
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if t.onechrrom then
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chrrom0 = location{chrstart, chrstart + cc*csz - 1, name='chrrom'}
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else
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for ci=0,cc-1 do
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local o = chrstart + ci*csz
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_ENV['chrrom'..ci] = location{o, o+csz-1, name='chrrom'..ci}
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end
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end
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chrrom = chrrom0
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local prgswitchmodemap = { all=0, first=3<<2, last=2<<2 }
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local chrswitchmodemap = { all=0, half=1<<4 }
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mmc1ctrl = (mappers.header.mirror==1 and 2 or 3) | prgswitchmodemap[t.prgswitchmode] | chrswitchmodemap[t.chrswitchmode]
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function mmc1write(reg)
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sta reg lsr sta reg lsr sta reg lsr sta reg lsr sta reg
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end
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-- Can be turned into a function, A must contain the bank index.
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-- eg:
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-- @@switchprgrom_func switchprgrom_f()
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-- switchprgrom_f = function() jsr switchprgrom_func rts end
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function switchprgrom_f() mmc1write(0xe000) end
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function switchprgrom(bankix)
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assert(bankix < t.prgsize//0x4000)
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lda #bankix
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switchprgrom_f()
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end
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function switchchrrom_f(slot) assert(slot<2) mmc1write(slot==0 and 0xa000 or 0xc000) end
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function switchchrrom(bankix, slot)
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assert(bankix < t.chrsize//0x1000)
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lda #bankix
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switchchrrom_f(slot or 0)
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end
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function setmirror(mirror)
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mirror = assert(({ h=3, v=2, hi=1, lo=0 })[mirror:lower()])
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mmc1ctrl = (mmc1ctrl & ~3) | mirror
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lda #mmc1ctrl mmc1write(0x8000)
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end
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function setprgswitchmode(mode)
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mode = assert(prgswitchmodemap[mode])
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mmc1ctrl = (mmc1ctrl & ~0xc) | mode
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lda #mmc1ctrl mmc1write(0x8000)
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end
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function setchrswitchmode(mode)
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mode = assert(chrswitchmodemap[mode])
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mmc1ctrl = (mmc1ctrl & ~0x10) | mode
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lda #mmc1ctrl mmc1write(0x8000)
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end
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mappers.init = function()
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lda #0x80 sta 0x8000
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lda #mmc1ctrl mmc1write(0x8000)
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if t.prgswitchmode ~= 'all' then switchprgrom(1) end
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switchchrrom(0) if t.chrswitchmode ~= 'all' then switchchrrom(1,1) end
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end
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end
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mappers[1] = mappers.MMC1
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--[[
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https://wiki.nesdev.com/w/index.php/MMC3
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prgroms are numbered from last (0) to first (#-1), so that adding more does not change
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prgrom0, which must contain the reset vector (main).
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Last 2 prg banks are merged into 1 16kB bank, to allow linker optimization - hence, 0 must
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@ -303,6 +542,7 @@ mappers[1] = mappers.MMC1
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Default is to map even banks to 0x8000, and odd to 0xa000.
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chrroms are all 1kB, so they can work with chr A12 inversion enabled or not.
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If t.onechrrom is set, only one big chrrom location is created instead.
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With default submapper id of 0, this defaults to revision MM3C, which generates a scanline
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interrupt at each scanline when counter is loaded with 0.
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@ -329,23 +569,31 @@ mappers.MMC3 = function(t)
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prgrom0 = location{o, o+0x3fff, rorg=0xc000, name='prgrom0'}
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section{"vectors", org=o+0x3ffa} dc.w nmi, main, irq
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end
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prgrom = prgrom0
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local chrstart = 0x8000 + bc*0x2000
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local cc = t.chrsize//0x400
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for ci=0,cc-1 do
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local o = chrstart + ci*0x400
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_ENV['chrrom'..ci] = location{o, o+0x3ff, name='chrrom'..ci}
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if t.onechrrom then
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chrrom0 = location{chrstart, chrstart + cc*0x400 - 1, name='chrrom'}
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else
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for ci=0,cc-1 do
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local o = chrstart + ci*0x400
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_ENV['chrrom'..ci] = location{o, o+0x3ff, name='chrrom'..ci}
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end
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end
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function switchprgrom(slot, bankix)
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chrrom = chrrom0
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local a12inv = false
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function seta12inv(enabled) a12inv = enabled end
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function switchprgrom(bankix, slot)
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assert(slot<2)
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lda #6+slot sta 0x8000
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slot = slot + 6
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if a12inv then slot = slot | 0x80 end
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lda #slot sta 0x8000
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assert(bankix < bc)
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bankix = bc-1-bankix -- reverse index order, since we set 0 as last
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lda #bankix sta 0x8001
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end
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local a12inv = false
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function seta12inv(enabled) a12inv = enabled end
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-- slot [0, 7], each slot is 1kB counting in order, regardless of a12inv state
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function switchchrrom(slot, bankix)
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function switchchrrom(bankix, slot)
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assert(slot<8)
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if a12inv then
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assert(slot ~= 5 and slot ~= 7)
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@ -369,7 +617,7 @@ mappers.MMC3 = function(t)
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function protectsram() lda 0x40 sta 0xa001 end
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function scanlineirq(count) ldx #1 stx 0xe000 lda #count-1 sta 0xc000 sta 0xc001 stx 0xe001 end
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mappers.init = function()
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switchprgrom(0, 2) switchprgrom(1, 3)
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switchprgrom(2, 0) switchprgrom(3, 1)
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switchchrrom(0, 0) switchchrrom(2, 2)
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switchchrrom(4, 4) switchchrrom(5, 5) switchchrrom(6, 6) switchchrrom(7, 7)
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local mirror = mappers.header.mirror
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