365 lines
14 KiB
C++
365 lines
14 KiB
C++
/* Copyright (c) 2014 Steven Flintham
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*
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* All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the 'Software'),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, provided that the above copyright notice(s) and this
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* permission notice appear in all copies of the Software and that both the
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* above copyright notice(s) and this permission notice appear in supporting
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* documentation.
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*
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* THE SOFTWARE IS PROVIDED 'AS IS'. USE ENTIRELY AT YOUR OWN RISK.
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*/
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#ifndef FUNCTIONBUILDER_H
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#define FUNCTIONBUILDER_H
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#include <boost/shared_ptr.hpp>
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#include <boost/utility.hpp>
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/TypeBuilder.h"
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#include "llvm/IR/Value.h"
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#include <map>
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#include <set>
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#include <sstream>
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#include "AddressSet.h"
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#include "const.h"
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#include "JitBool.h"
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#include "lib6502.h"
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class Function;
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struct LLVMStuff;
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class FunctionBuilder : boost::noncopyable
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{
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public:
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// Create a FunctionBuilder object which can be used to build a Function
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// representing the code starting at 'address'. The Function object built
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// will operate on the given M6502 object. The 'code_at_address' array
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// will be used at compile time and at runtime to decide if writes to
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// memory may invalidate already JITted code. The memory inside the M6502
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// object will be used when the Funtion object executes, but ct_memory
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// will be used at compile time to determine the instructions to compile;
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// see FunctionManager for more on this.
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FunctionBuilder(M6502 *mpu, const uint8_t *ct_memory,
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JitBool *code_at_address, uint16_t address);
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boost::shared_ptr<Function> build();
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// Status codes returned by the JITted function
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enum Result
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{
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// Control has transferred to the address in registers.pc. No call
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// callback should be invoked, either because the JITted function knows
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// there is no applicable call callback or because the control transfer
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// is via an instruction which does not trigger call callbacks.
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result_control_transfer_direct,
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// Control has transferred to the address in registers.pc via an
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// instruction which is eligible for call callbacks. registers.data
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// contains the opcode of the instruction which transferred
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// control. The caller should check for an applicable call
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// callback. registers.addr is *not* updated; the addr value for
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// the callback is registers.pc.
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result_control_transfer_indirect,
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// A BRK instruction has just been executed and registers.pc updated
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// to point to the BRK vector. The caller should check to see if the
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// stack pushes implicitly performed by BRK have invalidated any
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// already-JITted code and for a call callback on the BRK vector.
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// Neither registers.addr nor registers.data are updated.
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result_brk,
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// A JSR instruction has just been executed and registers.pc
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// updated to point to the destination address. One or both of the
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// following may be true: - the stack pushes implicitly performed
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// have invalidated some
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// already-JITted code
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// - a call callback is registered on the destination address It is not
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// guaranteed that either of these is the case, although in practice
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// with this implementation at least one should be true. Not all JSR
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// instructions will necessarily cause the JITted function to return
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// this value, hence the result code is result_jsr_*complex* not just
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// result_jsr. Neither registers.addr nor registers.data are updated.
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result_jsr_complex,
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// An illegal instruction has been executed and registers.pc updated to
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// point to the following opcode. registers.addr contains the address
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// of the illegal instruction and registers.data its opcode. The
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// caller should check to see if a callback is registered.
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result_illegal_instruction,
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// A memory write has been executed which changed an address marked
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// as holding code. registers.addr contains the address modified. The
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// caller should invalidate any JITted functions for this address.
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result_write_to_code,
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// A memory write has occurred which triggers a write callback. Memory
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// has not been updated. registers.addr and registers.data contain the
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// address and the data being written respectively. The caller should
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// invoke the write callback and check for writes to already-JITted
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// code.
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result_write_callback,
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// Internal bounds generated for an instruction's address range were
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// found to be invalid by self-checking code. This can only occur
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// in debug builds and then only if there is a bug in FunctionBuilder.
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result_invalid_bounds
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};
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private:
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uint16_t build_at(uint16_t ct_pc);
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uint8_t operand8(uint16_t opcode_at);
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uint16_t operand16(uint16_t opcode_at);
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llvm::Value *constant_i1(bool c);
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llvm::Value *constant_u8(uint8_t c);
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llvm::Value *constant_u16(uint16_t c);
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llvm::Value *constant_u32(uint32_t c);
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llvm::Value *constant_u64(uint64_t c);
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template <class T>
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llvm::Value *constant_ptr(T *p, const std::string &name)
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{
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llvm::Value *v = constant_u64(reinterpret_cast<unsigned long>(p));
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// The name passed in never seems to be used, but maybe this will
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// change in the future. It doesn't really do us any harm to pass
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// it in anyway.
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return builder_.CreateIntToPtr(
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v, llvm::TypeBuilder<T *, false>::get(llvm::getGlobalContext()),
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name);
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}
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llvm::Value *constant_i(int c);
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llvm::Value *constant_jb(JitBool c);
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llvm::Value *convert_i1_to_jb(llvm::Value *v);
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llvm::Value *convert_i8_to_jb(llvm::Value *v);
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llvm::Value *convert_i16_to_jb(llvm::Value *v);
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llvm::Value *jit_bool_is_true(llvm::Value *v);
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llvm::Value *jit_bool_is_false(llvm::Value *v);
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llvm::Value *convert_i1_to_i8(llvm::Value *v);
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llvm::Value *zext_i16(llvm::Value *v);
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llvm::Value *zext_i32(llvm::Value *v);
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llvm::Value *sext_i16(llvm::Value *v);
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llvm::Value *trunc_i8(llvm::Value *v);
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llvm::Value *create_u16(llvm::Value *low_byte, llvm::Value *high_byte);
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struct Register
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{
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llvm::Value *v_;
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bool modified_;
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};
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void initialise_i8_reg(Register &r, int structure_index,
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const std::string &name);
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void initialise_jb_reg(Register &r, int structure_index,
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const std::string &name);
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void ensure_address_block_created(uint16_t addr);
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void return_pc(Result result, llvm::Value *new_pc);
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void return_pc_addr(Result result, llvm::Value *new_pc, llvm::Value *addr);
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void return_pc_data(Result result, llvm::Value *new_pc, llvm::Value *data);
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void return_pc_addr_data(Result result, llvm::Value *new_pc,
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llvm::Value *addr, llvm::Value *data);
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void return_control_transfer_direct(llvm::Value *new_pc);
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void return_control_transfer_indirect(llvm::Value *new_pc, uint8_t opcode);
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void return_brk(llvm::Value *new_pc);
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void return_jsr_complex(llvm::Value *new_pc);
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void return_illegal_instruction(uint16_t new_pc, uint16_t opcode_at,
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uint8_t opcode);
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void return_write_to_code(uint16_t new_pc, llvm::Value *addr);
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void return_write_callback(uint16_t new_pc, llvm::Value *addr,
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llvm::Value *data);
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void return_invalid_bounds();
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class BoundedAddress;
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llvm::Value *register_load(const Register &r);
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void register_store(llvm::Value *v, Register &r);
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typedef llvm::Value *(FunctionBuilder::*OpFn)(llvm::Value *data);
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void register_op(OpFn op, Register &r);
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void memory_op(OpFn op, const BoundedAddress &ba, uint16_t next_opcode_at);
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llvm::Value *is_code_at(const BoundedAddress &addr);
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void adc(llvm::Value *data);
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void adc_llvm(llvm::Value *data);
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void adc_binary(llvm::Value *data);
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void adc_decimal(llvm::Value *data);
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void adc_binary_llvm(llvm::Value *data);
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void adc_decimal_llvm(llvm::Value *data);
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void And(llvm::Value *data);
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llvm::Value *asl(llvm::Value *data);
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void bit(llvm::Value *data);
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void branch(Register &flag, bool branch_if, uint16_t target);
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void cmp(llvm::Value *r, llvm::Value *data);
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void cmp_llvm(llvm::Value *r, llvm::Value *data);
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llvm::Value *dec(llvm::Value *data);
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void eor(llvm::Value *data);
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llvm::Value *inc(llvm::Value *data);
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void ld(Register &r, llvm::Value *data);
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llvm::Value *lsr(llvm::Value *data);
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void ora(llvm::Value *data);
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void pop_flags();
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llvm::Value *pop_u8();
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llvm::Value *pop_u16();
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void push_u8_raw(llvm::Value *data);
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void push_u16_raw(uint16_t u);
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void push_u8(llvm::Value *data, uint16_t next_opcode_at);
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llvm::Value *rol(llvm::Value *data);
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llvm::Value *ror(llvm::Value *data);
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void sbc(llvm::Value *data);
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void sbc_binary(llvm::Value *data);
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void sbc_decimal(llvm::Value *data);
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void sbc_overflow(llvm::Value *data,
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llvm::Value *borrow);
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void transfer(const Register &from, Register &to);
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llvm::Value *trb(llvm::Value *data);
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llvm::Value *tsb(llvm::Value *data);
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void set_nz(llvm::Value *data);
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void set_z(llvm::Value *data);
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llvm::Value *flag_byte();
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void flag_byte_bit(const Register &flag_reg, uint8_t flag_bit);
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void illegal_instruction(uint16_t &ct_pc, int bytes);
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BoundedAddress zp(uint8_t addr);
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BoundedAddress abs(uint16_t addr);
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BoundedAddress abs_index(llvm::Value *abs,
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llvm::Value *index);
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BoundedAddress zp_index(llvm::Value *zp,
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llvm::Value *r);
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BoundedAddress zp_post_index(
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llvm::Value *zp, llvm::Value *index);
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BoundedAddress zp_pre_index(
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llvm::Value *zp, llvm::Value *index);
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llvm::Value *check_predicted_rts(uint16_t subroutine_addr);
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// A special opcode used as the third argument to control_transfer_to
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// when there is no explicit opcode causing the control transfer; this
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// is just a documented way to signal that the control transfer is direct
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// and cannot trigger a call callback.
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enum {
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opcode_implicit = 0xff
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};
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void control_transfer_to(llvm::Value *target, uint8_t opcode);
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llvm::Value *memory_read(const BoundedAddress &ba);
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llvm::Value *memory_read_untrapped(const BoundedAddress &ba);
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void memory_write(const BoundedAddress &ba,
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llvm::Value *data, uint16_t next_opcode_at);
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void memory_write_untrapped(const BoundedAddress &ba,
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llvm::Value *data, uint16_t next_opcode_at);
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void memory_write_raw(const BoundedAddress &ba,
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llvm::Value *data);
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llvm::Value *call_callback(
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llvm::Value *callback, llvm::Value *addr,
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llvm::Value *data);
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llvm::Value *call_read_callback(
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llvm::Value *callback, llvm::Value *addr);
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void disassemble1(uint16_t &addr, const std::string &s);
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void disassemble2(uint16_t &addr, const std::string &prefix,
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uint8_t &operand, const std::string &suffix = "");
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void disassemble3(uint16_t &addr, const std::string &prefix,
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uint16_t &operand, const std::string &suffix = "");
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void disassemble_branch(uint16_t &addr, const std::string &s,
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uint16_t &target);
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void disassemble_hex_dump(uint16_t addr, int bytes);
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bool built_;
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M6502 *const mpu_;
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JitBool *code_at_address_;
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const uint16_t address_;
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const uint8_t *const ct_memory_;
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// callbacks_ is strictly redundant as it's available inside mpu, but
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// it's convenient.
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const M6502_Callbacks &callbacks_;
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AddressSet code_range_;
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AddressSet optimistic_writes_;
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std::stringstream disassembly_;
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int instructions_;
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const int max_instructions_;
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// This could be an AddressSet but since we "rely" on the order of
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// iteration for pending_ it seems better to be explicit; we don't need
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// any of the range-handling convenience of AddressSet here anyway.
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std::set<uint16_t> pending_;
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std::map<uint16_t, AddressSet> predicted_rts_targets_;
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llvm::LLVMContext &context_;
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llvm::Type *const native_int_type_;
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llvm::PointerType *const callback_type_;
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llvm::Type *const i1_type_;
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llvm::Type *const i8_type_;
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llvm::Type *const i16_type_;
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llvm::Type *const i32_type_;
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llvm::Type *const i64_type_;
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llvm::Type *const jit_bool_type_;
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llvm::IRBuilder<> &builder_;
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llvm::Function *llvm_function_;
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llvm::Value *registers_;
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llvm::Value *code_at_address_llvm_;
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llvm::Value *read_callbacks_;
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llvm::Value *write_callbacks_;
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llvm::Value *call_callbacks_;
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llvm::Value *memory_base_;
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llvm::Value *mpu_llvm_;
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llvm::Value *function_result_;
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// Note that address_block_ and code_generated_for_address_ aren't
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// redundant; address_block_ elements are created (for example) when
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// a branch means the corresponding address must have a BasicBlock
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// created for use as a branch target, but that doesn't mean code has
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// been generated for it yet.
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llvm::BasicBlock *address_block_[memory_size];
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bool code_generated_for_address_[memory_size];
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Register a_;
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Register x_;
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Register y_;
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Register s_;
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Register flag_n_;
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Register flag_v_;
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Register flag_d_;
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Register flag_i_;
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Register flag_z_;
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Register flag_c_;
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llvm::Value *pc_;
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llvm::Value *read_callback_result_;
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llvm::Value *p_tmp_;
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llvm::Value *l_tmp_;
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llvm::Value *s_tmp_;
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llvm::Value *t_tmp_;
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llvm::BasicBlock *epilogue_;
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};
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#endif
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