6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-13 04:30:23 +00:00
Code Issues Projects Releases Wiki Activity
release_35
llvm-6502/test/MC/ARM/fconst.s

23 lines
951 B
ArmAsm
Raw Permalink Normal View History

Add ARM fconsts/fconstd aliases for vmov.f32/vmov.f64 This commit adds the pre-UAL aliases of fconsts and fconstd for vmov.f32 and vmov.f64. They use an InstAlias rather than a MnemonicAlias to properly support the predicate operand. We need to support encoded 8-bit constants in order to implement the pre-UAL fconsts/fconstd aliases for vmov.f32/vmov.f64, so this commit also fixes parsing of encoded floating point constants used in vmov.f32/vmov.f64 instructions. Now we can support assembly code like this: fconsts s0, #0x70 which is equivalent to vmov.f32 s0, #1.0. Most of the code was already in place to support this feature. Previously the code was trying to accept encoded 8-bit float constants for the vmov.f32/vmov.f64 instructions. It looks like the support for parsing encoded floats was lost in a refactoring in commit r148556 and we did not have any tests in place to catch it. The change in this commit is to keep the parsed value as a 32-bit float instead of a 64-bit double because that is what the isFPImm() function expects to find. There is no loss of precision by using a 32-bit float here because we are still limited to an 8-bit encoded value in the end. Additionally, we explicitly reject encoded 8-bit floats for vmovf.32/64. This is the same as the current behavior, but we now do it explicitly rather than accidently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198697 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 18:19:23 +00:00
@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
@ fconstd/fconsts aliases
fconsts s4, #0x0
fconsts s4, #0x70
fconstd d3, #0x0
fconstd d3, #0x70
fconstsne s5, #0x1
fconstsgt s5, #0x20
fconstdlt d2, #0x3
fconstdge d2, #0x40
@ CHECK: vmov.f32 s4, #2.000000e+00 @ encoding: [0x00,0x2a,0xb0,0xee]
@ CHECK: vmov.f32 s4, #1.000000e+00 @ encoding: [0x00,0x2a,0xb7,0xee]
@ CHECK: vmov.f64 d3, #2.000000e+00 @ encoding: [0x00,0x3b,0xb0,0xee]
@ CHECK: vmov.f64 d3, #1.000000e+00 @ encoding: [0x00,0x3b,0xb7,0xee]
@ CHECK: vmovne.f32 s5, #2.125000e+00 @ encoding: [0x01,0x2a,0xf0,0x1e]
@ CHECK: vmovgt.f32 s5, #8.000000e+00 @ encoding: [0x00,0x2a,0xf2,0xce]
@ CHECK: vmovlt.f64 d2, #2.375000e+00 @ encoding: [0x03,0x2b,0xb0,0xbe]
@ CHECK: vmovge.f64 d2, #1.250000e-01 @ encoding: [0x00,0x2b,0xb4,0xae]
Reference in New Issue Copy Permalink