llvm-6502/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll

; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 -mattr=+mmx | grep movd | count 2

define i64 @a(i32 %a, i32 %b) nounwind readnone {
entry:
	%0 = insertelement <2 x i32> undef, i32 %a, i32 0		; <<2 x i32>> [#uses=1]
	%1 = insertelement <2 x i32> %0, i32 %b, i32 1		; <<2 x i32>> [#uses=1]
	%conv = bitcast <2 x i32> %1 to i64		; <i64> [#uses=1]
	ret i64 %conv
}
Stabilize the test by specifying an exact cpu target git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143307 91177308-0d34-0410-b5e6-96231b3b80d8 2011-10-30 08:07:50 +00:00			`; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 -mattr=+mmx \| grep movd \| count 2`
Tweak the expansion code for BIT_CONVERT to generate better code converting from an MMX vector to an i64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73024 91177308-0d34-0410-b5e6-96231b3b80d8 2009-06-07 09:41:57 +00:00
			`define i64 @a(i32 %a, i32 %b) nounwind readnone {`
			`entry:`
			`%0 = insertelement <2 x i32> undef, i32 %a, i32 0 ; <<2 x i32>> [#uses=1]`
			`%1 = insertelement <2 x i32> %0, i32 %b, i32 1 ; <<2 x i32>> [#uses=1]`
			`%conv = bitcast <2 x i32> %1 to i64 ; <i64> [#uses=1]`
			`ret i64 %conv`
			`}`