Implement methods that enable expansion of load immediate
macro instruction (li) in the assembler.
We have identified three possible expansions depending on
the size of immediate operand:
1) for 0 ≤ j ≤ 65535.
li d,j =>
ori d,$zero,j
2) for −32768 ≤ j < 0.
li d,j =>
addiu d,$zero,j
3) for any other value of j that is representable as a 32-bit integer.
li d,j =>
lui d,hi16(j)
ori d,d,lo16(j)
All of the above have been implemented in ths patch.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 04:03:53 +00:00
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# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
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# Check that the assembler can handle the documented syntax
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# for macro instructions
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#------------------------------------------------------------------------------
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# Load immediate instructions
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#------------------------------------------------------------------------------
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# CHECK: ori $5, $zero, 123 # encoding: [0x7b,0x00,0x05,0x34]
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# CHECK: addiu $6, $zero, -2345 # encoding: [0xd7,0xf6,0x06,0x24]
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# CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c]
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# CHECK: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34]
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Initial assembler implementation of Mips load address macro
This patch provides initial implementation of load address
macro instruction for Mips. We have implemented two kinds
of expansions with their variations depending on the size
of immediate operand:
1) load address with immediate value directly:
* la d,j => addiu d,$zero,j (for -32768 <= j <= 65535)
* la d,j => lui d,hi16(j)
ori d,d,lo16(j) (for any other 32 bit value of j)
2) load load address with register offset value
* la d,j(s) => addiu d,s,j (for -32768 <= j <= 65535)
* la d,j(s) => lui d,hi16(j) (for any other 32 bit value of j)
ori d,d,lo16(j)
addu d,d,s
This patch does not cover the case when the address is loaded
from the value of the label or function.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165561 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09 23:29:45 +00:00
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# CHECK: addiu $4, $zero, 20 # encoding: [0x14,0x00,0x04,0x24]
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# CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c]
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# CHECK: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34]
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# CHECK: addiu $4, $5, 20 # encoding: [0x14,0x00,0xa4,0x24]
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# CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c]
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# CHECK: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34]
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# CHECK: addu $7, $7, $8 # encoding: [0x21,0x38,0xe8,0x00]
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2013-03-22 00:05:30 +00:00
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# CHECK: lui $10, %hi(symbol) # encoding: [A,A,0x0a,0x3c]
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# CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16
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# CHECK: addu $10, $10, $4 # encoding: [0x21,0x50,0x44,0x01]
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# CHECK: lw $10, %lo(symbol)($10) # encoding: [A,A,0x4a,0x8d]
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# CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16
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# CHECK: lui $1, %hi(symbol) # encoding: [A,A,0x01,0x3c]
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# CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16
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# CHECK: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00]
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# CHECK: sw $10, %lo(symbol)($1) # encoding: [A,A,0x2a,0xac]
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# CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16
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# CHECK: lui $10, 10 # encoding: [0x0a,0x00,0x0a,0x3c]
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# CHECK: addu $10, $10, $4 # encoding: [0x21,0x50,0x44,0x01]
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# CHECK: lw $10, 123($10) # encoding: [0x7b,0x00,0x4a,0x8d]
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# CHECK: lui $1, 2 # encoding: [0x02,0x00,0x01,0x3c]
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# CHECK: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00]
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# CHECK: sw $10, 57920($1) # encoding: [0x40,0xe2,0x2a,0xac]
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Initial assembler implementation of Mips load address macro
This patch provides initial implementation of load address
macro instruction for Mips. We have implemented two kinds
of expansions with their variations depending on the size
of immediate operand:
1) load address with immediate value directly:
* la d,j => addiu d,$zero,j (for -32768 <= j <= 65535)
* la d,j => lui d,hi16(j)
ori d,d,lo16(j) (for any other 32 bit value of j)
2) load load address with register offset value
* la d,j(s) => addiu d,s,j (for -32768 <= j <= 65535)
* la d,j(s) => lui d,hi16(j) (for any other 32 bit value of j)
ori d,d,lo16(j)
addu d,d,s
This patch does not cover the case when the address is loaded
from the value of the label or function.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165561 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09 23:29:45 +00:00
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|
Implement methods that enable expansion of load immediate
macro instruction (li) in the assembler.
We have identified three possible expansions depending on
the size of immediate operand:
1) for 0 ≤ j ≤ 65535.
li d,j =>
ori d,$zero,j
2) for −32768 ≤ j < 0.
li d,j =>
addiu d,$zero,j
3) for any other value of j that is representable as a 32-bit integer.
li d,j =>
lui d,hi16(j)
ori d,d,lo16(j)
All of the above have been implemented in ths patch.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 04:03:53 +00:00
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li $5,123
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li $6,-2345
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li $7,65538
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Initial assembler implementation of Mips load address macro
This patch provides initial implementation of load address
macro instruction for Mips. We have implemented two kinds
of expansions with their variations depending on the size
of immediate operand:
1) load address with immediate value directly:
* la d,j => addiu d,$zero,j (for -32768 <= j <= 65535)
* la d,j => lui d,hi16(j)
ori d,d,lo16(j) (for any other 32 bit value of j)
2) load load address with register offset value
* la d,j(s) => addiu d,s,j (for -32768 <= j <= 65535)
* la d,j(s) => lui d,hi16(j) (for any other 32 bit value of j)
ori d,d,lo16(j)
addu d,d,s
This patch does not cover the case when the address is loaded
from the value of the label or function.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165561 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09 23:29:45 +00:00
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la $a0, 20
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la $7,65538
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la $a0, 20($a1)
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la $7,65538($8)
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2013-03-22 00:05:30 +00:00
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lw $t2, symbol($a0)
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sw $t2, symbol($t1)
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lw $t2, 655483($a0)
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sw $t2, 123456($t1)
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