llvm-6502/test/CodeGen/AArch64/arm64-vector-ext.ll

; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s

;CHECK: @func30
;CHECK: ushll.4s  v0, v0, #0
;CHECK: movi.4s v1, #0x1
;CHECK: and.16b v0, v0, v1
;CHECK: str  q0, [x0]
;CHECK: ret

%T0_30 = type <4 x i1>
%T1_30 = type <4 x i32>
define void @func30(%T0_30 %v0, %T1_30* %p1) {
  %r = zext %T0_30 %v0 to %T1_30
  store %T1_30 %r, %T1_30* %p1
  ret void
}
AArch64/ARM64: move ARM64 into AArch64's place This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8 2014-05-24 12:50:23 +00:00			`; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple \| FileCheck %s`
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8 2014-03-29 10:18:08 +00:00
			`;CHECK: @func30`
			`;CHECK: ushll.4s v0, v0, #0`
ARM64: hexify printing various immediate operands This is mostly aimed at the NEON logical operations and MOVI/MVNI (since they accept weird shifts which are more naturally understandable in hex notation). Also changes BRK/HINT etc, which is probably a neutral change, but easier than the alternative. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207634 91177308-0d34-0410-b5e6-96231b3b80d8 2014-04-30 11:19:28 +00:00			`;CHECK: movi.4s v1, #0x1`
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8 2014-03-29 10:18:08 +00:00			`;CHECK: and.16b v0, v0, v1`
			`;CHECK: str q0, [x0]`
			`;CHECK: ret`

			`%T0_30 = type <4 x i1>`
			`%T1_30 = type <4 x i32>`
			`define void @func30(%T0_30 %v0, %T1_30* %p1) {`
			`%r = zext %T0_30 %v0 to %T1_30`
			`store %T1_30 %r, %T1_30* %p1`
			`ret void`
			`}`