2014-04-03 16:01:44 +00:00
|
|
|
; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 %s -o - \
|
|
|
|
; RUN: | FileCheck %s -check-prefix=VFP2
|
|
|
|
|
|
|
|
; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - \
|
|
|
|
; RUN: | FileCheck %s -check-prefix=NEON
|
|
|
|
|
|
|
|
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
|
|
|
|
; RUN: | FileCheck %s -check-prefix=A8
|
|
|
|
|
|
|
|
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 -regalloc=basic %s -o - \
|
|
|
|
; RUN: | FileCheck %s -check-prefix=A8
|
|
|
|
|
|
|
|
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
|
|
|
|
; RUN: | FileCheck %s -check-prefix=A8U
|
|
|
|
|
|
|
|
; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
|
|
|
|
; RUN: | FileCheck %s -check-prefix=A8U
|
2009-08-04 17:53:06 +00:00
|
|
|
|
2010-11-12 20:32:20 +00:00
|
|
|
define float @t1(float %acc, float %a, float %b) nounwind {
|
2009-08-04 17:53:06 +00:00
|
|
|
entry:
|
2013-07-14 06:24:09 +00:00
|
|
|
; VFP2-LABEL: t1:
|
2010-11-12 20:32:20 +00:00
|
|
|
; VFP2: vnmla.f32
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; NEON-LABEL: t1:
|
2010-11-12 20:32:20 +00:00
|
|
|
; NEON: vnmla.f32
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; A8U-LABEL: t1:
|
2013-03-21 18:47:47 +00:00
|
|
|
; A8U: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
|
|
|
|
; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}}
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; A8-LABEL: t1:
|
2011-03-31 22:14:03 +00:00
|
|
|
; A8: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
|
2013-03-21 18:47:47 +00:00
|
|
|
; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
|
2009-08-04 17:53:06 +00:00
|
|
|
%0 = fmul float %a, %b
|
2009-08-10 22:31:04 +00:00
|
|
|
%1 = fsub float -0.0, %0
|
2009-08-04 17:53:06 +00:00
|
|
|
%2 = fsub float %1, %acc
|
|
|
|
ret float %2
|
|
|
|
}
|
|
|
|
|
2010-11-12 20:32:20 +00:00
|
|
|
define float @t2(float %acc, float %a, float %b) nounwind {
|
2009-08-04 18:11:59 +00:00
|
|
|
entry:
|
2013-07-14 06:24:09 +00:00
|
|
|
; VFP2-LABEL: t2:
|
2010-11-12 20:32:20 +00:00
|
|
|
; VFP2: vnmla.f32
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; NEON-LABEL: t2:
|
2010-11-12 20:32:20 +00:00
|
|
|
; NEON: vnmla.f32
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; A8U-LABEL: t2:
|
2013-03-21 18:47:47 +00:00
|
|
|
; A8U: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
|
|
|
|
; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}}
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; A8-LABEL: t2:
|
2011-05-03 19:09:32 +00:00
|
|
|
; A8: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
|
2013-03-21 18:47:47 +00:00
|
|
|
; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
|
2009-08-04 18:11:59 +00:00
|
|
|
%0 = fmul float %a, %b
|
|
|
|
%1 = fmul float -1.0, %0
|
|
|
|
%2 = fsub float %1, %acc
|
|
|
|
ret float %2
|
|
|
|
}
|
|
|
|
|
2010-11-12 20:32:20 +00:00
|
|
|
define double @t3(double %acc, double %a, double %b) nounwind {
|
|
|
|
entry:
|
2013-07-14 06:24:09 +00:00
|
|
|
; VFP2-LABEL: t3:
|
2010-11-12 20:32:20 +00:00
|
|
|
; VFP2: vnmla.f64
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; NEON-LABEL: t3:
|
2010-11-12 20:32:20 +00:00
|
|
|
; NEON: vnmla.f64
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; A8U-LABEL: t3:
|
2013-03-21 18:47:47 +00:00
|
|
|
; A8U: vnmul.f64 d
|
|
|
|
; A8U: vsub.f64 d
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; A8-LABEL: t3:
|
2013-01-19 00:03:32 +00:00
|
|
|
; A8: vnmul.f64 d
|
|
|
|
; A8: vsub.f64 d
|
2010-11-12 20:32:20 +00:00
|
|
|
%0 = fmul double %a, %b
|
|
|
|
%1 = fsub double -0.0, %0
|
|
|
|
%2 = fsub double %1, %acc
|
|
|
|
ret double %2
|
|
|
|
}
|
|
|
|
|
|
|
|
define double @t4(double %acc, double %a, double %b) nounwind {
|
|
|
|
entry:
|
2013-07-14 06:24:09 +00:00
|
|
|
; VFP2-LABEL: t4:
|
2010-11-12 20:32:20 +00:00
|
|
|
; VFP2: vnmla.f64
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; NEON-LABEL: t4:
|
2010-11-12 20:32:20 +00:00
|
|
|
; NEON: vnmla.f64
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; A8U-LABEL: t4:
|
2013-03-21 18:47:47 +00:00
|
|
|
; A8U: vnmul.f64 d
|
|
|
|
; A8U: vsub.f64 d
|
|
|
|
|
2013-07-14 06:24:09 +00:00
|
|
|
; A8-LABEL: t4:
|
2013-01-19 00:03:32 +00:00
|
|
|
; A8: vnmul.f64 d
|
|
|
|
; A8: vsub.f64 d
|
2010-11-12 20:32:20 +00:00
|
|
|
%0 = fmul double %a, %b
|
|
|
|
%1 = fmul double -1.0, %0
|
|
|
|
%2 = fsub double %1, %acc
|
|
|
|
ret double %2
|
|
|
|
}
|