2013-11-19 12:20:17 +00:00
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=1
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=2
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=3
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=4
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Checkin in of first of several patches to finish implementation of
mips16/mips32 floating point interoperability.
This patch fixes returns from mips16 functions so that if the function
was in fact called by a mips32 hard float routine, then values
that would have been returned in floating point registers are so returned.
Mips16 mode has no floating point instructions so there is no way to
load values into floating point registers.
This is needed when returning float, double, single complex, double complex
in the Mips ABI.
Helper functions in libc for mips16 are available to do this.
For efficiency purposes, these helper functions have a different calling
convention from normal Mips calls.
Registers v0,v1,a0,a1 are used to pass parameters instead of
a0,a1,a2,a3.
This is because v0,v1,a0,a1 are the natural registers used to return
floating point values in soft float. These values can then be moved
to the appropriate floating point registers with no extra cost.
The only register that is modified is ra in this call.
The helper functions make sure that the return values are in the floating
point registers that they would be in if soft float was not in effect
(which it is for mips16, though the soft float is implemented using a mips32
library that uses hard float).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181641 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 22:25:39 +00:00
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@x = global float 0x41F487E980000000, align 4
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@dx = global double 0x41CDCC8BC4800000, align 8
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@cx = global { float, float } { float 1.000000e+00, float 9.900000e+01 }, align 4
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@dcx = global { double, double } { double 0x42CE5E14A412B480, double 0x423AA4C580DB0000 }, align 8
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define float @foox() {
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entry:
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%0 = load float* @x, align 4
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ret float %0
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; 1: .ent foox
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; 1: lw $2, %lo(x)(${{[0-9]+}})
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; 1: jal __mips16_ret_sf
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}
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define double @foodx() {
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entry:
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%0 = load double* @dx, align 8
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ret double %0
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; 1: .ent foodx
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; 1: lw $2, %lo(dx)(${{[0-9]+}})
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; 1: jal __mips16_ret_df
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; 2: .ent foodx
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; 2: lw $3, 4(${{[0-9]+}})
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; 2: jal __mips16_ret_df
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}
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define { float, float } @foocx() {
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entry:
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%retval = alloca { float, float }, align 4
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%cx.real = load float* getelementptr inbounds ({ float, float }* @cx, i32 0, i32 0)
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%cx.imag = load float* getelementptr inbounds ({ float, float }* @cx, i32 0, i32 1)
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%real = getelementptr inbounds { float, float }* %retval, i32 0, i32 0
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%imag = getelementptr inbounds { float, float }* %retval, i32 0, i32 1
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store float %cx.real, float* %real
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store float %cx.imag, float* %imag
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%0 = load { float, float }* %retval
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ret { float, float } %0
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; 1: .ent foocx
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; 1: lw $2, %lo(cx)(${{[0-9]+}})
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; 1: jal __mips16_ret_sc
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; 2: .ent foocx
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; 2: lw $3, 4(${{[0-9]+}})
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; 2: jal __mips16_ret_sc
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}
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define { double, double } @foodcx() {
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entry:
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%retval = alloca { double, double }, align 8
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%dcx.real = load double* getelementptr inbounds ({ double, double }* @dcx, i32 0, i32 0)
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%dcx.imag = load double* getelementptr inbounds ({ double, double }* @dcx, i32 0, i32 1)
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%real = getelementptr inbounds { double, double }* %retval, i32 0, i32 0
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%imag = getelementptr inbounds { double, double }* %retval, i32 0, i32 1
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store double %dcx.real, double* %real
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store double %dcx.imag, double* %imag
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%0 = load { double, double }* %retval
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ret { double, double } %0
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; 1: .ent foodcx
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2013-07-25 18:35:14 +00:00
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; 1: lw ${{[0-9]}}, %lo(dcx)(${{[0-9]+}})
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Checkin in of first of several patches to finish implementation of
mips16/mips32 floating point interoperability.
This patch fixes returns from mips16 functions so that if the function
was in fact called by a mips32 hard float routine, then values
that would have been returned in floating point registers are so returned.
Mips16 mode has no floating point instructions so there is no way to
load values into floating point registers.
This is needed when returning float, double, single complex, double complex
in the Mips ABI.
Helper functions in libc for mips16 are available to do this.
For efficiency purposes, these helper functions have a different calling
convention from normal Mips calls.
Registers v0,v1,a0,a1 are used to pass parameters instead of
a0,a1,a2,a3.
This is because v0,v1,a0,a1 are the natural registers used to return
floating point values in soft float. These values can then be moved
to the appropriate floating point registers with no extra cost.
The only register that is modified is ra in this call.
The helper functions make sure that the return values are in the floating
point registers that they would be in if soft float was not in effect
(which it is for mips16, though the soft float is implemented using a mips32
library that uses hard float).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181641 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 22:25:39 +00:00
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; 1: jal __mips16_ret_dc
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; 2: .ent foodcx
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2013-07-25 18:35:14 +00:00
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; 2: lw ${{[0-9]}}, 4(${{[0-9]+}})
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Checkin in of first of several patches to finish implementation of
mips16/mips32 floating point interoperability.
This patch fixes returns from mips16 functions so that if the function
was in fact called by a mips32 hard float routine, then values
that would have been returned in floating point registers are so returned.
Mips16 mode has no floating point instructions so there is no way to
load values into floating point registers.
This is needed when returning float, double, single complex, double complex
in the Mips ABI.
Helper functions in libc for mips16 are available to do this.
For efficiency purposes, these helper functions have a different calling
convention from normal Mips calls.
Registers v0,v1,a0,a1 are used to pass parameters instead of
a0,a1,a2,a3.
This is because v0,v1,a0,a1 are the natural registers used to return
floating point values in soft float. These values can then be moved
to the appropriate floating point registers with no extra cost.
The only register that is modified is ra in this call.
The helper functions make sure that the return values are in the floating
point registers that they would be in if soft float was not in effect
(which it is for mips16, though the soft float is implemented using a mips32
library that uses hard float).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181641 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 22:25:39 +00:00
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; 2: jal __mips16_ret_dc
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; 3: .ent foodcx
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; 3: lw $4, 8(${{[0-9]+}})
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; 3: jal __mips16_ret_dc
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; 4: .ent foodcx
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; 4: lw $5, 12(${{[0-9]+}})
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; 4: jal __mips16_ret_dc
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}
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