2013-09-16 23:29:03 +00:00
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; RUN: llc -filetype=asm < %s | FileCheck %s
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; CHECK: @DEBUG_VALUE: h:x <- [R{{.*}}+{{.*}}]
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; generated from:
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2013-09-17 00:15:36 +00:00
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; clang -cc1 -triple thumbv7 -S -O1 arm.cpp -g
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2013-09-16 23:29:03 +00:00
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;
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; int f();
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; void g(float);
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; void h(int, int, int, int, float x) {
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; g(x = f());
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; }
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;
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:32-n32-S64"
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target triple = "thumbv7-apple-ios"
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; Function Attrs: nounwind
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define arm_aapcscc void @_Z1hiiiif(i32, i32, i32, i32, float %x) #0 {
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entry:
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Move the complex address expression out of DIVariable and into an extra
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics.
Previously, DIVariable was a variable-length field that has an optional
reference to a Metadata array consisting of a variable number of
complex address expressions. In the case of OpPiece expressions this is
wasting a lot of storage in IR, because when an aggregate type is, e.g.,
SROA'd into all of its n individual members, the IR will contain n copies
of the DIVariable, all alike, only differing in the complex address
reference at the end.
By making the complex address into an extra argument of the
dbg.value/dbg.declare intrinsics, all of the pieces can reference the
same variable and the complex address expressions can be uniqued across
the CU, too.
Down the road, this will allow us to move other flags, such as
"indirection" out of the DIVariable, too.
The new intrinsics look like this:
declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr)
declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr)
This patch adds a new LLVM-local tag to DIExpressions, so we can detect
and pretty-print DIExpression metadata nodes.
What this patch doesn't do:
This patch does not touch the "Indirect" field in DIVariable; but moving
that into the expression would be a natural next step.
http://reviews.llvm.org/D4919
rdar://problem/17994491
Thanks to dblaikie and dexonsmith for reviewing this patch!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218778 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 17:55:39 +00:00
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tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !12, metadata !{}), !dbg !18
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tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !13, metadata !{}), !dbg !18
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tail call void @llvm.dbg.value(metadata !{i32 %2}, i64 0, metadata !14, metadata !{}), !dbg !18
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tail call void @llvm.dbg.value(metadata !{i32 %3}, i64 0, metadata !15, metadata !{}), !dbg !18
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tail call void @llvm.dbg.value(metadata !{float %x}, i64 0, metadata !16, metadata !{}), !dbg !18
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2013-09-16 23:29:03 +00:00
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%call = tail call arm_aapcscc i32 @_Z1fv() #3, !dbg !19
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%conv = sitofp i32 %call to float, !dbg !19
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Move the complex address expression out of DIVariable and into an extra
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics.
Previously, DIVariable was a variable-length field that has an optional
reference to a Metadata array consisting of a variable number of
complex address expressions. In the case of OpPiece expressions this is
wasting a lot of storage in IR, because when an aggregate type is, e.g.,
SROA'd into all of its n individual members, the IR will contain n copies
of the DIVariable, all alike, only differing in the complex address
reference at the end.
By making the complex address into an extra argument of the
dbg.value/dbg.declare intrinsics, all of the pieces can reference the
same variable and the complex address expressions can be uniqued across
the CU, too.
Down the road, this will allow us to move other flags, such as
"indirection" out of the DIVariable, too.
The new intrinsics look like this:
declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr)
declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr)
This patch adds a new LLVM-local tag to DIExpressions, so we can detect
and pretty-print DIExpression metadata nodes.
What this patch doesn't do:
This patch does not touch the "Indirect" field in DIVariable; but moving
that into the expression would be a natural next step.
http://reviews.llvm.org/D4919
rdar://problem/17994491
Thanks to dblaikie and dexonsmith for reviewing this patch!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218778 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 17:55:39 +00:00
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tail call void @llvm.dbg.value(metadata !{float %conv}, i64 0, metadata !16, metadata !{}), !dbg !19
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2013-09-16 23:29:03 +00:00
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tail call arm_aapcscc void @_Z1gf(float %conv) #3, !dbg !19
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ret void, !dbg !20
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}
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declare arm_aapcscc void @_Z1gf(float)
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declare arm_aapcscc i32 @_Z1fv()
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; Function Attrs: nounwind readnone
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Move the complex address expression out of DIVariable and into an extra
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics.
Previously, DIVariable was a variable-length field that has an optional
reference to a Metadata array consisting of a variable number of
complex address expressions. In the case of OpPiece expressions this is
wasting a lot of storage in IR, because when an aggregate type is, e.g.,
SROA'd into all of its n individual members, the IR will contain n copies
of the DIVariable, all alike, only differing in the complex address
reference at the end.
By making the complex address into an extra argument of the
dbg.value/dbg.declare intrinsics, all of the pieces can reference the
same variable and the complex address expressions can be uniqued across
the CU, too.
Down the road, this will allow us to move other flags, such as
"indirection" out of the DIVariable, too.
The new intrinsics look like this:
declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr)
declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr)
This patch adds a new LLVM-local tag to DIExpressions, so we can detect
and pretty-print DIExpression metadata nodes.
What this patch doesn't do:
This patch does not touch the "Indirect" field in DIVariable; but moving
that into the expression would be a natural next step.
http://reviews.llvm.org/D4919
rdar://problem/17994491
Thanks to dblaikie and dexonsmith for reviewing this patch!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218778 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 17:55:39 +00:00
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declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
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2013-09-16 23:29:03 +00:00
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attributes #0 = { nounwind }
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attributes #2 = { nounwind readnone }
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attributes #3 = { nounwind }
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!llvm.dbg.cu = !{!0}
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2013-11-22 21:49:45 +00:00
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!llvm.module.flags = !{!17, !21}
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2013-09-16 23:29:03 +00:00
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2014-08-06 00:21:25 +00:00
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!0 = metadata !{i32 786449, metadata !1, i32 4, metadata !"clang version 3.4 (trunk 190804) (llvm/trunk 190797)", i1 true, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2, metadata !"", i32 1} ; [ DW_TAG_compile_unit ] [//<unknown>] [DW_LANG_C_plus_plus]
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2013-09-16 23:29:03 +00:00
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!1 = metadata !{metadata !"/<unknown>", metadata !""}
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2014-02-04 01:23:52 +00:00
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!2 = metadata !{}
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2013-09-16 23:29:03 +00:00
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!3 = metadata !{metadata !4}
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!4 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"h", metadata !"h", metadata !"_Z1hiiiif", i32 3, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, void (i32, i32, i32, i32, float)* @_Z1hiiiif, null, null, metadata !11, i32 3} ; [ DW_TAG_subprogram ] [line 3] [def] [h]
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!5 = metadata !{metadata !"/arm.cpp", metadata !""}
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!6 = metadata !{i32 786473, metadata !5} ; [ DW_TAG_file_type ] [//arm.cpp]
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!7 = metadata !{i32 786453, i32 0, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
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!8 = metadata !{null, metadata !9, metadata !9, metadata !9, metadata !9, metadata !10}
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!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
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!10 = metadata !{i32 786468, null, null, metadata !"float", i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] [float] [line 0, size 32, align 32, offset 0, enc DW_ATE_float]
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!11 = metadata !{metadata !12, metadata !13, metadata !14, metadata !15, metadata !16}
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!12 = metadata !{i32 786689, metadata !4, metadata !"", metadata !6, i32 16777219, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [line 3]
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!13 = metadata !{i32 786689, metadata !4, metadata !"", metadata !6, i32 33554435, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [line 3]
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!14 = metadata !{i32 786689, metadata !4, metadata !"", metadata !6, i32 50331651, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [line 3]
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!15 = metadata !{i32 786689, metadata !4, metadata !"", metadata !6, i32 67108867, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [line 3]
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!16 = metadata !{i32 786689, metadata !4, metadata !"x", metadata !6, i32 83886083, metadata !10, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [x] [line 3]
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!17 = metadata !{i32 2, metadata !"Dwarf Version", i32 4}
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!18 = metadata !{i32 3, i32 0, metadata !4, null}
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!19 = metadata !{i32 4, i32 0, metadata !4, null}
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!20 = metadata !{i32 5, i32 0, metadata !4, null}
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2013-11-22 21:49:45 +00:00
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!21 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
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