6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-14 11:32:34 +00:00
Code Issues Projects Releases Wiki Activity
0ab901ad76
llvm-6502/test/CodeGen/SystemZ/memchr-02.ll

58 lines
1.7 KiB
LLVM
Raw Normal View History

[SystemZ] Use SRST to optimize memchr SystemZTargetLowering::emitStringWrapper() previously loaded the character into R0 before the loop and made R0 live on entry. I'd forgotten that allocatable registers weren't allowed to be live across blocks at this stage, and it confused LiveVariables enough to cause a miscompilation of f3 in memchr-02.ll. This patch instead loads R0 in the loop and leaves LICM to hoist it after RA. This is actually what I'd tried originally, but I went for the manual optimisation after noticing that R0 often wasn't being hoisted. This bug forced me to go back and look at why, now fixed as r188774. We should also try to optimize null checks so that they test the CC result of the SRST directly. The select between null and the SRST GPR result could then usually be deleted as dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188779 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 09:38:48 +00:00
; Test memchr using SRST, with the correct prototype.
;
Use the integrated assembler as default on SystemZ This was already done in clang, this commit now uses the integrated assembler as default when using LLVM tools directly. A number of test cases deliberately using an invalid instruction in inline asm now have to use -no-integrated-as. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225820 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-13 19:45:16 +00:00
; RUN: llc < %s -mtriple=s390x-linux-gnu -no-integrated-as | FileCheck %s
[SystemZ] Use SRST to optimize memchr SystemZTargetLowering::emitStringWrapper() previously loaded the character into R0 before the loop and made R0 live on entry. I'd forgotten that allocatable registers weren't allowed to be live across blocks at this stage, and it confused LiveVariables enough to cause a miscompilation of f3 in memchr-02.ll. This patch instead loads R0 in the loop and leaves LICM to hoist it after RA. This is actually what I'd tried originally, but I went for the manual optimisation after noticing that R0 often wasn't being hoisted. This bug forced me to go back and look at why, now fixed as r188774. We should also try to optimize null checks so that they test the CC result of the SRST directly. The select between null and the SRST GPR result could then usually be deleted as dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188779 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 09:38:48 +00:00
declare i8 *@memchr(i8 *%src, i32 %char, i64 %len)
; Test a simple forwarded call.
define i8 *@f1(i64 %len, i8 *%src, i32 %char) {
; CHECK-LABEL: f1:
; CHECK-DAG: agr %r2, %r3
; CHECK-DAG: llcr %r0, %r4
; CHECK: [[LABEL:\.[^:]*]]:
; CHECK: srst %r2, %r3
; CHECK-NEXT: jo [[LABEL]]
; CHECK: jl {{\.L.*}}
; CHECK: lghi %r2, 0
; CHECK: br %r14
%res = call i8 *@memchr(i8 *%src, i32 %char, i64 %len)
ret i8 *%res
}
; Test a doubled call with no use of %r0 in between. There should be a
; single load of %r0.
define i8 *@f2(i8 *%src, i8 *%charptr, i64 %len) {
; CHECK-LABEL: f2:
; CHECK: llc %r0, 0(%r3)
; CHECK-NOT: %r0
; CHECK: srst [[RES1:%r[1-5]]], %r2
; CHECK-NOT: %r0
; CHECK: srst %r2, [[RES1]]
; CHECK: br %r14
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00
%char = load volatile i8 , i8 *%charptr
[SystemZ] Use SRST to optimize memchr SystemZTargetLowering::emitStringWrapper() previously loaded the character into R0 before the loop and made R0 live on entry. I'd forgotten that allocatable registers weren't allowed to be live across blocks at this stage, and it confused LiveVariables enough to cause a miscompilation of f3 in memchr-02.ll. This patch instead loads R0 in the loop and leaves LICM to hoist it after RA. This is actually what I'd tried originally, but I went for the manual optimisation after noticing that R0 often wasn't being hoisted. This bug forced me to go back and look at why, now fixed as r188774. We should also try to optimize null checks so that they test the CC result of the SRST directly. The select between null and the SRST GPR result could then usually be deleted as dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188779 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 09:38:48 +00:00
%charext = zext i8 %char to i32
%res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len)
%res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len)
ret i8 *%res2
}
; Test a doubled call with a use of %r0 in between. %r0 must be loaded
; for each loop.
define i8 *@f3(i8 *%src, i8 *%charptr, i64 %len) {
; CHECK-LABEL: f3:
; CHECK: llc [[CHAR:%r[1-5]]], 0(%r3)
; CHECK: lr %r0, [[CHAR]]
; CHECK: srst [[RES1:%r[1-5]]], %r2
; CHECK: lhi %r0, 0
; CHECK: blah %r0
; CHECK: lr %r0, [[CHAR]]
; CHECK: srst %r2, [[RES1]]
; CHECK: br %r14
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00
%char = load volatile i8 , i8 *%charptr
[SystemZ] Use SRST to optimize memchr SystemZTargetLowering::emitStringWrapper() previously loaded the character into R0 before the loop and made R0 live on entry. I'd forgotten that allocatable registers weren't allowed to be live across blocks at this stage, and it confused LiveVariables enough to cause a miscompilation of f3 in memchr-02.ll. This patch instead loads R0 in the loop and leaves LICM to hoist it after RA. This is actually what I'd tried originally, but I went for the manual optimisation after noticing that R0 often wasn't being hoisted. This bug forced me to go back and look at why, now fixed as r188774. We should also try to optimize null checks so that they test the CC result of the SRST directly. The select between null and the SRST GPR result could then usually be deleted as dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188779 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 09:38:48 +00:00
%charext = zext i8 %char to i32
%res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len)
call void asm sideeffect "blah $0", "{r0}" (i32 0)
%res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len)
ret i8 *%res2
}
Reference in New Issue Copy Permalink