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llvm-6502/test/CodeGen/PowerPC/fneg.ll

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Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 00:09:15 +00:00
; RUN: llc < %s -march=ppc32 | not grep fneg
new testcase git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37053 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-14 22:04:16 +00:00
define double @test1(double %a, double %b, double %c, double %d) {
entry:
Split the Add, Sub, and Mul instruction opcodes into separate integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
%tmp2 = fsub double -0.000000e+00, %c ; <double> [#uses=1]
%tmp4 = fmul double %tmp2, %d ; <double> [#uses=1]
%tmp7 = fmul double %a, %b ; <double> [#uses=1]
%tmp9 = fsub double %tmp7, %tmp4 ; <double> [#uses=1]
new testcase git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37053 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-14 22:04:16 +00:00
ret double %tmp9
}
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