llvm-6502/test/CodeGen/X86/pre-split4.ll

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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 2
define i32 @main(i32 %argc, i8** %argv) nounwind {
entry:
br label %bb
bb: ; preds = %bb, %entry
%k.0.reg2mem.0 = phi double [ 1.000000e+00, %entry ], [ %6, %bb ] ; <double> [#uses=2]
%Flint.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %5, %bb ] ; <double> [#uses=1]
%twoThrd.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=1]
%0 = tail call double @llvm.pow.f64(double 0x3FE5555555555555, double 0.000000e+00) ; <double> [#uses=1]
%1 = fadd double %0, %twoThrd.0.reg2mem.0 ; <double> [#uses=1]
%2 = tail call double @sin(double %k.0.reg2mem.0) nounwind readonly ; <double> [#uses=1]
%3 = fmul double 0.000000e+00, %2 ; <double> [#uses=1]
%4 = fdiv double 1.000000e+00, %3 ; <double> [#uses=1]
store double %Flint.0.reg2mem.0, double* null
store double %twoThrd.0.reg2mem.0, double* null
%5 = fadd double %4, %Flint.0.reg2mem.0 ; <double> [#uses=1]
%6 = fadd double %k.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=1]
br label %bb
}
declare double @llvm.pow.f64(double, double) nounwind readonly
declare double @sin(double) nounwind readonly