llvm-6502/test/CodeGen/Blackfin/frameindex.ll

; RUN: llc < %s -march=bfin -verify-machineinstrs

declare i32 @SIM(i8*, i8*, i32, i32, i32, [256 x i32]*, i32, i32, i32)

define void @foo() {
bb0:
	%V = alloca [256 x i32], i32 256		; <[256 x i32]*> [#uses=1]
	%0 = call i32 @SIM(i8* null, i8* null, i32 0, i32 0, i32 0, [256 x i32]* %V, i32 0, i32 0, i32 2)		; <i32> [#uses=0]
	ret void
}
Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8 2009-09-09 00:09:15 +00:00			`; RUN: llc < %s -march=bfin -verify-machineinstrs`
Analog Devices Blackfin back-end. Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8 2009-08-02 17:32:10 +00:00
			`declare i32 @SIM(i8, i8, i32, i32, i32, [256 x i32]*, i32, i32, i32)`

			`define void @foo() {`
			`bb0:`
			`%V = alloca [256 x i32], i32 256 ; <[256 x i32]*> [#uses=1]`
			`%0 = call i32 @SIM(i8* null, i8* null, i32 0, i32 0, i32 0, [256 x i32]* %V, i32 0, i32 0, i32 2) ; <i32> [#uses=0]`
			`ret void`
			`}`