2008-09-26 04:40:32 +00:00
|
|
|
set(LLVM_TARGET_DEFINITIONS PPC.td)
|
|
|
|
|
|
|
|
tablegen(PPCGenInstrNames.inc -gen-instr-enums)
|
|
|
|
tablegen(PPCGenRegisterNames.inc -gen-register-enums)
|
|
|
|
tablegen(PPCGenAsmWriter.inc -gen-asm-writer)
|
|
|
|
tablegen(PPCGenCodeEmitter.inc -gen-emitter)
|
Implement a basic MCCodeEmitter for PPC. This doesn't handle
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00]
stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00]
cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00]
beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 04:16:32 +00:00
|
|
|
tablegen(PPCGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
|
2008-09-26 04:40:32 +00:00
|
|
|
tablegen(PPCGenRegisterInfo.h.inc -gen-register-desc-header)
|
|
|
|
tablegen(PPCGenRegisterInfo.inc -gen-register-desc)
|
|
|
|
tablegen(PPCGenInstrInfo.inc -gen-instr-desc)
|
|
|
|
tablegen(PPCGenDAGISel.inc -gen-dag-isel)
|
|
|
|
tablegen(PPCGenCallingConv.inc -gen-callingconv)
|
|
|
|
tablegen(PPCGenSubtarget.inc -gen-subtarget)
|
|
|
|
|
|
|
|
add_llvm_target(PowerPCCodeGen
|
2010-11-15 08:49:58 +00:00
|
|
|
PPCAsmBackend.cpp
|
2010-11-14 18:33:33 +00:00
|
|
|
PPCAsmPrinter.cpp
|
2008-09-26 04:40:32 +00:00
|
|
|
PPCBranchSelector.cpp
|
|
|
|
PPCCodeEmitter.cpp
|
|
|
|
PPCHazardRecognizers.cpp
|
|
|
|
PPCInstrInfo.cpp
|
|
|
|
PPCISelDAGToDAG.cpp
|
|
|
|
PPCISelLowering.cpp
|
2010-11-15 00:48:12 +00:00
|
|
|
PPCFrameInfo.cpp
|
2008-09-26 04:40:32 +00:00
|
|
|
PPCJITInfo.cpp
|
2009-08-31 13:05:24 +00:00
|
|
|
PPCMCAsmInfo.cpp
|
Implement a basic MCCodeEmitter for PPC. This doesn't handle
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00]
stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00]
cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00]
beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 04:16:32 +00:00
|
|
|
PPCMCCodeEmitter.cpp
|
2010-11-14 19:53:02 +00:00
|
|
|
PPCMCInstLower.cpp
|
2008-09-26 04:40:32 +00:00
|
|
|
PPCPredicates.cpp
|
|
|
|
PPCRegisterInfo.cpp
|
|
|
|
PPCSubtarget.cpp
|
|
|
|
PPCTargetMachine.cpp
|
2010-04-16 23:04:22 +00:00
|
|
|
PPCSelectionDAGInfo.cpp
|
2008-09-26 04:40:32 +00:00
|
|
|
)
|