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https://github.com/c64scene-ar/llvm-6502.git
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83 lines
4.1 KiB
ArmAsm
83 lines
4.1 KiB
ArmAsm
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// RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s
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// Check that the assembler can handle the documented syntax for AArch64
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//------------------------------------------------------------------------------
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// Vector Integer Saturating Add (Signed)
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//------------------------------------------------------------------------------
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sqadd v0.8b, v1.8b, v2.8b
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sqadd v0.16b, v1.16b, v2.16b
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sqadd v0.4h, v1.4h, v2.4h
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sqadd v0.8h, v1.8h, v2.8h
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sqadd v0.2s, v1.2s, v2.2s
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sqadd v0.4s, v1.4s, v2.4s
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sqadd v0.2d, v1.2d, v2.2d
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// CHECK: sqadd v0.8b, v1.8b, v2.8b // encoding: [0x20,0x0c,0x22,0x0e]
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// CHECK: sqadd v0.16b, v1.16b, v2.16b // encoding: [0x20,0x0c,0x22,0x4e]
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// CHECK: sqadd v0.4h, v1.4h, v2.4h // encoding: [0x20,0x0c,0x62,0x0e]
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// CHECK: sqadd v0.8h, v1.8h, v2.8h // encoding: [0x20,0x0c,0x62,0x4e]
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// CHECK: sqadd v0.2s, v1.2s, v2.2s // encoding: [0x20,0x0c,0xa2,0x0e]
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// CHECK: sqadd v0.4s, v1.4s, v2.4s // encoding: [0x20,0x0c,0xa2,0x4e]
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// CHECK: sqadd v0.2d, v1.2d, v2.2d // encoding: [0x20,0x0c,0xe2,0x4e]
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//------------------------------------------------------------------------------
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// Vector Integer Saturating Add (Unsigned)
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//------------------------------------------------------------------------------
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uqadd v0.8b, v1.8b, v2.8b
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uqadd v0.16b, v1.16b, v2.16b
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uqadd v0.4h, v1.4h, v2.4h
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uqadd v0.8h, v1.8h, v2.8h
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uqadd v0.2s, v1.2s, v2.2s
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uqadd v0.4s, v1.4s, v2.4s
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uqadd v0.2d, v1.2d, v2.2d
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// CHECK: uqadd v0.8b, v1.8b, v2.8b // encoding: [0x20,0x0c,0x22,0x2e]
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// CHECK: uqadd v0.16b, v1.16b, v2.16b // encoding: [0x20,0x0c,0x22,0x6e]
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// CHECK: uqadd v0.4h, v1.4h, v2.4h // encoding: [0x20,0x0c,0x62,0x2e]
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// CHECK: uqadd v0.8h, v1.8h, v2.8h // encoding: [0x20,0x0c,0x62,0x6e]
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// CHECK: uqadd v0.2s, v1.2s, v2.2s // encoding: [0x20,0x0c,0xa2,0x2e]
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// CHECK: uqadd v0.4s, v1.4s, v2.4s // encoding: [0x20,0x0c,0xa2,0x6e]
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// CHECK: uqadd v0.2d, v1.2d, v2.2d // encoding: [0x20,0x0c,0xe2,0x6e]
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//------------------------------------------------------------------------------
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// Vector Integer Saturating Sub (Signed)
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//------------------------------------------------------------------------------
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sqsub v0.8b, v1.8b, v2.8b
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sqsub v0.16b, v1.16b, v2.16b
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sqsub v0.4h, v1.4h, v2.4h
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sqsub v0.8h, v1.8h, v2.8h
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sqsub v0.2s, v1.2s, v2.2s
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sqsub v0.4s, v1.4s, v2.4s
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sqsub v0.2d, v1.2d, v2.2d
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// CHECK: sqsub v0.8b, v1.8b, v2.8b // encoding: [0x20,0x2c,0x22,0x0e]
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// CHECK: sqsub v0.16b, v1.16b, v2.16b // encoding: [0x20,0x2c,0x22,0x4e]
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// CHECK: sqsub v0.4h, v1.4h, v2.4h // encoding: [0x20,0x2c,0x62,0x0e]
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// CHECK: sqsub v0.8h, v1.8h, v2.8h // encoding: [0x20,0x2c,0x62,0x4e]
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// CHECK: sqsub v0.2s, v1.2s, v2.2s // encoding: [0x20,0x2c,0xa2,0x0e]
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// CHECK: sqsub v0.4s, v1.4s, v2.4s // encoding: [0x20,0x2c,0xa2,0x4e]
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// CHECK: sqsub v0.2d, v1.2d, v2.2d // encoding: [0x20,0x2c,0xe2,0x4e]
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//------------------------------------------------------------------------------
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// Vector Integer Saturating Sub (Unsigned)
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//------------------------------------------------------------------------------
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uqsub v0.8b, v1.8b, v2.8b
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uqsub v0.16b, v1.16b, v2.16b
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uqsub v0.4h, v1.4h, v2.4h
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uqsub v0.8h, v1.8h, v2.8h
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uqsub v0.2s, v1.2s, v2.2s
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uqsub v0.4s, v1.4s, v2.4s
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uqsub v0.2d, v1.2d, v2.2d
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// CHECK: uqsub v0.8b, v1.8b, v2.8b // encoding: [0x20,0x2c,0x22,0x2e]
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// CHECK: uqsub v0.16b, v1.16b, v2.16b // encoding: [0x20,0x2c,0x22,0x6e]
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// CHECK: uqsub v0.4h, v1.4h, v2.4h // encoding: [0x20,0x2c,0x62,0x2e]
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// CHECK: uqsub v0.8h, v1.8h, v2.8h // encoding: [0x20,0x2c,0x62,0x6e]
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// CHECK: uqsub v0.2s, v1.2s, v2.2s // encoding: [0x20,0x2c,0xa2,0x2e]
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// CHECK: uqsub v0.4s, v1.4s, v2.4s // encoding: [0x20,0x2c,0xa2,0x6e]
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// CHECK: uqsub v0.2d, v1.2d, v2.2d // encoding: [0x20,0x2c,0xe2,0x6e]
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