llvm-6502/test/MC/X86/intel-syntax-bitwise-ops.s

// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=att %s | FileCheck %s

.intel_syntax

// CHECK: andl	$3, %ecx
    and ecx, 1+2
// CHECK: andl	$3, %ecx
    and ecx, 1|2
// CHECK: andl	$3, %ecx
    and ecx, 1*3
// CHECK: andl	$1, %ecx
    and ecx, 1&3
// CHECK: andl	$0, %ecx
    and ecx, (1&2)
// CHECK: andl	$3, %ecx
    and ecx, ((1)|2)
// CHECK: andl	$1, %ecx
    and ecx, 1&2+3
// CHECK: addl	$4938, %eax
    add eax, 9876 >> 1
// CHECK: addl	$19752, %eax
    add eax, 9876 << 1
Update the X86 assembler for .intel_syntax to accept the \| and & bitwise operators. rdar://15570412 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199323 91177308-0d34-0410-b5e6-96231b3b80d8 2014-01-15 19:05:24 +00:00			`// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=att %s \| FileCheck %s`

			`.intel_syntax`

			`// CHECK: andl $3, %ecx`
			`and ecx, 1+2`
			`// CHECK: andl $3, %ecx`
			`and ecx, 1\|2`
			`// CHECK: andl $3, %ecx`
			`and ecx, 1*3`
			`// CHECK: andl $1, %ecx`
			`and ecx, 1&3`
			`// CHECK: andl $0, %ecx`
			`and ecx, (1&2)`
			`// CHECK: andl $3, %ecx`
			`and ecx, ((1)\|2)`
			`// CHECK: andl $1, %ecx`
			`and ecx, 1&2+3`
Update the X86 assembler for .intel_syntax to accept the << and >> bitwise operators. rdar://15975725 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200896 91177308-0d34-0410-b5e6-96231b3b80d8 2014-02-06 01:21:15 +00:00			`// CHECK: addl $4938, %eax`
			`add eax, 9876 >> 1`
			`// CHECK: addl $19752, %eax`
			`add eax, 9876 << 1`