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llvm-6502/test/CodeGen/X86/fast-isel-atomic.ll

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After a custom inserter, in a block which has constant instructions, update the current basic block in addition to the current insert position, so that they remain consistent. This fixes rdar://8204072. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 22:48:56 +00:00
; RUN: llc < %s -O0 -march=x86-64
; rdar://8204072
The same problem was being tracked in PR7652. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 15:52:32 +00:00
; PR7652
After a custom inserter, in a block which has constant instructions, update the current basic block in addition to the current insert position, so that they remain consistent. This fixes rdar://8204072. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 22:48:56 +00:00
@sc = external global i8
@uc = external global i8
declare i8 @llvm.atomic.load.and.i8.p0i8(i8* nocapture, i8) nounwind
define void @test_fetch_and_op() nounwind {
entry:
%tmp40 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @sc, i8 11) ; <i8> [#uses=1]
store i8 %tmp40, i8* @sc
%tmp41 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @uc, i8 11) ; <i8> [#uses=1]
store i8 %tmp41, i8* @uc
ret void
}
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