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https://github.com/c64scene-ar/llvm-6502.git
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43 lines
1.3 KiB
LLVM
43 lines
1.3 KiB
LLVM
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; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
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; In this test both the pointer and the offset operands to the
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; BUFFER_LOAD instructions end up being stored in vgprs. This
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; requires us to add the pointer and offset together, store the
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; result in the offset operand (vaddr), and then store 0 in an
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; sgpr register pair and use that for the pointer operand
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; (low 64-bits of srsrc).
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; CHECK-LABEL: @mubuf
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; Make sure we aren't using VGPRs for the source operand of S_MOV_B64
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; CHECK-NOT: S_MOV_B64 s[{{[0-9]+:[0-9]+}}], v
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define void @mubuf(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
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entry:
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%0 = call i32 @llvm.r600.read.tidig.x() #1
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%1 = call i32 @llvm.r600.read.tidig.y() #1
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%2 = sext i32 %0 to i64
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%3 = sext i32 %1 to i64
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br label %loop
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loop:
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%4 = phi i64 [0, %entry], [%5, %loop]
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%5 = add i64 %2, %4
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%6 = getelementptr i8 addrspace(1)* %in, i64 %5
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%7 = load i8 addrspace(1)* %6, align 1
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%8 = or i64 %5, 1
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%9 = getelementptr i8 addrspace(1)* %in, i64 %8
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%10 = load i8 addrspace(1)* %9, align 1
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%11 = add i8 %7, %10
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%12 = sext i8 %11 to i32
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store i32 %12, i32 addrspace(1)* %out
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%13 = icmp slt i64 %5, 10
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br i1 %13, label %loop, label %done
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done:
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ret void
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}
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declare i32 @llvm.r600.read.tidig.x() #1
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declare i32 @llvm.r600.read.tidig.y() #1
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attributes #1 = { nounwind readnone }
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