llvm-6502/test/CodeGen/Mips/small-section-reserve-gp.ll

; RUN: llc -mtriple=mipsel-sde-elf -march=mipsel -relocation-model=static < %s \
; RUN: | FileCheck %s

@i = internal unnamed_addr global i32 0, align 4

define i32 @geti() nounwind readonly {
entry:
; CHECK: lw ${{[0-9]+}}, %gp_rel(i)($gp)
  %0 = load i32* @i, align 4
  ret i32 %0
}
Add register Mips::GP to the list of reserved registers if target is bare-metal to prevent it from being clobbered. mips uses $gp to access small data section. This bug was originally reported by Carl Norum. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162340 91177308-0d34-0410-b5e6-96231b3b80d8 2012-08-22 03:18:13 +00:00			`; RUN: llc -mtriple=mipsel-sde-elf -march=mipsel -relocation-model=static < %s \`
			`; RUN: \| FileCheck %s`

			`@i = internal unnamed_addr global i32 0, align 4`

			`define i32 @geti() nounwind readonly {`
			`entry:`
In MipsDAGToDAGISel::SelectAddr, fold add node into address operand, if its second operand is MipsISD::GPRel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162584 91177308-0d34-0410-b5e6-96231b3b80d8 2012-08-24 20:21:49 +00:00			`; CHECK: lw ${{[0-9]+}}, %gp_rel(i)($gp)`
Add register Mips::GP to the list of reserved registers if target is bare-metal to prevent it from being clobbered. mips uses $gp to access small data section. This bug was originally reported by Carl Norum. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162340 91177308-0d34-0410-b5e6-96231b3b80d8 2012-08-22 03:18:13 +00:00			`%0 = load i32* @i, align 4`
			`ret i32 %0`
			`}`