mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-17 03:30:28 +00:00
132 lines
2.7 KiB
LLVM
132 lines
2.7 KiB
LLVM
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; Test 64-bit addition in which the second operand is constant.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check additions of 1.
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define i64 @f1(i64 %a) {
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; CHECK: f1:
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; CHECK: {{aghi %r2, 1|la %r[0-5], 1\(%r2\)}}
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; CHECK: br %r14
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%add = add i64 %a, 1
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ret i64 %add
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}
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; Check the high end of the AGHI range.
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define i64 @f2(i64 %a) {
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; CHECK: f2:
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; CHECK: aghi %r2, 32767
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; CHECK: br %r14
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%add = add i64 %a, 32767
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ret i64 %add
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}
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; Check the next value up, which must use AGFI instead.
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define i64 @f3(i64 %a) {
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; CHECK: f3:
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; CHECK: {{agfi %r2, 32768|lay %r[0-5], 32768\(%r2\)}}
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; CHECK: br %r14
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%add = add i64 %a, 32768
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ret i64 %add
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}
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; Check the high end of the AGFI range.
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define i64 @f4(i64 %a) {
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; CHECK: f4:
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; CHECK: agfi %r2, 2147483647
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; CHECK: br %r14
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%add = add i64 %a, 2147483647
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ret i64 %add
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}
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; Check the next value up, which must use ALGFI instead.
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define i64 @f5(i64 %a) {
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; CHECK: f5:
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; CHECK: algfi %r2, 2147483648
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; CHECK: br %r14
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%add = add i64 %a, 2147483648
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ret i64 %add
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}
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; Check the high end of the ALGFI range.
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define i64 @f6(i64 %a) {
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; CHECK: f6:
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; CHECK: algfi %r2, 4294967295
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; CHECK: br %r14
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%add = add i64 %a, 4294967295
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ret i64 %add
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}
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; Check the next value up, which must be loaded into a register first.
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define i64 @f7(i64 %a) {
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; CHECK: f7:
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; CHECK: llihl %r0, 1
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; CHECK: agr
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; CHECK: br %r14
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%add = add i64 %a, 4294967296
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ret i64 %add
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}
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; Check the high end of the negative AGHI range.
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define i64 @f8(i64 %a) {
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; CHECK: f8:
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; CHECK: aghi %r2, -1
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; CHECK: br %r14
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%add = add i64 %a, -1
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ret i64 %add
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}
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; Check the low end of the AGHI range.
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define i64 @f9(i64 %a) {
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; CHECK: f9:
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; CHECK: aghi %r2, -32768
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; CHECK: br %r14
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%add = add i64 %a, -32768
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ret i64 %add
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}
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; Check the next value down, which must use AGFI instead.
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define i64 @f10(i64 %a) {
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; CHECK: f10:
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; CHECK: {{agfi %r2, -32769|lay %r[0-5]+, -32769\(%r2\)}}
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; CHECK: br %r14
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%add = add i64 %a, -32769
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ret i64 %add
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}
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; Check the low end of the AGFI range.
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define i64 @f11(i64 %a) {
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; CHECK: f11:
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; CHECK: agfi %r2, -2147483648
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; CHECK: br %r14
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%add = add i64 %a, -2147483648
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ret i64 %add
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}
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; Check the next value down, which must use SLGFI instead.
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define i64 @f12(i64 %a) {
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; CHECK: f12:
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; CHECK: slgfi %r2, 2147483649
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; CHECK: br %r14
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%add = add i64 %a, -2147483649
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ret i64 %add
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}
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; Check the low end of the SLGFI range.
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define i64 @f13(i64 %a) {
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; CHECK: f13:
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; CHECK: slgfi %r2, 4294967295
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; CHECK: br %r14
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%add = add i64 %a, -4294967295
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ret i64 %add
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}
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; Check the next value down, which must use register addition instead.
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define i64 @f14(i64 %a) {
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; CHECK: f14:
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; CHECK: llihf %r0, 4294967295
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; CHECK: agr
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; CHECK: br %r14
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%add = add i64 %a, -4294967296
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ret i64 %add
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}
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