llvm-6502/test/CodeGen/PowerPC/vec_vrsave.ll

15 lines
403 B
LLVM
Raw Normal View History

; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t -f
; RUN: grep vrlw %t
; RUN: not grep spr %t
; RUN: not grep vrsave %t
define <4 x i32> @test_rol() {
ret <4 x i32> < i32 -11534337, i32 -11534337, i32 -11534337, i32 -11534337 >
}
define <4 x i32> @test_arg(<4 x i32> %A, <4 x i32> %B) {
%C = add <4 x i32> %A, %B ; <<4 x i32>> [#uses=1]
ret <4 x i32> %C
}