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https://github.com/c64scene-ar/llvm-6502.git
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34 lines
1.0 KiB
LLVM
34 lines
1.0 KiB
LLVM
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; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
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; Generate MemOps for V4 and above.
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define void @f(i32* %p) nounwind {
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entry:
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; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#40){{ *}}-={{ *}}#1
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%p.addr = alloca i32*, align 4
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store i32* %p, i32** %p.addr, align 4
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%0 = load i32** %p.addr, align 4
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%add.ptr = getelementptr inbounds i32* %0, i32 10
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%1 = load i32* %add.ptr, align 4
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%sub = sub nsw i32 %1, 1
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store i32 %sub, i32* %add.ptr, align 4
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ret void
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}
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define void @g(i32* %p, i32 %i) nounwind {
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entry:
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; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#40){{ *}}-={{ *}}#1
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%p.addr = alloca i32*, align 4
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%i.addr = alloca i32, align 4
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store i32* %p, i32** %p.addr, align 4
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store i32 %i, i32* %i.addr, align 4
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%0 = load i32** %p.addr, align 4
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%1 = load i32* %i.addr, align 4
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%add.ptr = getelementptr inbounds i32* %0, i32 %1
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%add.ptr1 = getelementptr inbounds i32* %add.ptr, i32 10
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%2 = load i32* %add.ptr1, align 4
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%sub = sub nsw i32 %2, 1
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store i32 %sub, i32* %add.ptr1, align 4
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ret void
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}
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