2009-05-12 20:33:29 +00:00
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//===-- PrologEpilogInserter.h - Prolog/Epilog code insertion -*- C++ -* --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass is responsible for finalizing the functions frame layout, saving
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// callee saved registers, and for emitting prolog & epilog code for the
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// function.
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//
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// This pass must be run after register allocation. After this pass is
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// executed, it is illegal to construct MO_FrameIndex operands.
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//
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// This pass also implements a shrink wrapping variant of prolog/epilog
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// insertion.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_PEI_H
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#define LLVM_CODEGEN_PEI_H
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2012-12-04 07:12:27 +00:00
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SparseBitVector.h"
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2009-05-12 20:33:29 +00:00
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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2012-12-04 07:12:27 +00:00
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#include "llvm/CodeGen/Passes.h"
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2009-10-07 17:12:56 +00:00
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#include "llvm/Target/TargetRegisterInfo.h"
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2009-05-12 20:33:29 +00:00
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namespace llvm {
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class RegScavenger;
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class MachineBasicBlock;
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class PEI : public MachineFunctionPass {
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public:
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static char ID;
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2010-10-19 17:21:58 +00:00
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PEI() : MachineFunctionPass(ID) {
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initializePEIPass(*PassRegistry::getPassRegistry());
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}
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2009-05-12 20:33:29 +00:00
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virtual void getAnalysisUsage(AnalysisUsage &AU) const;
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/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
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/// frame indexes with appropriate references.
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///
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bool runOnMachineFunction(MachineFunction &Fn);
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private:
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RegScavenger *RS;
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// MinCSFrameIndex, MaxCSFrameIndex - Keeps the range of callee saved
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// stack frame indexes.
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unsigned MinCSFrameIndex, MaxCSFrameIndex;
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// Analysis info for spill/restore placement.
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// "CSR": "callee saved register".
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// CSRegSet contains indices into the Callee Saved Register Info
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// vector built by calculateCalleeSavedRegisters() and accessed
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// via MF.getFrameInfo()->getCalleeSavedInfo().
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typedef SparseBitVector<> CSRegSet;
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// CSRegBlockMap maps MachineBasicBlocks to sets of callee
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// saved register indices.
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typedef DenseMap<MachineBasicBlock*, CSRegSet> CSRegBlockMap;
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// Set and maps for computing CSR spill/restore placement:
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// used in function (UsedCSRegs)
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// used in a basic block (CSRUsed)
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// anticipatable in a basic block (Antic{In,Out})
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// available in a basic block (Avail{In,Out})
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// to be spilled at the entry to a basic block (CSRSave)
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// to be restored at the end of a basic block (CSRRestore)
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CSRegSet UsedCSRegs;
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CSRegBlockMap CSRUsed;
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CSRegBlockMap AnticIn, AnticOut;
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CSRegBlockMap AvailIn, AvailOut;
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CSRegBlockMap CSRSave;
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CSRegBlockMap CSRRestore;
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// Entry and return blocks of the current function.
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MachineBasicBlock* EntryBlock;
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SmallVector<MachineBasicBlock*, 4> ReturnBlocks;
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// Map of MBBs to top level MachineLoops.
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DenseMap<MachineBasicBlock*, MachineLoop*> TLLoops;
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// Flag to control shrink wrapping per-function:
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// may choose to skip shrink wrapping for certain
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// functions.
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bool ShrinkWrapThisFunction;
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2009-10-08 01:46:59 +00:00
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// Flag to control whether to use the register scavenger to resolve
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// frame index materialization registers. Set according to
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// TRI->requiresFrameIndexScavenging() for the curren function.
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bool FrameIndexVirtualScavenging;
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2009-05-12 20:33:29 +00:00
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#ifndef NDEBUG
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// Machine function handle.
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MachineFunction* MF;
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// Flag indicating that the current function
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// has at least one "short" path in the machine
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// CFG from the entry block to an exit block.
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bool HasFastExitPath;
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#endif
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bool calculateSets(MachineFunction &Fn);
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bool calcAnticInOut(MachineBasicBlock* MBB);
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bool calcAvailInOut(MachineBasicBlock* MBB);
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void calculateAnticAvail(MachineFunction &Fn);
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bool addUsesForMEMERegion(MachineBasicBlock* MBB,
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SmallVector<MachineBasicBlock*, 4>& blks);
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bool addUsesForTopLevelLoops(SmallVector<MachineBasicBlock*, 4>& blks);
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bool calcSpillPlacements(MachineBasicBlock* MBB,
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SmallVector<MachineBasicBlock*, 4> &blks,
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CSRegBlockMap &prevSpills);
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bool calcRestorePlacements(MachineBasicBlock* MBB,
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SmallVector<MachineBasicBlock*, 4> &blks,
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CSRegBlockMap &prevRestores);
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void placeSpillsAndRestores(MachineFunction &Fn);
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void placeCSRSpillsAndRestores(MachineFunction &Fn);
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2009-07-16 13:50:40 +00:00
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void calculateCallsInformation(MachineFunction &Fn);
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2009-05-12 20:33:29 +00:00
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void calculateCalleeSavedRegisters(MachineFunction &Fn);
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void insertCSRSpillsAndRestores(MachineFunction &Fn);
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void calculateFrameObjectOffsets(MachineFunction &Fn);
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void replaceFrameIndices(MachineFunction &Fn);
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Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving
interest for this, as it currently reserves a register rather than using
the scavenger for matierializing constants as needed.
Instead of scavenging registers on the fly while eliminating frame indices,
new virtual registers are created, and then a scavenged collectively in a
post-pass over the function. This isolates the bits that need to interact
with the scavenger, and sets the stage for more intelligent use, and reuse,
of scavenged registers.
For the time being, this is disabled by default. Once the bugs are worked out,
the current scavenging calls in replaceFrameIndices() will be removed and
the post-pass scavenging will be the default. Until then,
-enable-frame-index-scavenging enables the new code. Currently, only the
Thumb1 back end is set up to use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-24 23:52:18 +00:00
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void scavengeFrameVirtualRegs(MachineFunction &Fn);
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2009-05-12 20:33:29 +00:00
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void insertPrologEpilogCode(MachineFunction &Fn);
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// Initialize DFA sets, called before iterations.
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void clearAnticAvailSets();
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// Clear all sets constructed by shrink wrapping.
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void clearAllSets();
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// Initialize all shrink wrapping data.
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void initShrinkWrappingInfo();
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// Convienences for dealing with machine loops.
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MachineBasicBlock* getTopLevelLoopPreheader(MachineLoop* LP);
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MachineLoop* getTopLevelLoopParent(MachineLoop *LP);
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// Propgate CSRs used in MBB to all MBBs of loop LP.
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void propagateUsesAroundLoop(MachineBasicBlock* MBB, MachineLoop* LP);
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// Convenience for recognizing return blocks.
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bool isReturnBlock(MachineBasicBlock* MBB);
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#ifndef NDEBUG
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// Debugging methods.
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// Mark this function as having fast exit paths.
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void findFastExitPath();
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// Verify placement of spills/restores.
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void verifySpillRestorePlacement();
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std::string getBasicBlockName(const MachineBasicBlock* MBB);
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std::string stringifyCSRegSet(const CSRegSet& s);
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void dumpSet(const CSRegSet& s);
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void dumpUsed(MachineBasicBlock* MBB);
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void dumpAllUsed();
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void dumpSets(MachineBasicBlock* MBB);
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void dumpSets1(MachineBasicBlock* MBB);
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void dumpAllSets();
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void dumpSRSets();
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#endif
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};
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} // End llvm namespace
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#endif
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