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https://github.com/c64scene-ar/llvm-6502.git
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23 lines
864 B
LLVM
23 lines
864 B
LLVM
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; RUN: llc < %s | FileCheck %s
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; ModuleID = '8div.c'
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-macosx10.6.6"
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define signext i8 @test_div(i8 %dividend, i8 %divisor) nounwind ssp {
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entry:
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%dividend.addr = alloca i8, align 2
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%divisor.addr = alloca i8, align 1
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%quotient = alloca i8, align 1
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store i8 %dividend, i8* %dividend.addr, align 2
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store i8 %divisor, i8* %divisor.addr, align 1
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%tmp = load i8* %dividend.addr, align 2
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%tmp1 = load i8* %divisor.addr, align 1
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; Insist on i8->i32 zero extension, even though divb demands only i16:
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; CHECK: movzbl {{.*}}%eax
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; CHECK: divb
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%div = udiv i8 %tmp, %tmp1
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store i8 %div, i8* %quotient, align 1
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%tmp4 = load i8* %quotient, align 1
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ret i8 %tmp4
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}
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