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llvm-6502/test/CodeGen/ARM64/returnaddr.ll

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ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00
; RUN: llc < %s -march=arm64 | FileCheck %s
define i8* @rt0(i32 %x) nounwind readnone {
entry:
; CHECK-LABEL: rt0:
[ARM64] Rename LR to the UAL-compliant 'X30'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205885 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 14:43:59 +00:00
; CHECK: mov x0, x30
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00
; CHECK: ret
%0 = tail call i8* @llvm.returnaddress(i32 0)
ret i8* %0
}
define i8* @rt2() nounwind readnone {
entry:
; CHECK-LABEL: rt2:
[ARM64] Rename LR to the UAL-compliant 'X30'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205885 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 14:43:59 +00:00
; CHECK: stp x29, x30, [sp, #-16]!
[ARM64] Rename FP to the UAL-compliant 'X29'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205884 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 14:43:50 +00:00
; CHECK: mov x29, sp
; CHECK: ldr x[[REG:[0-9]+]], [x29]
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00
; CHECK: ldr x[[REG2:[0-9]+]], [x[[REG]]]
; CHECK: ldr x0, [x[[REG2]], #8]
[ARM64] Rename LR to the UAL-compliant 'X30'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205885 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 14:43:59 +00:00
; CHECK: ldp x29, x30, [sp], #16
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00
; CHECK: ret
%0 = tail call i8* @llvm.returnaddress(i32 2)
ret i8* %0
}
declare i8* @llvm.returnaddress(i32) nounwind readnone
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