mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 04:30:12 +00:00
256 lines
7.2 KiB
LLVM
256 lines
7.2 KiB
LLVM
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; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort | FileCheck %s
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; Test all the cmp predicates that can feed an integer conditional move.
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define i64 @select_fcmp_false_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_false_cmov
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; CHECK: movq %rsi, %rax
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; CHECK-NEXT: retq
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%1 = fcmp false double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_oeq_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_oeq_cmov
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; CHECK: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: setnp %al
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; CHECK-NEXT: sete %cl
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; CHECK-NEXT: testb %al, %cl
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; CHECK-NEXT: cmoveq %rsi, %rdi
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%1 = fcmp oeq double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_ogt_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_ogt_cmov
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; CHECK: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: cmovbeq %rsi, %rdi
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%1 = fcmp ogt double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_oge_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_oge_cmov
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; CHECK: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: cmovbq %rsi, %rdi
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%1 = fcmp oge double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_olt_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_olt_cmov
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; CHECK: ucomisd %xmm0, %xmm1
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; CHECK-NEXT: cmovbeq %rsi, %rdi
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%1 = fcmp olt double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_ole_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_ole_cmov
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; CHECK: ucomisd %xmm0, %xmm1
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; CHECK-NEXT: cmovbq %rsi, %rdi
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%1 = fcmp ole double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_one_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_one_cmov
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; CHECK: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: cmoveq %rsi, %rdi
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%1 = fcmp one double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_ord_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_ord_cmov
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; CHECK: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: cmovpq %rsi, %rdi
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%1 = fcmp ord double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_uno_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_uno_cmov
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; CHECK: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: cmovnpq %rsi, %rdi
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%1 = fcmp uno double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_ueq_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_ueq_cmov
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; CHECK: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: cmovneq %rsi, %rdi
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%1 = fcmp ueq double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_ugt_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_ugt_cmov
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; CHECK: ucomisd %xmm0, %xmm1
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; CHECK-NEXT: cmovaeq %rsi, %rdi
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%1 = fcmp ugt double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_uge_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_uge_cmov
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; CHECK: ucomisd %xmm0, %xmm1
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; CHECK-NEXT: cmovaq %rsi, %rdi
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%1 = fcmp uge double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_ult_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_ult_cmov
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; CHECK: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: cmovaeq %rsi, %rdi
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%1 = fcmp ult double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_ule_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_ule_cmov
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; CHECK: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: cmovaq %rsi, %rdi
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%1 = fcmp ule double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_une_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_une_cmov
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; CHECK: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: setp %al
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; CHECK-NEXT: setne %cl
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; CHECK-NEXT: orb %al, %cl
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; CHECK-NEXT: cmoveq %rsi, %rdi
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%1 = fcmp une double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_fcmp_true_cmov(double %a, double %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_fcmp_true_cmov
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; CHECK: movq %rdi, %rax
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%1 = fcmp true double %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_icmp_eq_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_icmp_eq_cmov
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: cmovneq %rcx, %rdx
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; CHECK-NEXT: movq %rdx, %rax
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%1 = icmp eq i64 %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_icmp_ne_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_icmp_ne_cmov
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: cmoveq %rcx, %rdx
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; CHECK-NEXT: movq %rdx, %rax
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%1 = icmp ne i64 %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_icmp_ugt_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_icmp_ugt_cmov
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: cmovbeq %rcx, %rdx
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; CHECK-NEXT: movq %rdx, %rax
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%1 = icmp ugt i64 %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_icmp_uge_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_icmp_uge_cmov
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: cmovbq %rcx, %rdx
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; CHECK-NEXT: movq %rdx, %rax
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%1 = icmp uge i64 %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_icmp_ult_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_icmp_ult_cmov
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: cmovaeq %rcx, %rdx
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; CHECK-NEXT: movq %rdx, %rax
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%1 = icmp ult i64 %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_icmp_ule_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_icmp_ule_cmov
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: cmovaq %rcx, %rdx
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; CHECK-NEXT: movq %rdx, %rax
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%1 = icmp ule i64 %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_icmp_sgt_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_icmp_sgt_cmov
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: cmovleq %rcx, %rdx
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; CHECK-NEXT: movq %rdx, %rax
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%1 = icmp sgt i64 %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_icmp_sge_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_icmp_sge_cmov
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: cmovlq %rcx, %rdx
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; CHECK-NEXT: movq %rdx, %rax
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%1 = icmp sge i64 %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_icmp_slt_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_icmp_slt_cmov
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: cmovgeq %rcx, %rdx
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; CHECK-NEXT: movq %rdx, %rax
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%1 = icmp slt i64 %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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define i64 @select_icmp_sle_cmov(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: select_icmp_sle_cmov
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: cmovgq %rcx, %rdx
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; CHECK-NEXT: movq %rdx, %rax
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%1 = icmp sle i64 %a, %b
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%2 = select i1 %1, i64 %c, i64 %d
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ret i64 %2
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}
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