2014-05-30 10:09:59 +00:00
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; RUN: llc -regalloc=greedy -arm-atomic-cfg-tidy=0 < %s | FileCheck %s
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2011-05-03 00:46:49 +00:00
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; LSR shouldn't introduce more induction variables than needed, increasing
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; register pressure and therefore spilling. There is more room for improvement
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; here.
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2014-01-31 00:42:44 +00:00
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; CHECK: sub sp, #{{40|36|32|28|24}}
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2011-05-03 00:46:49 +00:00
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2011-07-08 20:46:18 +00:00
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; CHECK: %for.inc
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2013-06-17 19:00:36 +00:00
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; CHECK-NOT: ldr
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2011-07-08 20:46:18 +00:00
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; CHECK: add
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2011-05-03 00:46:49 +00:00
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
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2012-01-04 01:55:04 +00:00
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target triple = "thumbv7-apple-ios"
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2011-05-03 00:46:49 +00:00
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%struct.partition_entry = type { i32, i32, i64, i64 }
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define i32 @partition_overlap_check(%struct.partition_entry* nocapture %part, i32 %num_entries) nounwind readonly optsize ssp {
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entry:
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%cmp79 = icmp sgt i32 %num_entries, 0
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br i1 %cmp79, label %outer.loop, label %for.end72
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outer.loop: ; preds = %for.inc69, %entry
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%overlap.081 = phi i32 [ %overlap.4, %for.inc69 ], [ 0, %entry ]
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%0 = phi i32 [ %inc71, %for.inc69 ], [ 0, %entry ]
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%offset = getelementptr %struct.partition_entry* %part, i32 %0, i32 2
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%len = getelementptr %struct.partition_entry* %part, i32 %0, i32 3
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2013-04-30 17:52:57 +00:00
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%tmp5 = load i64* %offset, align 4
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%tmp15 = load i64* %len, align 4
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2011-05-03 00:46:49 +00:00
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%add = add nsw i64 %tmp15, %tmp5
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br label %inner.loop
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inner.loop: ; preds = %for.inc, %outer.loop
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%overlap.178 = phi i32 [ %overlap.081, %outer.loop ], [ %overlap.4, %for.inc ]
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%1 = phi i32 [ 0, %outer.loop ], [ %inc, %for.inc ]
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%cmp23 = icmp eq i32 %0, %1
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br i1 %cmp23, label %for.inc, label %if.end
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if.end: ; preds = %inner.loop
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%len39 = getelementptr %struct.partition_entry* %part, i32 %1, i32 3
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%offset28 = getelementptr %struct.partition_entry* %part, i32 %1, i32 2
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2013-04-30 17:52:57 +00:00
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%tmp29 = load i64* %offset28, align 4
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%tmp40 = load i64* %len39, align 4
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2011-05-03 00:46:49 +00:00
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%add41 = add nsw i64 %tmp40, %tmp29
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%cmp44 = icmp sge i64 %tmp29, %tmp5
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%cmp47 = icmp slt i64 %tmp29, %add
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%or.cond = and i1 %cmp44, %cmp47
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%overlap.2 = select i1 %or.cond, i32 1, i32 %overlap.178
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%cmp52 = icmp sle i64 %add41, %add
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%cmp56 = icmp sgt i64 %add41, %tmp5
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%or.cond74 = and i1 %cmp52, %cmp56
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%overlap.3 = select i1 %or.cond74, i32 1, i32 %overlap.2
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%cmp61 = icmp sgt i64 %tmp29, %tmp5
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%cmp65 = icmp slt i64 %add41, %add
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%or.cond75 = or i1 %cmp61, %cmp65
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br i1 %or.cond75, label %for.inc, label %if.then66
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if.then66: ; preds = %if.end
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br label %for.inc
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for.inc: ; preds = %if.end, %if.then66, %inner.loop
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%overlap.4 = phi i32 [ %overlap.178, %inner.loop ], [ 1, %if.then66 ], [ %overlap.3, %if.end ]
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%inc = add nsw i32 %1, 1
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%exitcond = icmp eq i32 %inc, %num_entries
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br i1 %exitcond, label %for.inc69, label %inner.loop
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for.inc69: ; preds = %for.inc
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%inc71 = add nsw i32 %0, 1
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%exitcond83 = icmp eq i32 %inc71, %num_entries
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br i1 %exitcond83, label %for.end72, label %outer.loop
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for.end72: ; preds = %for.inc69, %entry
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%overlap.0.lcssa = phi i32 [ 0, %entry ], [ %overlap.4, %for.inc69 ]
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ret i32 %overlap.0.lcssa
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}
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