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llvm-6502/test/MC/PowerPC/ppc64-encoding-bookII.s

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[PowerPC] Add some Book II instructions to AsmParser This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03 19:51:09 +00:00
# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
# Cache management instruction
[PowerPC] Add some existing instructions to ppc64-encoding-bookII.s The test case had a couple of FIXMEs where the instruction is in fact already supported by the back-end. In some other case, while the generic form of the instruction is not yet supported, a specialized form is. This adds tests for those already supported instructions / instruction forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185347 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 16:52:55 +00:00
# CHECK: icbi 2, 3 # encoding: [0x7c,0x02,0x1f,0xac]
icbi 2, 3
[PowerPC] Add some Book II instructions to AsmParser This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03 19:51:09 +00:00
# FIXME: dcbt 2, 3, 10
[PowerPC] Add some existing instructions to ppc64-encoding-bookII.s The test case had a couple of FIXMEs where the instruction is in fact already supported by the back-end. In some other case, while the generic form of the instruction is not yet supported, a specialized form is. This adds tests for those already supported instructions / instruction forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185347 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 16:52:55 +00:00
# CHECK: dcbt 2, 3 # encoding: [0x7c,0x02,0x1a,0x2c]
dcbt 2, 3
[PowerPC] Add some Book II instructions to AsmParser This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03 19:51:09 +00:00
# FIXME: dcbtst 2, 3, 10
[PowerPC] Add some existing instructions to ppc64-encoding-bookII.s The test case had a couple of FIXMEs where the instruction is in fact already supported by the back-end. In some other case, while the generic form of the instruction is not yet supported, a specialized form is. This adds tests for those already supported instructions / instruction forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185347 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 16:52:55 +00:00
# CHECK: dcbtst 2, 3 # encoding: [0x7c,0x02,0x19,0xec]
dcbtst 2, 3
[PowerPC] Add some Book II instructions to AsmParser This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03 19:51:09 +00:00
# CHECK: dcbz 2, 3 # encoding: [0x7c,0x02,0x1f,0xec]
dcbz 2, 3
# CHECK: dcbst 2, 3 # encoding: [0x7c,0x02,0x18,0x6c]
dcbst 2, 3
# FIXME: dcbf 2, 3, 1
# Synchronization instructions
[PowerPC] Add some existing instructions to ppc64-encoding-bookII.s The test case had a couple of FIXMEs where the instruction is in fact already supported by the back-end. In some other case, while the generic form of the instruction is not yet supported, a specialized form is. This adds tests for those already supported instructions / instruction forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185347 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 16:52:55 +00:00
# CHECK: isync # encoding: [0x4c,0x00,0x01,0x2c]
isync
[PowerPC] Add some Book II instructions to AsmParser This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03 19:51:09 +00:00
# FIXME: lbarx 2, 3, 4, 1
# FIXME: lharx 2, 3, 4, 1
# FIXME: lwarx 2, 3, 4, 1
# FIXME: ldarx 2, 3, 4, 1
# FIXME: stbcx. 2, 3, 4
# FIXME: sthcx. 2, 3, 4
# CHECK: stwcx. 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x2d]
stwcx. 2, 3, 4
# CHECK: stdcx. 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xad]
stdcx. 2, 3, 4
[PowerPC] Add variants of "sync" instruction This adds support for the "sync $L" instruction with operand, and provides aliases for "lwsync" and "ptesync". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185344 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 16:37:52 +00:00
# CHECK: sync 2 # encoding: [0x7c,0x40,0x04,0xac]
sync 2
[PowerPC] Support "eieio" instruction This adds support for the "eieio" instruction to the asm parser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185349 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 17:06:26 +00:00
# CHECK: eieio # encoding: [0x7c,0x00,0x06,0xac]
eieio
[PowerPC] Add "wait" instruction This adds the "wait" instruction and its extended mnemonics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185350 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 17:21:23 +00:00
# CHECK: wait 2 # encoding: [0x7c,0x40,0x00,0x7c]
wait 2
[PowerPC] Add some Book II instructions to AsmParser This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03 19:51:09 +00:00
# Extended mnemonics
# CHECK: dcbf 2, 3 # encoding: [0x7c,0x02,0x18,0xac]
dcbf 2, 3
# FIXME: dcbfl 2, 3
# FIXME: lbarx 2, 3, 4
# FIXME: lharx 2, 3, 4
# CHECK: lwarx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x28]
lwarx 2, 3, 4
# CHECK: ldarx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0xa8]
ldarx 2, 3, 4
[PowerPC] Add variants of "sync" instruction This adds support for the "sync $L" instruction with operand, and provides aliases for "lwsync" and "ptesync". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185344 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 16:37:52 +00:00
# CHECK: sync 0 # encoding: [0x7c,0x00,0x04,0xac]
[PowerPC] Add some Book II instructions to AsmParser This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03 19:51:09 +00:00
sync
[PowerPC] Also add "msync" alias This adds an alias for "msync" (which is used on Book E systems instead of "sync"). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185375 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 20:39:50 +00:00
# CHECK: sync 0 # encoding: [0x7c,0x00,0x04,0xac]
msync
[PowerPC] Add variants of "sync" instruction This adds support for the "sync $L" instruction with operand, and provides aliases for "lwsync" and "ptesync". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185344 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 16:37:52 +00:00
# CHECK: sync 1 # encoding: [0x7c,0x20,0x04,0xac]
lwsync
# CHECK: sync 2 # encoding: [0x7c,0x40,0x04,0xac]
ptesync
[PowerPC] Add some Book II instructions to AsmParser This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03 19:51:09 +00:00
[PowerPC] Add "wait" instruction This adds the "wait" instruction and its extended mnemonics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185350 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 17:21:23 +00:00
# CHECK: wait 0 # encoding: [0x7c,0x00,0x00,0x7c]
wait
# CHECK: wait 1 # encoding: [0x7c,0x20,0x00,0x7c]
waitrsv
# CHECK: wait 2 # encoding: [0x7c,0x40,0x00,0x7c]
waitimpl
[PowerPC] Add some Book II instructions to AsmParser This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03 19:51:09 +00:00
[PowerPC] Support time base instructions This adds support for the old-style time base instructions; while new programs are supposed to use mfspr, the mftb instructions are still supported and in use by existing assembler files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185829 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 15:20:38 +00:00
# Time base instructions
# CHECK: mftb 2, 123 # encoding: [0x7c,0x5b,0x1a,0xe6]
mftb 2, 123
# CHECK: mftb 2, 268 # encoding: [0x7c,0x4c,0x42,0xe6]
mftb 2
# CHECK: mftb 2, 269 # encoding: [0x7c,0x4d,0x42,0xe6]
mftbu 2
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