llvm-6502/test/MC/Hexagon/inst_add.ll

;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \
;; RUN: | llvm-objdump -s - | FileCheck %s

define i32 @foo (i32 %a, i32 %b)
{
  %1 = add i32 %a, %b
  ret i32 %1
}

; CHECK:  0000 004100f3 00c09f52
[Hexagon] Converting from ADD_rr to A2_add which has encoding bits. Adding test to show correct instruction selection and encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222249 91177308-0d34-0410-b5e6-96231b3b80d8 2014-11-18 20:28:11 +00:00			`;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \`
			`;; RUN: \| llvm-objdump -s - \| FileCheck %s`

			`define i32 @foo (i32 %a, i32 %b)`
			`{`
			`%1 = add i32 %a, %b`
			`ret i32 %1`
			`}`

[Hexagon] [NFC] Adding trailing whitespace to test files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222785 91177308-0d34-0410-b5e6-96231b3b80d8 2014-11-25 20:22:24 +00:00			`; CHECK: 0000 004100f3 00c09f52`