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llvm-6502/test/MC/X86/x86-32-ms-inline-asm.s

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Tell llvm-mc we're using intel syntax, so we don't have to use directives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166640 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24 23:34:38 +00:00
// RUN: llvm-mc -x86-asm-syntax=intel -triple i386-unknown-unknown --show-encoding %s | FileCheck %s
[ms-inline asm] Add back-end test case for r166632. Make sure we emit the correct .s output as well as get the correct encoding by the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166638 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24 23:10:28 +00:00
mov eax, [ebx].0
mov [ebx].4, ecx
Tell llvm-mc we're using intel syntax, so we don't have to use directives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166640 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24 23:34:38 +00:00
// CHECK: movl (%ebx), %eax
// CHECK: encoding: [0x8b,0x03]
// CHECK: movl %ecx, 4(%ebx)
// CHECK: encoding: [0x89,0x4b,0x04]
[ms-inline asm] Add back-end test case for r166632. Make sure we emit the correct .s output as well as get the correct encoding by the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166638 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24 23:10:28 +00:00
[ms-inline asm] Add support for the [] operator. Essentially, [expr1][expr2] is equivalent to [expr1 + expr2]. See test cases for more examples. rdar://12470392 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166949 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29 18:01:54 +00:00
_t21: ## @t21
// CHECK: t21
mov eax, [4*eax + 4]
// CHECK: movl 4(,%eax,4), %eax
// CHECK: # encoding: [0x8b,0x04,0x85,0x04,0x00,0x00,0x00]
mov eax, [4*eax][4]
// CHECK: movl 4(,%eax,4), %eax
// CHECK: # encoding: [0x8b,0x04,0x85,0x04,0x00,0x00,0x00]
mov eax, [esi + eax]
// CHECK: movl (%esi,%eax), %eax
// CHECK: # encoding: [0x8b,0x04,0x06]
mov eax, [esi][eax]
// CHECK: movl (%esi,%eax), %eax
// CHECK: # encoding: [0x8b,0x04,0x06]
mov eax, [esi + 4*eax]
// CHECK: movl (%esi,%eax,4), %eax
// CHECK: # encoding: [0x8b,0x04,0x86]
mov eax, [esi][4*eax]
// CHECK: movl (%esi,%eax,4), %eax
// CHECK: # encoding: [0x8b,0x04,0x86]
mov eax, [esi + eax + 4]
// CHECK: movl 4(%esi,%eax), %eax
// CHECK: # encoding: [0x8b,0x44,0x06,0x04]
mov eax, [esi][eax + 4]
// CHECK: movl 4(%esi,%eax), %eax
// CHECK: # encoding: [0x8b,0x44,0x06,0x04]
mov eax, [esi + eax][4]
// CHECK: movl 4(%esi,%eax), %eax
// CHECK: # encoding: [0x8b,0x44,0x06,0x04]
mov eax, [esi][eax][4]
// CHECK: movl 4(%esi,%eax), %eax
// CHECK: # encoding: [0x8b,0x44,0x06,0x04]
mov eax, [esi + 2*eax + 4]
// CHECK: movl 4(%esi,%eax,2), %eax
// CHECK: # encoding: [0x8b,0x44,0x46,0x04]
mov eax, [esi][2*eax + 4]
// CHECK: movl 4(%esi,%eax,2), %eax
// CHECK: # encoding: [0x8b,0x44,0x46,0x04]
mov eax, [esi + 2*eax][4]
// CHECK: movl 4(%esi,%eax,2), %eax
// CHECK: # encoding: [0x8b,0x44,0x46,0x04]
mov eax, [esi][2*eax][4]
// CHECK: movl 4(%esi,%eax,2), %eax
// CHECK: # encoding: [0x8b,0x44,0x46,0x04]
[ms-inline asm] Add support of imm displacement before bracketed memory expression. Specifically, this syntax: ImmDisp [ BaseReg + Scale*IndexReg + Disp ] We don't currently support: ImmDisp [ Symbol ] rdar://13518671 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178186 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27 21:49:56 +00:00
mov eax, 4[esi + 2*eax + 4]
// CHECK: movl 8(%esi,%eax,2), %eax
// CHECK: # encoding: [0x8b,0x44,0x46,0x08]
mov eax, 4[esi][2*eax + 4]
// CHECK: movl 8(%esi,%eax,2), %eax
// CHECK: # encoding: [0x8b,0x44,0x46,0x08]
mov eax, 4[esi + 2*eax][4]
// CHECK: movl 8(%esi,%eax,2), %eax
// CHECK: # encoding: [0x8b,0x44,0x46,0x08]
mov eax, 4[esi][2*eax][4]
// CHECK: movl 8(%esi,%eax,2), %eax
// CHECK: # encoding: [0x8b,0x44,0x46,0x08]
mov eax, 4[esi][2*eax][4][8]
// CHECK: movl 16(%esi,%eax,2), %eax
// CHECK: # encoding: [0x8b,0x44,0x46,0x10]
prefetchnta 64[eax]
// CHECK: prefetchnta 64(%eax)
// CHECK: # encoding: [0x0f,0x18,0x40,0x40]
[ms-inline asm] Add support for the pushad/popad mnemonics. rdar://13254235 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176036 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 19:06:27 +00:00
pusha
// CHECK: pushal
// CHECK: # encoding: [0x60]
popa
// CHECK: popal
// CHECK: # encoding: [0x61]
pushad
// CHECK: pushal
// CHECK: # encoding: [0x60]
popad
// CHECK: popal
// CHECK: # encoding: [0x61]
[x86 asm] allow fwait alias in both At&t and Intel modes (PR21208) Differential Revision: http://reviews.llvm.org/D5741 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219725 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-14 21:41:17 +00:00
fwait
// CHECK: wait
// CHECK: # encoding: [0x9b]
[ms-inline asm] Add support for the [] operator. Essentially, [expr1][expr2] is equivalent to [expr1 + expr2]. See test cases for more examples. rdar://12470392 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166949 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29 18:01:54 +00:00
ret
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