2009-01-15 22:18:12 +00:00
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//=- llvm/CodeGen/ScheduleHazardRecognizer.h - Scheduling Support -*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the ScheduleHazardRecognizer class, which implements
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// hazard-avoidance heuristics for scheduling.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
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#define LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
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namespace llvm {
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class SUnit;
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/// HazardRecognizer - This determines whether or not an instruction can be
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/// issued this cycle, and whether or not a noop needs to be inserted to handle
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/// the hazard.
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class ScheduleHazardRecognizer {
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Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:03:26 +00:00
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protected:
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/// MaxLookAhead - Indicate the number of cycles in the scoreboard
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/// state. Important to restore the state after backtracking. Additionally,
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/// MaxLookAhead=0 identifies a fake recognizer, allowing the client to
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/// bypass virtual calls. Currently the PostRA scheduler ignores it.
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unsigned MaxLookAhead;
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2009-01-15 22:18:12 +00:00
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public:
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Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:03:26 +00:00
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ScheduleHazardRecognizer(): MaxLookAhead(0) {}
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2009-01-15 22:18:12 +00:00
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virtual ~ScheduleHazardRecognizer();
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enum HazardType {
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NoHazard, // This instruction can be emitted at this cycle.
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Hazard, // This instruction can't be emitted at this cycle.
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NoopHazard // This instruction can't be emitted, and needs noops.
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};
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Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:03:26 +00:00
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unsigned getMaxLookAhead() const { return MaxLookAhead; }
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2011-01-21 05:51:33 +00:00
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bool isEnabled() const { return MaxLookAhead != 0; }
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Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:03:26 +00:00
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/// atIssueLimit - Return true if no more instructions may be issued in this
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/// cycle.
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2012-06-05 03:44:32 +00:00
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///
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/// FIXME: remove this once MachineScheduler is the only client.
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Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:03:26 +00:00
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virtual bool atIssueLimit() const { return false; }
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2009-01-15 22:18:12 +00:00
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/// getHazardType - Return the hazard type of emitting this node. There are
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/// three possible results. Either:
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/// * NoHazard: it is legal to issue this instruction on this cycle.
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/// * Hazard: issuing this instruction would stall the machine. If some
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/// other instruction is available, issue it first.
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/// * NoopHazard: issuing this instruction would break the program. If
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/// some other instruction can be issued, do so, otherwise issue a noop.
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2012-05-24 22:11:09 +00:00
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virtual HazardType getHazardType(SUnit *m, int Stalls = 0) {
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2009-01-15 22:18:12 +00:00
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return NoHazard;
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}
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2009-08-10 15:55:25 +00:00
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/// Reset - This callback is invoked when a new block of
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/// instructions is about to be schedule. The hazard state should be
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/// set to an initialized state.
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virtual void Reset() {}
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2009-01-15 22:18:12 +00:00
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/// EmitInstruction - This callback is invoked when an instruction is
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/// emitted, to advance the hazard state.
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virtual void EmitInstruction(SUnit *) {}
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Add two additional hazard recognizer functions
This adds two additional functions to the hazard recognizer interface. These
are optional (in the sense that the default implementations preserve the
current behavior), and used by the post-RA scheduler. Upcoming commits will use
this functionality in order to improve dispatch-group formation on the POWER7
and related cores. Dispatch groups are an odd construct: sometimes we need to
insert nops to force a new one to start (for performance reasons), and some
instructions need to appear in certain positions within a group, but the groups
are not fundamentally cycle based (they can contain instructions with data
dependencies with non-trivial latencies).
Motivation:
unsigned PreEmitNoops(SUnit *) - Used to force the post-RA scheduler to insert
nops to force a new dispatch group to begin. We already have a NoopHazard, and
this is also still needed. However, NoopHazard only causes a nop to be inserted
if there are no other available instructions, and so is not always sufficient.
The number of nops to insert depends on state that only the hazard recognizer
has, so a general callback is necessary.
bool ShouldPreferAnother(SUnit *) - Used to avoid scheduling instructions that
would start a new dispatch group when others are available that could be part
of the current dispatch group. In this case, we don't want to issue nops,
because the non-preferred instruction will implicitly start a new dispatch
group regardless.
Although the motivation for these functions is driven by the PowerPC backend,
they are completely general.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197084 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 22:33:43 +00:00
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/// PreEmitNoops - This callback is invoked prior to emitting an instruction.
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/// It should return the number of noops to emit prior to the provided
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/// instruction.
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/// Note: This is only used during PostRA scheduling. EmitNoop is not called
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/// for these noops.
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virtual unsigned PreEmitNoops(SUnit *) {
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return 0;
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}
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/// ShouldPreferAnother - This callback may be invoked if getHazardType
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/// returns NoHazard. If, even though there is no hazard, it would be better to
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/// schedule another available instruction, this callback should return true.
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virtual bool ShouldPreferAnother(SUnit *) {
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return false;
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}
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Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:03:26 +00:00
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/// AdvanceCycle - This callback is invoked whenever the next top-down
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/// instruction to be scheduled cannot issue in the current cycle, either
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/// because of latency or resource conflicts. This should increment the
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2009-01-15 22:18:12 +00:00
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/// internal state of the hazard recognizer so that previously "Hazard"
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/// instructions will now not be hazards.
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virtual void AdvanceCycle() {}
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Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:03:26 +00:00
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/// RecedeCycle - This callback is invoked whenever the next bottom-up
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/// instruction to be scheduled cannot issue in the current cycle, either
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/// because of latency or resource conflicts.
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virtual void RecedeCycle() {}
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2009-01-15 22:18:12 +00:00
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/// EmitNoop - This callback is invoked when a noop was added to the
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/// instruction stream.
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2009-01-16 01:33:36 +00:00
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virtual void EmitNoop() {
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// Default implementation: count it as a cycle.
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AdvanceCycle();
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}
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2009-01-15 22:18:12 +00:00
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};
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}
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#endif
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