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llvm-6502/test/MC/AArch64/neon-extract.s

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AArch64/ARM64: run AArch64 NEON MC tests through ARM64 too. This skips a couple of compare ones due to the different syntaxt for floating-point 0.0. AArch64 does it more canonically, and we'll need to fiddle ARM64 to make it work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207119 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 15:04:20 +00:00
// RUN: llvm-mc -triple=arm64 -mattr=+neon -show-encoding < %s | FileCheck %s
Implement AArch64 Neon instruction set Bitwise Extract. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194118 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-06 02:25:49 +00:00
// Check that the assembler can handle the documented syntax for AArch64
//------------------------------------------------------------------------------
// Instructions for bitwise extract
//------------------------------------------------------------------------------
ext v0.8b, v1.8b, v2.8b, #0x3
ext v0.16b, v1.16b, v2.16b, #0x3
AArch64/ARM64: run AArch64 NEON MC tests through ARM64 too. This skips a couple of compare ones due to the different syntaxt for floating-point 0.0. AArch64 does it more canonically, and we'll need to fiddle ARM64 to make it work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207119 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 15:04:20 +00:00
// CHECK: ext v0.8b, v1.8b, v2.8b, #{{0x3|3}} // encoding: [0x20,0x18,0x02,0x2e]
// CHECK: ext v0.16b, v1.16b, v2.16b, #{{0x3|3}} // encoding: [0x20,0x18,0x02,0x6e]
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