2014-04-15 19:08:46 +00:00
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; RUN: llc < %s -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone | FileCheck %s
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2014-03-29 10:18:08 +00:00
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; Trivial patchpoint codegen
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;
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define i64 @trivial_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
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entry:
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; CHECK-LABEL: trivial_patchpoint_codegen:
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; CHECK: movz x16, #57005, lsl #32
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; CHECK-NEXT: movk x16, #48879, lsl #16
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; CHECK-NEXT: movk x16, #51966
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; CHECK-NEXT: blr x16
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; CHECK: movz x16, #57005, lsl #32
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; CHECK-NEXT: movk x16, #48879, lsl #16
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; CHECK-NEXT: movk x16, #51967
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; CHECK-NEXT: blr x16
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; CHECK: ret
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%resolveCall2 = inttoptr i64 244837814094590 to i8*
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%result = tail call i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 2, i32 20, i8* %resolveCall2, i32 4, i64 %p1, i64 %p2, i64 %p3, i64 %p4)
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%resolveCall3 = inttoptr i64 244837814094591 to i8*
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tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 3, i32 20, i8* %resolveCall3, i32 2, i64 %p1, i64 %result)
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ret i64 %result
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}
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; Caller frame metadata with stackmaps. This should not be optimized
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; as a leaf function.
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;
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; CHECK-LABEL: caller_meta_leaf
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2014-04-09 14:43:50 +00:00
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; CHECK: mov x29, sp
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2014-03-29 10:18:08 +00:00
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; CHECK-NEXT: sub sp, sp, #32
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; CHECK: Ltmp
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2014-04-09 14:43:50 +00:00
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; CHECK: mov sp, x29
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2014-03-29 10:18:08 +00:00
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; CHECK: ret
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define void @caller_meta_leaf() {
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entry:
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%metadata = alloca i64, i32 3, align 8
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store i64 11, i64* %metadata
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store i64 12, i64* %metadata
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store i64 13, i64* %metadata
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call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 4, i32 0, i64* %metadata)
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ret void
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}
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; Test the webkit_jscc calling convention.
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; One argument will be passed in register, the other will be pushed on the stack.
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; Return value in x0.
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define void @jscall_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
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entry:
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; CHECK-LABEL: jscall_patchpoint_codegen:
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; CHECK: Ltmp
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; CHECK: str x{{.+}}, [sp]
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; CHECK-NEXT: mov x0, x{{.+}}
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; CHECK: Ltmp
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; CHECK-NEXT: movz x16, #65535, lsl #32
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; CHECK-NEXT: movk x16, #57005, lsl #16
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; CHECK-NEXT: movk x16, #48879
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; CHECK-NEXT: blr x16
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%resolveCall2 = inttoptr i64 281474417671919 to i8*
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%result = tail call webkit_jscc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 5, i32 20, i8* %resolveCall2, i32 2, i64 %p4, i64 %p2)
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%resolveCall3 = inttoptr i64 244837814038255 to i8*
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tail call webkit_jscc void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 6, i32 20, i8* %resolveCall3, i32 2, i64 %p4, i64 %result)
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ret void
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}
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; Test if the arguments are properly aligned and that we don't store undef arguments.
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define i64 @jscall_patchpoint_codegen2(i64 %callee) {
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entry:
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; CHECK-LABEL: jscall_patchpoint_codegen2:
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; CHECK: Ltmp
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2014-04-16 11:52:51 +00:00
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; CHECK: orr w{{.+}}, wzr, #0x6
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2014-03-29 10:18:08 +00:00
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; CHECK-NEXT: str x{{.+}}, [sp, #24]
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; CHECK-NEXT: orr w{{.+}}, wzr, #0x4
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; CHECK-NEXT: str w{{.+}}, [sp, #16]
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2014-04-16 11:52:51 +00:00
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; CHECK-NEXT: orr w{{.+}}, wzr, #0x2
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2014-03-29 10:18:08 +00:00
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; CHECK-NEXT: str x{{.+}}, [sp]
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; CHECK: Ltmp
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; CHECK-NEXT: movz x16, #65535, lsl #32
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; CHECK-NEXT: movk x16, #57005, lsl #16
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; CHECK-NEXT: movk x16, #48879
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; CHECK-NEXT: blr x16
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%call = inttoptr i64 281474417671919 to i8*
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%result = call webkit_jscc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 7, i32 20, i8* %call, i32 6, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6)
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ret i64 %result
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}
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; Test if the arguments are properly aligned and that we don't store undef arguments.
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define i64 @jscall_patchpoint_codegen3(i64 %callee) {
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entry:
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; CHECK-LABEL: jscall_patchpoint_codegen3:
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; CHECK: Ltmp
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2014-04-16 11:52:51 +00:00
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; CHECK: movz w{{.+}}, #10
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2014-03-29 10:18:08 +00:00
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; CHECK-NEXT: str x{{.+}}, [sp, #48]
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; CHECK-NEXT: orr w{{.+}}, wzr, #0x8
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; CHECK-NEXT: str w{{.+}}, [sp, #36]
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2014-04-16 11:52:51 +00:00
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; CHECK-NEXT: orr w{{.+}}, wzr, #0x6
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2014-03-29 10:18:08 +00:00
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; CHECK-NEXT: str x{{.+}}, [sp, #24]
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; CHECK-NEXT: orr w{{.+}}, wzr, #0x4
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; CHECK-NEXT: str w{{.+}}, [sp, #16]
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2014-04-16 11:52:51 +00:00
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; CHECK-NEXT: orr w{{.+}}, wzr, #0x2
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2014-03-29 10:18:08 +00:00
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; CHECK-NEXT: str x{{.+}}, [sp]
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; CHECK: Ltmp
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; CHECK-NEXT: movz x16, #65535, lsl #32
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; CHECK-NEXT: movk x16, #57005, lsl #16
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; CHECK-NEXT: movk x16, #48879
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; CHECK-NEXT: blr x16
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%call = inttoptr i64 281474417671919 to i8*
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%result = call webkit_jscc i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 7, i32 20, i8* %call, i32 10, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6, i32 undef, i32 8, i32 undef, i64 10)
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ret i64 %result
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}
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; Test patchpoints reusing the same TargetConstant.
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; <rdar:15390785> Assertion failed: (CI.getNumArgOperands() >= NumArgs + 4)
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; There is no way to verify this, since it depends on memory allocation.
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; But I think it's useful to include as a working example.
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define i64 @testLowerConstant(i64 %arg, i64 %tmp2, i64 %tmp10, i64* %tmp33, i64 %tmp79) {
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entry:
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%tmp80 = add i64 %tmp79, -16
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%tmp81 = inttoptr i64 %tmp80 to i64*
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%tmp82 = load i64* %tmp81, align 8
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tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 14, i32 8, i64 %arg, i64 %tmp2, i64 %tmp10, i64 %tmp82)
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tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 15, i32 32, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp82)
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%tmp83 = load i64* %tmp33, align 8
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%tmp84 = add i64 %tmp83, -24
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%tmp85 = inttoptr i64 %tmp84 to i64*
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%tmp86 = load i64* %tmp85, align 8
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tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 17, i32 8, i64 %arg, i64 %tmp10, i64 %tmp86)
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tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 18, i32 32, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp86)
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ret i64 10
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}
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; Test small patchpoints that don't emit calls.
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define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
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entry:
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; CHECK-LABEL: small_patchpoint_codegen:
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; CHECK: Ltmp
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; CHECK: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: ldp
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; CHECK-NEXT: ret
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%result = tail call i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 5, i32 20, i8* null, i32 2, i64 %p1, i64 %p2)
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ret void
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}
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; Test that scratch registers are spilled around patchpoints
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; CHECK: InlineAsm End
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; CHECK-NEXT: mov x{{[0-9]+}}, x16
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; CHECK-NEXT: mov x{{[0-9]+}}, x17
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; CHECK-NEXT: Ltmp
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; CHECK-NEXT: nop
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define void @clobberScratch(i32* %p) {
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%v = load i32* %p
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tail call void asm sideeffect "nop", "~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15},~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{x29},~{x30},~{x31}"() nounwind
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tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 5, i32 20, i8* null, i32 0, i32* %p, i32 %v)
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store i32 %v, i32* %p
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ret void
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}
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declare void @llvm.experimental.stackmap(i64, i32, ...)
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declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
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declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...)
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