llvm-6502/test/MC/ARM/arm_word_directive.s

@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown %s | FileCheck %s

@ CHECK: TEST0:
@ CHECK: .long 3
TEST0:  
        .word 3
Mark ARM subtarget features that are available for the assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929 91177308-0d34-0410-b5e6-96231b3b80d8 2010-11-01 16:59:54 +00:00			`@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown %s \| FileCheck %s`
Added the first bits of the ARM target assembler to llvm-mc. For now it only parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will give an error is called. Broke out the test of the .word directive into two different test cases, one for x86 and one for arm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81817 91177308-0d34-0410-b5e6-96231b3b80d8 2009-09-15 00:27:25 +00:00
			`@ CHECK: TEST0:`
			`@ CHECK: .long 3`
			`TEST0:`
			`.word 3`