llvm-6502/test/CodeGen/PowerPC/ashr-neg1.ll

; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
target triple = "powerpc64-unknown-linux-gnu"

define void @autogen_SD30723(i32) {
BB:
  br label %CF80

CF80:                                             ; preds = %CF80, %BB
  %B = ashr i32 %0, -1
  br i1 undef, label %CF80, label %CF84

CF84:                                             ; preds = %CF84, %CF80
  %Cmp62 = icmp sge i32 undef, %B
  br i1 %Cmp62, label %CF84, label %CF85

CF85:                                             ; preds = %CF85, %CF84
  br label %CF85
}
Don't crash in SE dealing with ashr x, -1 ScalarEvolution::getSignedRange uses ComputeNumSignBits from ValueTracking on ashr instructions. ComputeNumSignBits can return zero, but this case was not handled correctly by the code in getSignedRange which was calling: APInt::getSignedMinValue(BitWidth).ashr(NS - 1) with NS = 0, resulting in an assertion failure in APInt::ashr. Now, we just return the conservative result (as with NS == 1). Another bug found by llvm-stress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185955 91177308-0d34-0410-b5e6-96231b3b80d8 2013-07-09 18:16:16 +00:00			`; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s`
			`target triple = "powerpc64-unknown-linux-gnu"`

			`define void @autogen_SD30723(i32) {`
			`BB:`
			`br label %CF80`

			`CF80: ; preds = %CF80, %BB`
			`%B = ashr i32 %0, -1`
			`br i1 undef, label %CF80, label %CF84`

			`CF84: ; preds = %CF84, %CF80`
			`%Cmp62 = icmp sge i32 undef, %B`
			`br i1 %Cmp62, label %CF84, label %CF85`

			`CF85: ; preds = %CF85, %CF84`
			`br label %CF85`
			`}`