llvm-6502/test/CodeGen/ARM/neon_cmp.ll

; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 %s -o - | FileCheck %s

; bug 15283
; radar://13191881
; CHECK: vfcmp
define void @vfcmp(<2 x double>* %a, <2 x double>* %b) {
  %wide.load = load <2 x double>* %a, align 4
  %wide.load2 = load <2 x double>* %b, align 4
; CHECK-NOT: vdup.32
; CHECK-NOT: vmovn.i64
  %v1 = fcmp olt <2 x double> %wide.load, %wide.load2
  %v2 = zext <2 x i1> %v1 to <2 x i32>
  %v3 = sitofp <2 x i32> %v2 to <2 x double>
  store <2 x double> %v3, <2 x double>* %b, align 4
  ret void
}
ARM: fixup more tests to specify the target more explicitly This changes the tests that were targeting ARM EABI to explicitly specify the environment rather than relying on the default. This breaks with the new Windows on ARM support when running the tests on Windows where the default environment is no longer EABI. Take the opportunity to avoid a pointless redirect (helps when trying to debug with providing a command line invocation which can be copy and pasted) and removing a few greps in favour of FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205541 91177308-0d34-0410-b5e6-96231b3b80d8 2014-04-03 16:01:44 +00:00			`; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 %s -o - \| FileCheck %s`

DAGCombiner: Fold pointless truncate, bitcast, buildvector series (2xi32) (truncate ((2xi64) bitcast (buildvector i32 a, i32 x, i32 b, i32 y))) can be folded into a (2xi32) (buildvector i32 a, i32 b). Such a DAG would cause uneccessary vdup instructions followed by vmovn instructions. We generate this code on ARM NEON for a setcc olt, 2xf64, 2xf64. For example, in the vectorized version of the code below. double A[N]; double B[N]; void test_double_compare_to_double() { int i; for(i=0;i<N;i++) A[i] = (double)(A[i] < B[i]); } radar://13191881 Fixes bug 15283. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175670 91177308-0d34-0410-b5e6-96231b3b80d8 2013-02-20 21:33:32 +00:00			`; bug 15283`
			`; radar://13191881`
			`; CHECK: vfcmp`
			`define void @vfcmp(<2 x double>* %a, <2 x double>* %b) {`
			`%wide.load = load <2 x double>* %a, align 4`
			`%wide.load2 = load <2 x double>* %b, align 4`
			`; CHECK-NOT: vdup.32`
			`; CHECK-NOT: vmovn.i64`
			`%v1 = fcmp olt <2 x double> %wide.load, %wide.load2`
			`%v2 = zext <2 x i1> %v1 to <2 x i32>`
			`%v3 = sitofp <2 x i32> %v2 to <2 x double>`
			`store <2 x double> %v3, <2 x double>* %b, align 4`
			`ret void`
			`}`