mirror of
https://github.com/c64scene-ar/llvm-6502.git
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221 lines
7.2 KiB
C++
221 lines
7.2 KiB
C++
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//===-- PPCTargetTransformInfo.cpp - PPC specific TTI pass ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements a TargetTransformInfo analysis pass specific to the
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/// PPC target machine. It uses the target's detailed information to provide
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/// more precise answers to certain TTI queries, while letting the target
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/// independent and default TTI implementations handle the rest.
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///
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "ppctti"
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#include "PPC.h"
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#include "PPCTargetMachine.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/CostTable.h"
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using namespace llvm;
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// Declare the pass initialization routine locally as target-specific passes
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// don't havve a target-wide initialization entry point, and so we rely on the
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// pass constructor initialization.
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namespace llvm {
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void initializePPCTTIPass(PassRegistry &);
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}
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namespace {
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class PPCTTI : public ImmutablePass, public TargetTransformInfo {
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const PPCTargetMachine *TM;
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const PPCSubtarget *ST;
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const PPCTargetLowering *TLI;
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/// Estimate the overhead of scalarizing an instruction. Insert and Extract
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/// are set if the result needs to be inserted and/or extracted from vectors.
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unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const;
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public:
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PPCTTI() : ImmutablePass(ID), TM(0), ST(0), TLI(0) {
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llvm_unreachable("This pass cannot be directly constructed");
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}
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PPCTTI(const PPCTargetMachine *TM)
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: ImmutablePass(ID), TM(TM), ST(TM->getSubtargetImpl()),
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TLI(TM->getTargetLowering()) {
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initializePPCTTIPass(*PassRegistry::getPassRegistry());
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}
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virtual void initializePass() {
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pushTTIStack(this);
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}
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virtual void finalizePass() {
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popTTIStack();
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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TargetTransformInfo::getAnalysisUsage(AU);
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}
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/// Pass identification.
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static char ID;
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/// Provide necessary pointer adjustments for the two base classes.
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virtual void *getAdjustedAnalysisPointer(const void *ID) {
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if (ID == &TargetTransformInfo::ID)
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return (TargetTransformInfo*)this;
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return this;
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}
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/// \name Scalar TTI Implementations
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/// @{
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virtual PopcntSupportKind getPopcntSupport(unsigned TyWidth) const;
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/// @}
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/// \name Vector TTI Implementations
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/// @{
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virtual unsigned getNumberOfRegisters(bool Vector) const;
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virtual unsigned getRegisterBitWidth(bool Vector) const;
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virtual unsigned getMaximumUnrollFactor() const;
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virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const;
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virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
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int Index, Type *SubTp) const;
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virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
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Type *Src) const;
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virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
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Type *CondTy) const;
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virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
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unsigned Index) const;
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virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
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unsigned Alignment,
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unsigned AddressSpace) const;
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/// @}
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};
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} // end anonymous namespace
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INITIALIZE_AG_PASS(PPCTTI, TargetTransformInfo, "ppctti",
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"PPC Target Transform Info", true, true, false)
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char PPCTTI::ID = 0;
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ImmutablePass *
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llvm::createPPCTargetTransformInfoPass(const PPCTargetMachine *TM) {
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return new PPCTTI(TM);
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}
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//===----------------------------------------------------------------------===//
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//
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// PPC cost model.
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//
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//===----------------------------------------------------------------------===//
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PPCTTI::PopcntSupportKind PPCTTI::getPopcntSupport(unsigned TyWidth) const {
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assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
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// FIXME: PPC currently does not have custom popcnt lowering even though
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// there is hardware support. Once this is fixed, update this function
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// to reflect the real capabilities of the hardware.
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return PSK_Software;
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}
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unsigned PPCTTI::getNumberOfRegisters(bool Vector) const {
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if (Vector && !ST->hasAltivec())
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return 0;
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return 32;
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}
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unsigned PPCTTI::getRegisterBitWidth(bool Vector) const {
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if (Vector) {
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if (ST->hasAltivec()) return 128;
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return 0;
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}
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if (ST->isPPC64())
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return 64;
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return 32;
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}
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unsigned PPCTTI::getMaximumUnrollFactor() const {
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unsigned Directive = ST->getDarwinDirective();
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// The 440 has no SIMD support, but floating-point instructions
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// have a 5-cycle latency, so unroll by 5x for latency hiding.
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if (Directive == PPC::DIR_440)
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return 5;
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// The A2 has no SIMD support, but floating-point instructions
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// have a 6-cycle latency, so unroll by 6x for latency hiding.
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if (Directive == PPC::DIR_A2)
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return 6;
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// FIXME: For lack of any better information, do no harm...
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if (Directive == PPC::DIR_E500mc || Directive == PPC::DIR_E5500)
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return 1;
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// For most things, modern systems have two execution units (and
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// out-of-order execution).
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return 2;
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}
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unsigned PPCTTI::getArithmeticInstrCost(unsigned Opcode, Type *Ty) const {
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int ISD = TLI->InstructionOpcodeToISD(Opcode);
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assert(ISD && "Invalid opcode");
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// Fallback to the default implementation.
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return TargetTransformInfo::getArithmeticInstrCost(Opcode, Ty);
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}
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unsigned PPCTTI::getShuffleCost(ShuffleKind Kind, Type *Tp, int Index,
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Type *SubTp) const {
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return TargetTransformInfo::getShuffleCost(Kind, Tp, Index, SubTp);
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}
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unsigned PPCTTI::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) const {
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int ISD = TLI->InstructionOpcodeToISD(Opcode);
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assert(ISD && "Invalid opcode");
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return TargetTransformInfo::getCastInstrCost(Opcode, Dst, Src);
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}
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unsigned PPCTTI::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
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Type *CondTy) const {
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return TargetTransformInfo::getCmpSelInstrCost(Opcode, ValTy, CondTy);
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}
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unsigned PPCTTI::getVectorInstrCost(unsigned Opcode, Type *Val,
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unsigned Index) const {
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assert(Val->isVectorTy() && "This must be a vector type");
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return TargetTransformInfo::getVectorInstrCost(Opcode, Val, Index);
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}
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unsigned PPCTTI::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
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unsigned AddressSpace) const {
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// Legalize the type.
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std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(Src);
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assert((Opcode == Instruction::Load || Opcode == Instruction::Store) &&
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"Invalid Opcode");
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// Each load/store unit costs 1.
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unsigned Cost = LT.first * 1;
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// PPC in general does not support unaligned loads and stores. They'll need
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// to be decomposed based on the alignment factor.
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unsigned SrcBytes = LT.second.getStoreSize();
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if (SrcBytes && Alignment && Alignment < SrcBytes)
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Cost *= (SrcBytes/Alignment);
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return Cost;
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}
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