mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-24 22:32:47 +00:00
278 lines
7.4 KiB
LLVM
278 lines
7.4 KiB
LLVM
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; RUN: llc -march=mipsel -mcpu=mips2 < %s | FileCheck %s
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; All test functions do the same thing - they return the first variable
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; argument.
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; All CHECK's do the same thing - they check whether variable arguments from
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; registers are placed on correct stack locations, and whether the first
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; variable argument is returned from the correct stack location.
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declare void @llvm.va_start(i8*) nounwind
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declare void @llvm.va_end(i8*) nounwind
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; return int
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define i32 @va1(i32 %a, ...) nounwind {
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entry:
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%a.addr = alloca i32, align 4
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%ap = alloca i8*, align 4
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%b = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, i32
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store i32 %0, i32* %b, align 4
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_end(i8* %ap2)
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%tmp = load i32* %b, align 4
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ret i32 %tmp
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; CHECK: va1:
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; CHECK: addiu $sp, $sp, -32
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; CHECK: sw $5, 36($sp)
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; CHECK: sw $6, 40($sp)
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; CHECK: sw $7, 44($sp)
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; CHECK: lw $2, 36($sp)
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}
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; check whether the variable double argument will be accessed from the 8-byte
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; aligned location (i.e. whether the address is computed by adding 7 and
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; clearing lower 3 bits)
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define double @va2(i32 %a, ...) nounwind {
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entry:
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%a.addr = alloca i32, align 4
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%ap = alloca i8*, align 4
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%b = alloca double, align 8
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store i32 %a, i32* %a.addr, align 4
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, double
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store double %0, double* %b, align 8
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_end(i8* %ap2)
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%tmp = load double* %b, align 8
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ret double %tmp
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; CHECK: va2:
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; CHECK: addiu $sp, $sp, -40
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; CHECK: addiu $2, $sp, 44
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; CHECK: sw $5, 44($sp)
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; CHECK: sw $6, 48($sp)
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; CHECK: sw $7, 52($sp)
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; CHECK: addiu $3, $2, 7
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; CHECK: addiu $5, $zero, -8
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; CHECK: and $3, $3, $5
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; CHECK: ldc1 $f0, 0($3)
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}
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; int
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define i32 @va3(double %a, ...) nounwind {
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entry:
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%a.addr = alloca double, align 8
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%ap = alloca i8*, align 4
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%b = alloca i32, align 4
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store double %a, double* %a.addr, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, i32
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store i32 %0, i32* %b, align 4
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_end(i8* %ap2)
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%tmp = load i32* %b, align 4
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ret i32 %tmp
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; CHECK: va3:
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; CHECK: addiu $sp, $sp, -40
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; CHECK: sw $6, 48($sp)
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; CHECK: sw $7, 52($sp)
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; CHECK: lw $2, 48($sp)
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}
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; double
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define double @va4(double %a, ...) nounwind {
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entry:
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%a.addr = alloca double, align 8
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%ap = alloca i8*, align 4
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%b = alloca double, align 8
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store double %a, double* %a.addr, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, double
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store double %0, double* %b, align 8
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_end(i8* %ap2)
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%tmp = load double* %b, align 8
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ret double %tmp
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; CHECK: va4:
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; CHECK: addiu $sp, $sp, -48
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; CHECK: sw $6, 56($sp)
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; CHECK: sw $7, 60($sp)
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; CHECK: addiu $3, $sp, 56
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; CHECK: addiu $6, $3, 7
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; CHECK: addiu $7, $zero, -8
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; CHECK: and $2, $6, $7
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; CHECK: ldc1 $f0, 0($2)
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}
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; int
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define i32 @va5(i32 %a, i32 %b, i32 %c, ...) nounwind {
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entry:
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%a.addr = alloca i32, align 4
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%b.addr = alloca i32, align 4
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%c.addr = alloca i32, align 4
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%ap = alloca i8*, align 4
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%d = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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store i32 %b, i32* %b.addr, align 4
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store i32 %c, i32* %c.addr, align 4
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, i32
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store i32 %0, i32* %d, align 4
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_end(i8* %ap2)
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%tmp = load i32* %d, align 4
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ret i32 %tmp
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; CHECK: va5:
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; CHECK: addiu $sp, $sp, -40
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; CHECK: sw $7, 52($sp)
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; CHECK: lw $2, 52($sp)
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}
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; double
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define double @va6(i32 %a, i32 %b, i32 %c, ...) nounwind {
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entry:
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%a.addr = alloca i32, align 4
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%b.addr = alloca i32, align 4
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%c.addr = alloca i32, align 4
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%ap = alloca i8*, align 4
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%d = alloca double, align 8
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store i32 %a, i32* %a.addr, align 4
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store i32 %b, i32* %b.addr, align 4
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store i32 %c, i32* %c.addr, align 4
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, double
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store double %0, double* %d, align 8
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_end(i8* %ap2)
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%tmp = load double* %d, align 8
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ret double %tmp
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; CHECK: va6:
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; CHECK: addiu $sp, $sp, -48
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; CHECK: sw $7, 60($sp)
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; CHECK: addiu $2, $sp, 60
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; CHECK: addiu $3, $2, 7
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; CHECK: addiu $4, $zero, -8
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; CHECK: and $3, $3, $4
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; CHECK: ldc1 $f0, 0($3)
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}
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; int
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define i32 @va7(i32 %a, double %b, ...) nounwind {
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entry:
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%a.addr = alloca i32, align 4
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%b.addr = alloca double, align 8
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%ap = alloca i8*, align 4
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%c = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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store double %b, double* %b.addr, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, i32
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store i32 %0, i32* %c, align 4
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_end(i8* %ap2)
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%tmp = load i32* %c, align 4
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ret i32 %tmp
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; CHECK: va7:
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; CHECK: addiu $sp, $sp, -40
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; CHECK: lw $2, 56($sp)
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}
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; double
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define double @va8(i32 %a, double %b, ...) nounwind {
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entry:
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%a.addr = alloca i32, align 4
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%b.addr = alloca double, align 8
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%ap = alloca i8*, align 4
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%c = alloca double, align 8
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store i32 %a, i32* %a.addr, align 4
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store double %b, double* %b.addr, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, double
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store double %0, double* %c, align 8
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_end(i8* %ap2)
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%tmp = load double* %c, align 8
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ret double %tmp
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; CHECK: va8:
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; CHECK: addiu $sp, $sp, -48
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; CHECK: addiu $3, $sp, 64
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; CHECK: addiu $4, $3, 7
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; CHECK: addiu $5, $zero, -8
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; CHECK: and $2, $4, $5
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; CHECK: ldc1 $f0, 0($2)
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}
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; int
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define i32 @va9(double %a, double %b, i32 %c, ...) nounwind {
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entry:
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%a.addr = alloca double, align 8
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%b.addr = alloca double, align 8
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%c.addr = alloca i32, align 4
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%ap = alloca i8*, align 4
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%d = alloca i32, align 4
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store double %a, double* %a.addr, align 8
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store double %b, double* %b.addr, align 8
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store i32 %c, i32* %c.addr, align 4
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, i32
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store i32 %0, i32* %d, align 4
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_end(i8* %ap2)
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%tmp = load i32* %d, align 4
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ret i32 %tmp
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; CHECK: va9:
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; CHECK: addiu $sp, $sp, -56
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; CHECK: lw $2, 76($sp)
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}
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; double
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define double @va10(double %a, double %b, i32 %c, ...) nounwind {
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entry:
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%a.addr = alloca double, align 8
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%b.addr = alloca double, align 8
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%c.addr = alloca i32, align 4
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%ap = alloca i8*, align 4
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%d = alloca double, align 8
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store double %a, double* %a.addr, align 8
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store double %b, double* %b.addr, align 8
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store i32 %c, i32* %c.addr, align 4
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, double
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store double %0, double* %d, align 8
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_end(i8* %ap2)
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%tmp = load double* %d, align 8
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ret double %tmp
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; CHECK: va10:
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; CHECK: addiu $sp, $sp, -56
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; CHECK: addiu $3, $sp, 76
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; CHECK: addiu $2, $3, 7
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; CHECK: addiu $4, $zero, -8
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; CHECK: and $2, $2, $4
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; CHECK: ldc1 $f0, 0($2)
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}
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