2012-12-07 21:03:15 +00:00
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; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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2012-11-14 20:38:48 +00:00
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; Check that post-increment load instructions are being generated.
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; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(r{{[0-9]+}}{{ *}}++{{ *}}#4{{ *}})
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define i32 @sum(i32* nocapture %a, i16* nocapture %b, i32 %n) nounwind {
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entry:
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br label %for.body
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for.body:
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%lsr.iv = phi i32 [ %lsr.iv.next, %for.body ], [ 10, %entry ]
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%arrayidx.phi = phi i32* [ %a, %entry ], [ %arrayidx.inc, %for.body ]
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%arrayidx1.phi = phi i16* [ %b, %entry ], [ %arrayidx1.inc, %for.body ]
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%sum.03 = phi i32 [ 0, %entry ], [ %add2, %for.body ]
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%0 = load i32* %arrayidx.phi, align 4
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%1 = load i16* %arrayidx1.phi, align 2
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%conv = sext i16 %1 to i32
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%add = add i32 %0, %sum.03
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%add2 = add i32 %add, %conv
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%arrayidx.inc = getelementptr i32* %arrayidx.phi, i32 1
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%arrayidx1.inc = getelementptr i16* %arrayidx1.phi, i32 1
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%lsr.iv.next = add i32 %lsr.iv, -1
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%exitcond = icmp eq i32 %lsr.iv.next, 0
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret i32 %add2
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}
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