llvm-6502/test/CodeGen/PowerPC/big-endian-call-result.ll

; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
; RUN:   grep {addic 4, 4, 1}
; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
; RUN:   grep {addze 3, 3}

declare i64 @foo()

define i64 @bar()
{
  %t = call i64 @foo()
  %s = add i64 %t, 1
  ret i64 %s
}
Change getCopyToParts and getCopyFromParts to always use target-endian register ordering, for both physical and virtual registers. Update the PPC target lowering for calls to expect registers for the call result to already be in target order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38471 91177308-0d34-0410-b5e6-96231b3b80d8 2007-07-09 20:59:04 +00:00			`; RUN: llvm-as < %s \| llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu \| \`
			`; RUN: grep {addic 4, 4, 1}`
			`; RUN: llvm-as < %s \| llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu \| \`
			`; RUN: grep {addze 3, 3}`

Remove the trailing semicolon from function declarations in LLVM, where it's interpreted as a comment, not part of the syntax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39920 91177308-0d34-0410-b5e6-96231b3b80d8 2007-07-16 13:37:30 +00:00			`declare i64 @foo()`
Change getCopyToParts and getCopyFromParts to always use target-endian register ordering, for both physical and virtual registers. Update the PPC target lowering for calls to expect registers for the call result to already be in target order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38471 91177308-0d34-0410-b5e6-96231b3b80d8 2007-07-09 20:59:04 +00:00
			`define i64 @bar()`
			`{`
			`%t = call i64 @foo()`
			`%s = add i64 %t, 1`
			`ret i64 %s`
			`}`