llvm-6502/test/CodeGen/X86/pr16360.ll

; RUN: llc < %s -mcpu=pentium4 -mtriple=i686-pc-linux | FileCheck %s

define i64 @foo(i32 %sum) {
entry:
  %conv = sext i32 %sum to i64
  %shr = lshr i64 %conv, 2
  %or = or i64 4611686018360279040, %shr
  ret i64 %or
}

; CHECK: foo
; CHECK: shrl $2
; CHECK: orl $-67108864
; CHECK-NOT: movl $-1
; CHECK: movl $1073741823
; CHECK: ret
Add '-mcpu=' to prevent breaking on ATOM due to different code schedule git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184591 91177308-0d34-0410-b5e6-96231b3b80d8 2013-06-21 20:22:45 +00:00			`; RUN: llc < %s -mcpu=pentium4 -mtriple=i686-pc-linux \| FileCheck %s`
Fix PR16360 When (srl (anyextend x), c) is folded into (anyextend (srl x, c)), the high bits are not cleared. Add 'and' to clear off them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184575 91177308-0d34-0410-b5e6-96231b3b80d8 2013-06-21 18:45:27 +00:00
			`define i64 @foo(i32 %sum) {`
			`entry:`
			`%conv = sext i32 %sum to i64`
			`%shr = lshr i64 %conv, 2`
			`%or = or i64 4611686018360279040, %shr`
			`ret i64 %or`
			`}`

			`; CHECK: foo`
			`; CHECK: shrl $2`
			`; CHECK: orl $-67108864`
			`; CHECK-NOT: movl $-1`
			`; CHECK: movl $1073741823`
			`; CHECK: ret`