2004-06-21 16:55:25 +00:00
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##===- lib/Target/PowerPC/Makefile -------------------------*- Makefile -*-===##
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2009-01-09 16:44:42 +00:00
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#
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2004-06-21 16:55:25 +00:00
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# The LLVM Compiler Infrastructure
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#
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2007-12-29 20:09:26 +00:00
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# This file is distributed under the University of Illinois Open Source
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# License. See LICENSE.TXT for details.
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2009-01-09 16:44:42 +00:00
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#
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2004-06-21 16:55:25 +00:00
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##===----------------------------------------------------------------------===##
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2010-01-22 06:49:46 +00:00
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2004-06-21 16:55:25 +00:00
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LEVEL = ../../..
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2008-08-17 13:54:44 +00:00
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LIBRARYNAME = LLVMPowerPCCodeGen
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2005-10-14 23:37:35 +00:00
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TARGET = PPC
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2004-08-05 18:34:15 +00:00
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2004-06-21 16:55:25 +00:00
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# Make sure that tblgen is run, first thing.
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2011-06-28 20:07:07 +00:00
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BUILT_SOURCES = PPCGenRegisterInfo.inc \
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2005-10-14 23:37:35 +00:00
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PPCGenAsmWriter.inc PPCGenCodeEmitter.inc \
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2007-03-06 00:59:59 +00:00
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PPCGenInstrInfo.inc PPCGenDAGISel.inc \
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2011-07-01 22:36:09 +00:00
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PPCGenSubtargetInfo.inc PPCGenCallingConv.inc \
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Implement a basic MCCodeEmitter for PPC. This doesn't handle
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00]
stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00]
cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00]
beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 04:16:32 +00:00
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PPCGenMCCodeEmitter.inc
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2004-06-21 16:55:25 +00:00
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2011-07-14 20:59:42 +00:00
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DIRS = InstPrinter TargetInfo MCTargetDesc
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2008-08-17 13:54:28 +00:00
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2004-10-22 21:02:08 +00:00
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include $(LEVEL)/Makefile.common
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