llvm-6502/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h

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//===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PPC_PPCFIXUPKINDS_H
#define LLVM_PPC_PPCFIXUPKINDS_H
#include "llvm/MC/MCFixup.h"
#undef PPC
namespace llvm {
namespace PPC {
enum Fixups {
// fixup_ppc_br24 - 24-bit PC relative relocation for direct branches like 'b'
// and 'bl'.
fixup_ppc_br24 = FirstTargetFixupKind,
/// fixup_ppc_brcond14 - 14-bit PC relative relocation for conditional
/// branches.
fixup_ppc_brcond14,
/// fixup_ppc_lo16 - A 16-bit fixup corresponding to lo16(_foo) for instrs
/// like 'li'.
fixup_ppc_lo16,
/// fixup_ppc_ha16 - A 16-bit fixup corresponding to ha16(_foo) for instrs
/// like 'lis'.
fixup_ppc_ha16,
/// fixup_ppc_lo14 - A 14-bit fixup corresponding to lo16(_foo) for instrs
/// like 'std'.
fixup_ppc_lo14,
/// fixup_ppc_toc - Insert value of TOC base (.TOC.).
fixup_ppc_toc,
/// fixup_ppc_toc16 - A 16-bit signed fixup relative to the TOC base.
fixup_ppc_toc16,
/// fixup_ppc_toc16_ds - A 14-bit signed fixup relative to the TOC base with
/// implied 2 zero bits
fixup_ppc_toc16_ds,
/// fixup_ppc_tlsreg - Insert thread-pointer register number.
fixup_ppc_tlsreg,
This patch implements the general dynamic TLS model for 64-bit PowerPC. Given a thread-local symbol x with global-dynamic access, the generated code to obtain x's address is: Instruction Relocation Symbol addis ra,r2,x@got@tlsgd@ha R_PPC64_GOT_TLSGD16_HA x addi r3,ra,x@got@tlsgd@l R_PPC64_GOT_TLSGD16_L x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop <use address in r3> The implementation borrows from the medium code model work for introducing special forms of ADDIS and ADDI into the DAG representation. This is made slightly more complicated by having to introduce a call to the external function __tls_get_addr. Using the full call machinery is overkill and, more importantly, makes it difficult to add a special relocation. So I've introduced another opcode GET_TLS_ADDR to represent the function call, and surrounded it with register copies to set up the parameter and return value. Most of the code is pretty straightforward. I ran into one peculiarity when I introduced a new PPC opcode BL8_NOP_ELF_TLSGD, which is just like BL8_NOP_ELF except that it takes another parameter to represent the symbol ("x" above) that requires a relocation on the call. Something in the TblGen machinery causes BL8_NOP_ELF and BL8_NOP_ELF_TLSGD to be treated identically during the emit phase, so this second operand was never visited to generate relocations. This is the reason for the slightly messy workaround in PPCMCCodeEmitter.cpp:getDirectBrEncoding(). Two new tests are included to demonstrate correct external assembly and correct generation of relocations using the integrated assembler. Comments welcome! Thanks, Bill git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169910 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 20:30:11 +00:00
/// fixup_ppc_nofixup - Not a true fixup, but ties a symbol to a call
/// to __tls_get_addr for the TLS general and local dynamic models.
fixup_ppc_nofixup,
// Marker
LastTargetFixupKind,
NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
};
}
}
#endif